ARM: ARC: put sw_isr_table in ROM by default

We can save a great deal of RAM this way, it only needs to be
in RAM if dynamic interrupts are in use.

At some point this config option broke, probably when static
interrupts were introduced into the system.

To induce build (instead of runtime) errors when irq_connect_dynamic()
is used without putting the table in RAM, the dynamic interrupt
functions are now conditionally compiled.

Change-Id: I4860508746fd375d189390163876c59b6c544c9a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>

arch/arc/Kconfig

@@ -182,9 +182,9 @@ config  SW_ISR_TABLE_DYNAMIC
 	bool
 	prompt "Allow installing interrupt handlers at runtime"
 	depends on SW_ISR_TABLE
-	default y
+	default n
 	help
-	  This option enables nanoCpuIntConnect(). It moves the ISR table to
+	  This option enables irq_connect_dynamic(). It moves the ISR table to
 	  SRAM so that it is writable. This has the side-effect of removing
 	  write-protection on the ISR table.
 

arch/arc/core/irq_manage.c

@@ -37,30 +37,6 @@
 #include <sections.h>
 #include <sw_isr_table.h>
 
-/*
- * @internal
- *
- * @brief Replace an interrupt handler by another
- *
- * An interrupt's ISR can be replaced at runtime.
- *
- * @return N/A
- */
-
-void _irq_handler_set(
-	unsigned int irq,
-	void (*new)(void *arg),
-	void *arg
-)
-{
-	int key = irq_lock();
-	int index = irq - 16;
-
-	_sw_isr_table[index].isr = new;
-	_sw_isr_table[index].arg = arg;
-
-	irq_unlock(key);
-}
 
 /*
  * @brief Enable an interrupt line
@@ -142,6 +118,32 @@ void _irq_spurious(void *unused)
 		;
 }
 
+#if CONFIG_SW_ISR_TABLE_DYNAMIC
+/*
+ * @internal
+ *
+ * @brief Replace an interrupt handler by another
+ *
+ * An interrupt's ISR can be replaced at runtime.
+ *
+ * @return N/A
+ */
+
+void _irq_handler_set(
+	unsigned int irq,
+	void (*new)(void *arg),
+	void *arg
+)
+{
+	int key = irq_lock();
+	int index = irq - 16;
+
+	_sw_isr_table[index].isr = new;
+	_sw_isr_table[index].arg = arg;
+
+	irq_unlock(key);
+}
+
 /*
  * @brief Connect an ISR to an interrupt line
  *
@@ -185,3 +187,5 @@ void _irq_disconnect(unsigned int irq)
 {
 	_irq_handler_set(irq, _irq_spurious, NULL);
 }
+
+#endif /* CONFIG_SW_ISR_TABLE_DYNAMIC */

arch/arm/core/cortex_m/Kconfig

@@ -154,9 +154,9 @@ config SW_ISR_TABLE_DYNAMIC
 	bool
 	prompt "Allow installing interrupt handlers at runtime"
 	depends on SW_ISR_TABLE
-	default y
+	default n
 	help
-	This option enables irq_connect(). It moves the ISR table to
+	This option enables irq_connect_dynamic(). It moves the ISR table to
 	SRAM so that it is writable. This has the side-effect of removing
 	write-protection on the ISR table.
 

arch/arm/core/irq_manage.c

@@ -33,26 +33,6 @@
 
 extern void __reserved(void);
 
-/**
- * @internal
- *
- * @brief Replace an interrupt handler by another
- *
- * An interrupt's ISR can be replaced at runtime.
- *
- * @return N/A
- */
-void _irq_handler_set(unsigned int irq,
-						void (*new)(void *arg),
-						void *arg)
-{
-	int key = irq_lock();
-
-	_sw_isr_table[irq].isr = new;
-	_sw_isr_table[irq].arg = arg;
-
-	irq_unlock(key);
-}
 
 /**
  *
@@ -124,6 +104,28 @@ void _irq_spurious(void *unused)
 	__reserved();
 }
 
+#if CONFIG_SW_ISR_TABLE_DYNAMIC
+/**
+ * @internal
+ *
+ * @brief Replace an interrupt handler by another
+ *
+ * An interrupt's ISR can be replaced at runtime.
+ *
+ * @return N/A
+ */
+void _irq_handler_set(unsigned int irq,
+						void (*new)(void *arg),
+						void *arg)
+{
+	int key = irq_lock();
+
+	_sw_isr_table[irq].isr = new;
+	_sw_isr_table[irq].arg = arg;
+
+	irq_unlock(key);
+}
+
 /**
  *
  * @brief Connect an ISR to an interrupt line
@@ -164,3 +166,4 @@ void _irq_disconnect(unsigned int irq)
 {
 	_irq_handler_set(irq, _irq_spurious, NULL);
 }
+#endif /* CONFIG_SW_ISR_TABLE_DYNAMIC */

doc/kernel/nanokernel/nanokernel_interrupts.rst

@@ -127,6 +127,9 @@ Prerequisites
 * (x86 only) Set the :option:`NUM_DYNAMIC_STUBS` configuration option
   to specify the maximum number of dynamic ISRs allowed in the project.
 
+* (ARC & ARM only) Enable the :option:`SW_ISR_TABLE_DYNAMIC` so that
+  interrupts may be connected at runtime.
+
 Example
 -------
 

include/arch/arc/v2/linker.cmd

@@ -68,6 +68,21 @@ SECTIONS {
 		KEEP(*(.irq_vector_table))
 		KEEP(*(".irq_vector_table.*"))
 
+#ifndef CONFIG_SW_ISR_TABLE_DYNAMIC
+		KEEP(*(.isr_irq*))
+
+		/*The following sections maps the location of the different rows for
+		the _sw_isr_table. Each row maps to an IRQ entry (handler, argument).*/
+		/*In ARC architecture, IRQ 0-15 are reserved for the system and are not
+		assignable by the user, for that reason the linker sections start
+		on IRQ 16*/
+		/* sections for IRQ16-19 */
+		KEEP(*(SORT(.gnu.linkonce.isr_irq[1][6-9])))
+		/* sections for IRQ20-99 */
+		KEEP(*(SORT(.gnu.linkonce.isr_irq[2-9][0-9])))
+		/* sections for IRQ100-999 */
+		KEEP(*(SORT(.gnu.linkonce.isr_irq[1-9][0-9][0-9])))
+#endif
 
 		*(.text)
 		*(".text.*")
@@ -123,6 +138,8 @@ SECTIONS {
 		__data_ram_start = .;
 		*(.data)
 		*(".data.*")
+
+#if CONFIG_SW_ISR_TABLE_DYNAMIC
 		KEEP(*(.isr_irq*))
 
 		/*The following sections maps the location of the different rows for
@@ -136,6 +153,7 @@ SECTIONS {
 		KEEP(*(SORT(.gnu.linkonce.isr_irq[2-9][0-9])))
 		/* sections for IRQ100-999 */
 		KEEP(*(SORT(.gnu.linkonce.isr_irq[1-9][0-9][0-9])))
+#endif
 	} GROUP_LINK_IN(RAMABLE_REGION)
 
 	SECTION_PROLOGUE(initlevel, (OPTIONAL),)

include/arch/arm/cortex_m/scripts/linker.cmd

@@ -85,8 +85,20 @@ SECTIONS
 	KEEP(*(.security_frdm_k64f))
 	KEEP(*(".security_frdm_k64f.*"))
 
-	_image_text_start = .;
+#ifndef CONFIG_SW_ISR_TABLE_DYNAMIC
+	KEEP(*(.isr_irq*))
 
+	/* sections for IRQ0-9 */
+	KEEP(*(SORT(.gnu.linkonce.isr_irq[0-9])))
+
+	/* sections for IRQ10-99 */
+	KEEP(*(SORT(.gnu.linkonce.isr_irq[0-9][0-9])))
+
+	/* sections for IRQ100-999 */
+	KEEP(*(SORT(.gnu.linkonce.isr_irq[0-9][0-9][0-9])))
+#endif
+
+	_image_text_start = .;
 	*(.text)
 	*(".text.*")
 	} GROUP_LINK_IN(ROMABLE_REGION)
@@ -139,6 +151,8 @@ SECTIONS
 	__data_ram_start = .;
 	*(.data)
 	*(".data.*")
+
+#if CONFIG_SW_ISR_TABLE_DYNAMIC
 	KEEP(*(.isr_irq*))
 
 	/* sections for IRQ0-9 */
@@ -149,6 +163,7 @@ SECTIONS
 
 	/* sections for IRQ100-999 */
 	KEEP(*(SORT(.gnu.linkonce.isr_irq[0-9][0-9][0-9])))
+#endif
 	} GROUP_LINK_IN(RAMABLE_REGION)
 
 	SECTION_PROLOGUE (initlevel, (OPTIONAL),)

include/section_tags.h

@@ -32,9 +32,6 @@
 #define __scs_section  __in_section(SCS_SECTION, _FILE_PATH_HASH, __COUNTER__)
 #define __scp_section  __in_section(SCP_SECTION, _FILE_PATH_HASH, __COUNTER__)
 
-#define __isr_table_section __in_section(ISR_TABLE_SECTION, _FILE_PATH_HASH, \
-				      __COUNTER__)
-
 #define __irq_vector_table  __in_section(IRQ_VECTOR_TABLE, _FILE_PATH_HASH, \
 				      __COUNTER__)
 
@@ -51,9 +48,6 @@
 	#define __irq_vector_table \
 		__in_section(IRQ_VECTOR_TABLE, _FILE_PATH_HASH, __COUNTER__)
 
-	#define __isr_table_section \
-		__in_section(ISR_TABLE_SECTION, _FILE_PATH_HASH, __COUNTER__)
-
 #endif /* CONFIG_ARC */
 
 #endif /* !_ASMLANGUAGE */

include/sections.h

@@ -53,12 +53,6 @@
 #define SCS_SECTION scs
 #define SCP_SECTION scp
 
-#ifdef CONFIG_SW_ISR_TABLE_DYNAMIC
-#define ISR_TABLE_SECTION  DATA
-#else  /* !CONFIG_SW_ISR_TABLE_DYNAMIC */
-#define ISR_TABLE_SECTION  RODATA
-#endif /* CONFIG_SW_ISR_TABLE_DYNAMIC */
-
 #define SECURITY_FRDM_K64F  security_frdm_k64f
 #define IRQ_VECTOR_TABLE    irq_vector_table
 
@@ -68,12 +62,6 @@
 
 #elif defined(CONFIG_ARC)
 
-	#ifdef CONFIG_SW_ISR_TABLE_DYNAMIC
-		#define ISR_TABLE_SECTION  DATA
-	#else
-		#define ISR_TABLE_SECTION  RODATA
-	#endif
-
 	#define IRQ_VECTOR_TABLE irq_vector_table
 
 #endif

samples/microkernel/test/test_task_irq/prj_arm.conf

@@ -1,6 +1,6 @@
 # Let stack canaries use non-random number generator.
 # This option is NOT to be used in production code.
 CONFIG_TEST_RANDOM_GENERATOR=y
-
+CONFIG_SW_ISR_TABLE_DYNAMIC=y
 CONFIG_MAX_NUM_TASK_IRQS=5
 CONFIG_NUM_IRQS=4