diff --git a/drivers/usb/device/usb_dc_stm32.c b/drivers/usb/device/usb_dc_stm32.c
index ad33ba6f72f..78e8e80a3df 100644
--- a/drivers/usb/device/usb_dc_stm32.c
+++ b/drivers/usb/device/usb_dc_stm32.c
@@ -427,7 +427,7 @@ int usb_dc_attach(void)
 	 * For STM32F0 series SoCs on QFN28 and TSSOP20 packages enable PIN
 	 * pair PA11/12 mapped instead of PA9/10 (e.g. stm32f070x6)
 	 */
-#if defined(CONFIG_SOC_SERIES_STM32F0X) && defined(SYSCFG_CFGR1_PA11_PA12_RMP)
+#if defined(DT_USB_ENABLE_PIN_REMAP)
 	if (LL_APB1_GRP2_IsEnabledClock(LL_APB1_GRP2_PERIPH_SYSCFG)) {
 		LL_SYSCFG_EnablePinRemap();
 	} else {
diff --git a/dts/bindings/usb/st,stm32-usb.yaml b/dts/bindings/usb/st,stm32-usb.yaml
index 45cb3b7e9c4..e43d52d2238 100644
--- a/dts/bindings/usb/st,stm32-usb.yaml
+++ b/dts/bindings/usb/st,stm32-usb.yaml
@@ -53,4 +53,11 @@ properties:
       category: optional
       generation: define
       description: PHY provider specifier
+
+    enable-pin-remap:
+      type: boolean
+      category: optional
+      description: For STM32F0 series SoCs on QFN28 and TSSOP20 packages
+                   enable PIN pair PA11/12 mapped instead of PA9/10 (e.g. stm32f070x6)
+      generation: define, use-prop-name
 ...
diff --git a/soc/arm/st_stm32/stm32f0/dts_fixup.h b/soc/arm/st_stm32/stm32f0/dts_fixup.h
index 8ae7889b0cf..e6eaa8330ad 100644
--- a/soc/arm/st_stm32/stm32f0/dts_fixup.h
+++ b/soc/arm/st_stm32/stm32f0/dts_fixup.h
@@ -125,6 +125,10 @@
 #define DT_USB_NUM_BIDIR_ENDPOINTS		DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
 #define DT_USB_RAM_SIZE			DT_ST_STM32_USB_40005C00_RAM_SIZE
 
+#ifdef DT_ST_STM32_USB_40005C00_ENABLE_PIN_REMAP
+#define DT_USB_ENABLE_PIN_REMAP			DT_ST_STM32_USB_40005C00_ENABLE_PIN_REMAP
+#endif /* ST_STM32_USB_40005C00_ENABLE_PIN_REMAP */
+
 #define DT_PWM_STM32_1_DEV_NAME             DT_ST_STM32_PWM_40012C00_PWM_LABEL
 #define DT_PWM_STM32_1_PRESCALER            DT_ST_STM32_PWM_40012C00_PWM_ST_PRESCALER
 #define DT_TIM_STM32_1_BASE_ADDRESS	DT_ST_STM32_TIMERS_40012C00_BASE_ADDRESS