doc: services: debugging: Add documentation for MIPI STP decoder
Add section about MIPI STP decoder. Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
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coredump.rst
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gdbstub.rst
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debugmon.rst
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mipi_stp_decoder.rst
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doc/services/debugging/mipi_stp_decoder.rst
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doc/services/debugging/mipi_stp_decoder.rst
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.. _mipi_stp_decoder:
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MIPI STP Decoder
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################
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The MIPI System Trace Protocol (MIPI STP) was developed as a generic base protocol that can
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be shared by multiple application-specific trace protocols. It serves as a wrapper protocol
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that merges disparate streams that typically contain different trace protocols from different
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trace sources. Stream consists of opcode (shortest is 4 bit long) followed by optional data and
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optional timestamp. There are opcodes for data (8, 16, 32, 64 bit data marked/not marked, with or
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without timestamp), stream recognition (master and channel), synchronization (ASYNC opcode) and
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others.
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One example where protocol is used is ARM Coresight STM (System Trace Macrocell) where data
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written to Stimulus Port registers maps directly to STP stream.
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This module can be used to perform on-chip decoding of the data stream. STP v2 is used.
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Usage
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#####
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Decoder is initialized with a callback. A callback is called on each decoded opcode.
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Decoder has internal state since there are dependency between opcodes (e.g. timestamp can be
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relative). Decoder can be in synchronization or not. Initial state is configurable.
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If decoder is not synchronized to the stream then it decodes each nibble in search for ASYNC opcode.
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Loss of synchronization can be indicated to the decoder by calling
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:c:func:`mipi_stp_decoder_sync_loss`. :c:func:`mipi_stp_decoder_decode` is used to decode the data.
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Limitations
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###########
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There are following limitations:
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* Decoder supports only little endian architectures.
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* When decoding nibbles, it is more efficient when core supports unaligned memory access.
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Implementation supports optimized version with unaligned memory access and generic one.
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Optimized version is used for ARM Cortex-M (expect for M0).
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* Limited set of the most common opcodes is implemented.
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API documentation
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*****************
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.. doxygengroup:: mipi_stp_decoder_apis
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