rtc: Remove old rtc functionality

Remove the old rtc functionality as its been deprecated for 2 releases
now.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2019-09-10 08:34:56 -05:00 committed by Kumar Gala
commit 29e55d74e8
69 changed files with 4 additions and 1259 deletions

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# SPDX-License-Identifier: Apache-2.0
zephyr_library()
zephyr_library_sources_ifdef(CONFIG_RTC_MCUX rtc_mcux.c)
zephyr_library_sources_ifdef(CONFIG_RTC_STM32 rtc_ll_stm32.c)

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# Kconfig - RTC configuration options
#
#
# Copyright (c) 2015 Intel Corporation
#
# SPDX-License-Identifier: Apache-2.0
#
#
# Real-Time Clock (RTC) options
#
menuconfig RTC
bool "Real-Time Clock"
help
Enable options for Real-Time Clock drivers.
if RTC
module = RTC
module-str = rtc
source "subsys/logging/Kconfig.template.log_config"
config RTC_0_NAME
string "Driver instance name"
default "RTC_0"
depends on !HAS_DTS
help
RTC driver instance name
comment "RTC drivers"
source "drivers/rtc/Kconfig.mcux_rtc"
source "drivers/rtc/Kconfig.stm32_rtc"
endif # RTC

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# Kconfig - MCUXpresso SDK RTC
#
# Copyright (c) 2018, blik GmbH
#
# SPDX-License-Identifier: Apache-2.0
#
menuconfig RTC_MCUX
bool "MCUX RTC driver"
depends on HAS_MCUX_RTC
help
Enable support for mcux rtc driver.

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# Kconfig - STM32 RTC configuration options
#
# Copyright (c) 2018 Workaround GmbH
# Copyright (c) 2018 Allterco Robotics
#
# SPDX-License-Identifier: Apache-2.0
#
config RTC_STM32
bool "STM32 RTC Driver"
depends on SOC_FAMILY_STM32
select USE_STM32_LL_RTC
select USE_STM32_LL_PWR
select USE_STM32_LL_RCC
select USE_STM32_LL_EXTI
select NEWLIB_LIBC
help
Build RTC driver for STM32 SoCs. Tested on STM32 F3, F4, L4, F7 series.
choice RTC_STM32_CLOCK_SRC
bool "RTC clock source"
depends on RTC_STM32
config RTC_STM32_CLOCK_LSI
bool "LSI"
help
Use LSI as RTC clock
config RTC_STM32_CLOCK_LSE
bool "LSE"
help
Use LSE as RTC clock
endchoice #RTC_STM32_CLOCK_SRC
choice RTC_STM32_LSE_DRIVE
prompt "LSE oscillator drive capability"
depends on RTC_STM32_CLOCK_LSE
config RTC_STM32_LSE_DRIVE_LOW
bool "Low"
help
Xtal mode lower driving capability
config RTC_STM32_LSE_DRIVE_MEDIUMLOW
bool "Medium Low"
help
Xtal mode medium low driving capability
config RTC_STM32_LSE_DRIVE_MEDIUMHIGH
bool "Medium High"
help
Xtal mode medium high driving capability
config RTC_STM32_LSE_DRIVE_HIGH
bool "High"
help
Xtal mode higher driving capability
endchoice
config RTC_STM32_LSE_DRIVE_STRENGTH
hex
default 0x00000000 if RTC_STM32_LSE_DRIVE_LOW
default 0x00000008 if RTC_STM32_LSE_DRIVE_MEDIUMLOW
default 0x00000010 if RTC_STM32_LSE_DRIVE_MEDIUMHIGH
default 0x00000018 if RTC_STM32_LSE_DRIVE_HIGH

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/*
* Copyright (c) 2017 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <syscall_handler.h>
#include <drivers/rtc.h>
static inline u32_t z_vrfy_rtc_read(struct device *dev)
{
Z_OOPS(Z_SYSCALL_DRIVER_RTC(dev, read));
return z_impl_rtc_read((struct device *)dev);
}
static inline void z_vrfy_rtc_enable(struct device *dev)
{
Z_OOPS(Z_SYSCALL_DRIVER_RTC(dev, enable));
z_impl_rtc_enable((struct device *)dev);
return 0;
}
static inline void z_vrfy_rtc_disable(struct device *dev)
{
Z_OOPS(Z_SYSCALL_DRIVER_RTC(dev, disable));
z_impl_rtc_disable((struct device *)dev);
return 0;
}
static inline int z_vrfy_rtc_set_alarm(struct device *dev,
const u32_t alarm_val)
{
Z_OOPS(Z_SYSCALL_DRIVER_RTC(dev, set_alarm));
return z_impl_rtc_set_alarm((struct device *)dev, alarm_val);
}
static inline int z_vrfy_rtc_get_pending_int(struct device *dev)
{
Z_OOPS(Z_SYSCALL_DRIVER_RTC(dev, get_pending_int));
return z_impl_rtc_get_pending_int((struct device *)dev);
}
#include <syscalls/rtc_read_mrsh.c>
#include <syscalls/rtc_enable_mrsh.c>
#include <syscalls/rtc_disable_mrsh.c>
#include <syscalls/rtc_set_alarm_mrsh.c>
#include <syscalls/rtc_get_pending_int_mrsh.c>

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/*
* Copyright (c) 2018 Workaround GmbH
* Copyright (c) 2018 Allterco Robotics
*
* SPDX-License-Identifier: Apache-2.0
*
* Source file for the STM32 RTC driver
*
*/
#include <time.h>
#include <clock_control/stm32_clock_control.h>
#include <drivers/clock_control.h>
#include <sys/util.h>
#include <kernel.h>
#include <soc.h>
#include <drivers/rtc.h>
#if defined(CONFIG_SOC_SERIES_STM32L4X)
#define EXTI_LINE LL_EXTI_LINE_18
#elif defined(CONFIG_SOC_SERIES_STM32F4X) \
|| defined(CONFIG_SOC_SERIES_STM32F3X) \
|| defined(CONFIG_SOC_SERIES_STM32F7X)
#define EXTI_LINE LL_EXTI_LINE_17
#endif
#define EPOCH_OFFSET 946684800
struct rtc_stm32_config {
struct stm32_pclken pclken;
LL_RTC_InitTypeDef ll_rtc_config;
};
struct rtc_stm32_data {
void (*cb_fn)(struct device *dev);
struct k_sem sem;
};
#define DEV_DATA(dev) ((struct rtc_stm32_data *const)(dev)->driver_data)
#define DEV_SEM(dev) (&DEV_DATA(dev)->sem)
#define DEV_CFG(dev) \
((const struct rtc_stm32_config * const)(dev)->config->config_info)
static int rtc_stm32_set_alarm(struct device *dev, const u32_t alarm_val);
static void rtc_stm32_irq_config(struct device *dev);
static void rtc_stm32_enable(struct device *dev)
{
LL_RCC_EnableRTC();
}
static void rtc_stm32_disable(struct device *dev)
{
LL_RCC_DisableRTC();
}
static u32_t rtc_stm32_read(struct device *dev)
{
struct tm now = { 0 };
time_t ts;
u32_t rtc_date, rtc_time;
/* Read time and date registers */
rtc_time = LL_RTC_TIME_Get(RTC);
rtc_date = LL_RTC_DATE_Get(RTC);
/* Convert calendar datetime to UNIX timestamp */
now.tm_year = 100 + __LL_RTC_CONVERT_BCD2BIN(
__LL_RTC_GET_YEAR(rtc_date));
/* tm_mon starts from 0 */
now.tm_mon = __LL_RTC_CONVERT_BCD2BIN(__LL_RTC_GET_MONTH(rtc_date)) - 1;
now.tm_mday = __LL_RTC_CONVERT_BCD2BIN(__LL_RTC_GET_DAY(rtc_date));
now.tm_hour = __LL_RTC_CONVERT_BCD2BIN(__LL_RTC_GET_HOUR(rtc_time));
now.tm_min = __LL_RTC_CONVERT_BCD2BIN(__LL_RTC_GET_MINUTE(rtc_time));
now.tm_sec = __LL_RTC_CONVERT_BCD2BIN(__LL_RTC_GET_SECOND(rtc_time));
ts = mktime(&now);
/* Return number of seconds since 2000-01-01 00:00:00 */
ts -= EPOCH_OFFSET;
return (u32_t)ts;
}
static int rtc_stm32_set_alarm(struct device *dev, const u32_t alarm_val)
{
struct tm alarm_tm;
time_t alarm_ts;
LL_RTC_AlarmTypeDef rtc_alarm;
u32_t now = rtc_stm32_read(dev);
/* The longest period we can match for universally is the
duration of the shortest month */
if ((alarm_val - now) > (RTC_ALARM_DAY * 28)) {
return -ENOTSUP;
}
/* Convert seconds since 2000-01-01 00:00:00 to calendar datetime */
alarm_ts = alarm_val;
alarm_ts += EPOCH_OFFSET;
gmtime_r(&alarm_ts, &alarm_tm);
/* Apply ALARM_A */
rtc_alarm.AlarmTime.TimeFormat = LL_RTC_TIME_FORMAT_AM_OR_24;
rtc_alarm.AlarmTime.Hours = alarm_tm.tm_hour;
rtc_alarm.AlarmTime.Minutes = alarm_tm.tm_min;
rtc_alarm.AlarmTime.Seconds = alarm_tm.tm_sec;
rtc_alarm.AlarmMask = LL_RTC_ALMA_MASK_NONE;
rtc_alarm.AlarmDateWeekDaySel = LL_RTC_ALMA_DATEWEEKDAYSEL_DATE;
rtc_alarm.AlarmDateWeekDay = alarm_tm.tm_mday;
LL_RTC_DisableWriteProtection(RTC);
LL_RTC_ALMA_Disable(RTC);
if (LL_RTC_ALMA_Init(RTC, LL_RTC_FORMAT_BIN, &rtc_alarm) != SUCCESS) {
return -EIO;
}
LL_RTC_DisableWriteProtection(RTC);
LL_RTC_ALMA_Enable(RTC);
LL_RTC_ClearFlag_ALRA(RTC);
LL_RTC_EnableIT_ALRA(RTC);
LL_RTC_EnableWriteProtection(RTC);
return 0;
}
static int rtc_stm32_set_config(struct device *dev, struct rtc_config *cfg)
{
int result = 0;
time_t init_ts = 0;
struct tm init_tm = { 0 };
LL_RTC_DateTypeDef rtc_date = { 0 };
LL_RTC_TimeTypeDef rtc_time = { 0 };
/* Convert seconds since 2000-01-01 00:00:00 to calendar datetime */
init_ts = cfg->init_val;
init_ts += EPOCH_OFFSET;
gmtime_r(&init_ts, &init_tm);
rtc_date.Year = init_tm.tm_year % 100;
/* tm_mon starts from 0 */
rtc_date.Month = init_tm.tm_mon + 1;
rtc_date.Day = init_tm.tm_mday;
rtc_date.WeekDay = init_tm.tm_wday + 1;
rtc_time.TimeFormat = LL_RTC_TIME_FORMAT_AM_OR_24;
rtc_time.Hours = init_tm.tm_hour;
rtc_time.Minutes = init_tm.tm_min;
rtc_time.Seconds = init_tm.tm_sec;
k_sem_take(DEV_SEM(dev), K_FOREVER);
if (cfg->cb_fn != NULL) {
DEV_DATA(dev)->cb_fn = cfg->cb_fn;
}
if (LL_RTC_DATE_Init(RTC, LL_RTC_FORMAT_BIN, &rtc_date) != SUCCESS) {
result = -EIO;
goto fin;
}
if (LL_RTC_TIME_Init(RTC, LL_RTC_FORMAT_BIN, &rtc_time) != SUCCESS) {
result = -EIO;
goto fin;
}
if (cfg->alarm_enable) {
rtc_stm32_set_alarm(dev, cfg->alarm_val);
}
fin:
k_sem_give(DEV_SEM(dev));
return result;
}
static u32_t rtc_stm32_get_pending_int(struct device *dev)
{
return LL_RTC_IsActiveFlag_ALRA(RTC) != 0;
}
void rtc_stm32_isr(void *arg)
{
struct device *const dev = (struct device *)arg;
if (LL_RTC_IsActiveFlag_ALRA(RTC) != 0) {
if (DEV_DATA(dev)->cb_fn != NULL) {
DEV_DATA(dev)->cb_fn(dev);
}
LL_RTC_ClearFlag_ALRA(RTC);
LL_RTC_DisableIT_ALRA(RTC);
}
LL_EXTI_ClearFlag_0_31(EXTI_LINE);
}
static int rtc_stm32_init(struct device *dev)
{
struct device *clk = device_get_binding(STM32_CLOCK_CONTROL_NAME);
const struct rtc_stm32_config *cfg = DEV_CFG(dev);
__ASSERT_NO_MSG(clk);
k_sem_init(DEV_SEM(dev), 1, UINT_MAX);
DEV_DATA(dev)->cb_fn = NULL;
if (clock_control_on(clk,
(clock_control_subsys_t *) &cfg->pclken) != 0) {
return -EIO;
}
LL_PWR_EnableBkUpAccess();
LL_RCC_ForceBackupDomainReset();
LL_RCC_ReleaseBackupDomainReset();
#if defined(CONFIG_RTC_STM32_CLOCK_LSI)
LL_RCC_LSI_Enable();
while (LL_RCC_LSI_IsReady() != 1) {
}
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSI);
#else /* CONFIG_RTC_STM32_CLOCK_LSE */
LL_RCC_LSE_SetDriveCapability(CONFIG_RTC_STM32_LSE_DRIVE_STRENGTH);
LL_RCC_LSE_Enable();
/* Wait until LSE is ready */
while (LL_RCC_LSE_IsReady() != 1) {
}
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
#endif
LL_RCC_EnableRTC();
if (LL_RTC_DeInit(RTC) != SUCCESS) {
return -EIO;
}
if (LL_RTC_Init(RTC, ((LL_RTC_InitTypeDef *)
&cfg->ll_rtc_config)) != SUCCESS) {
return -EIO;
}
LL_RTC_EnableShadowRegBypass(RTC);
LL_EXTI_EnableIT_0_31(EXTI_LINE);
LL_EXTI_EnableRisingTrig_0_31(EXTI_LINE);
rtc_stm32_irq_config(dev);
return 0;
}
static struct rtc_stm32_data rtc_data;
static const struct rtc_stm32_config rtc_config = {
.pclken = {
.enr = LL_APB1_GRP1_PERIPH_PWR,
.bus = STM32_CLOCK_BUS_APB1,
},
.ll_rtc_config = {
.HourFormat = LL_RTC_HOURFORMAT_24HOUR,
#if defined(CONFIG_RTC_STM32_CLOCK_LSI)
/* prescaler values for LSI @ 32 KHz */
.AsynchPrescaler = 0x7F,
.SynchPrescaler = 0x00F9,
#else /* CONFIG_RTC_STM32_CLOCK_LSE */
/* prescaler values for LSE @ 32768 Hz */
.AsynchPrescaler = 0x7F,
.SynchPrescaler = 0x00FF,
#endif
},
};
static const struct rtc_driver_api rtc_api = {
.enable = rtc_stm32_enable,
.disable = rtc_stm32_disable,
.read = rtc_stm32_read,
.set_config = rtc_stm32_set_config,
.set_alarm = rtc_stm32_set_alarm,
.get_pending_int = rtc_stm32_get_pending_int,
};
DEVICE_AND_API_INIT(rtc_stm32, CONFIG_RTC_0_NAME, &rtc_stm32_init,
&rtc_data, &rtc_config, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &rtc_api);
static void rtc_stm32_irq_config(struct device *dev)
{
IRQ_CONNECT(DT_RTC_0_IRQ, DT_RTC_0_IRQ_PRI,
rtc_stm32_isr, DEVICE_GET(rtc_stm32), 0);
irq_enable(DT_RTC_0_IRQ);
}

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/*
* Copyright (c) 2018 blik GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
#define LOG_LEVEL CONFIG_RTC_LOG_LEVEL
#include <logging/log.h>
LOG_MODULE_REGISTER(rtc_mcux);
#include <errno.h>
#include <device.h>
#include <init.h>
#include <kernel.h>
#include <drivers/rtc.h>
#include <power/power.h>
#include <soc.h>
#include <sys/util.h>
#include <fsl_rtc.h>
struct mcux_rtc_config {
RTC_Type *base;
void (*irq_config_func)(struct device *dev);
};
struct mcux_rtc_data {
struct k_sem sync;
rtc_config_t config;
/* callback information */
void (*callback)(void *data);
void *callback_data;
};
static void mcux_rtc_enable(struct device *dev)
{
const struct mcux_rtc_config *config = dev->config->config_info;
RTC_StartTimer(config->base);
RTC_EnableInterrupts(config->base,
kRTC_AlarmInterruptEnable |
kRTC_TimeOverflowInterruptEnable |
kRTC_TimeInvalidInterruptEnable);
}
static void mcux_rtc_disable(struct device *dev)
{
const struct mcux_rtc_config *config = dev->config->config_info;
RTC_DisableInterrupts(config->base,
kRTC_AlarmInterruptEnable |
kRTC_TimeOverflowInterruptEnable |
kRTC_TimeInvalidInterruptEnable);
RTC_StopTimer(config->base);
/* clear out any set alarms */
config->base->TAR = 0;
}
static int mcux_rtc_set_alarm(struct device *dev, const u32_t alarm_val)
{
const struct mcux_rtc_config *config = dev->config->config_info;
if (alarm_val < config->base->TSR) {
LOG_ERR("alarm cannot be earlier than current time");
return -EINVAL;
}
config->base->TAR = alarm_val;
return 0;
}
static int mcux_rtc_set_config(struct device *dev, struct rtc_config *cfg)
{
const struct mcux_rtc_config *config = dev->config->config_info;
struct mcux_rtc_data *data = dev->driver_data;
int ret = 0;
/* only allow one modifier at a time */
k_sem_take(&data->sync, K_FOREVER);
if (cfg->alarm_enable) {
/* set up callback information */
data->callback = (void *) cfg->cb_fn;
data->callback_data = dev;
RTC_StopTimer(config->base);
config->base->TSR = cfg->init_val;
RTC_StartTimer(config->base);
ret = mcux_rtc_set_alarm(dev, cfg->alarm_val);
} else {
/* clear any existing alarm setting */
config->base->TAR = 0;
/* clear callbacks */
data->callback = NULL;
data->callback_data = NULL;
}
k_sem_give(&data->sync);
return ret;
}
static u32_t mcux_rtc_read(struct device *dev)
{
const struct mcux_rtc_config *config = dev->config->config_info;
u32_t val = config->base->TSR;
/*
* Read TSR seconds twice in case it glitches during an update.
* This can happen when a read occurs at the time the register is
* incrementing.
*/
if (config->base->TSR == val) {
return val;
}
val = config->base->TSR;
return val;
}
static u32_t mcux_rtc_get_pending_int(struct device *dev)
{
const struct mcux_rtc_config *config = dev->config->config_info;
return RTC_GetStatusFlags(config->base) & RTC_SR_TAF_MASK;
}
static const struct rtc_driver_api mcux_rtc_driver_api = {
.enable = mcux_rtc_enable,
.disable = mcux_rtc_disable,
.read = mcux_rtc_read,
.set_config = mcux_rtc_set_config,
.set_alarm = mcux_rtc_set_alarm,
.get_pending_int = mcux_rtc_get_pending_int,
};
static void mcux_rtc_isr(void *arg)
{
struct device *dev = arg;
const struct mcux_rtc_config *config = dev->config->config_info;
struct mcux_rtc_data *data = dev->driver_data;
/* perform any registered callbacks */
if (data->callback) {
data->callback(data->callback_data);
}
/*
* Clear any conditions to ack the IRQ
*
* callback may have already reset the alarm flag if a new
* alarm value was programmed to the TAR
*/
RTC_StopTimer(config->base);
if (RTC_GetStatusFlags(config->base) & RTC_SR_TAF_MASK) {
RTC_ClearStatusFlags(config->base, kRTC_AlarmFlag);
} else if (RTC_GetStatusFlags(config->base) & RTC_SR_TIF_MASK) {
RTC_ClearStatusFlags(config->base, kRTC_TimeInvalidFlag);
} else if (RTC_GetStatusFlags(config->base) & RTC_SR_TOF_MASK) {
RTC_ClearStatusFlags(config->base, kRTC_TimeOverflowFlag);
}
RTC_StartTimer(config->base);
}
static int mcux_rtc_init(struct device *dev)
{
const struct mcux_rtc_config *config = dev->config->config_info;
struct mcux_rtc_data *data = dev->driver_data;
k_sem_init(&data->sync, 1, UINT_MAX);
/* Create default configuration and store it off */
RTC_GetDefaultConfig(&data->config);
RTC_Init(config->base, &data->config);
/* Enable 32kHz oscillator and wait for 1ms to settle */
config->base->CR |= 0x100;
k_busy_wait(USEC_PER_MSEC);
/* connect and enable the IRQ line */
config->irq_config_func(dev);
return 0;
}
static struct mcux_rtc_data rtc_mcux_data_0;
static void rtc_mcux_irq_config_0(struct device *dev);
static struct mcux_rtc_config rtc_mcux_config_0 = {
.base = (RTC_Type *)DT_RTC_MCUX_0_BASE_ADDRESS,
.irq_config_func = rtc_mcux_irq_config_0,
};
DEVICE_DEFINE(rtc, DT_RTC_MCUX_0_NAME,
&mcux_rtc_init, NULL, &rtc_mcux_data_0, &rtc_mcux_config_0,
POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&mcux_rtc_driver_api);
static void rtc_mcux_irq_config_0(struct device *dev)
{
IRQ_CONNECT(DT_RTC_MCUX_0_IRQ, DT_RTC_MCUX_0_IRQ_PRI,
mcux_rtc_isr, DEVICE_GET(rtc), 0);
irq_enable(DT_RTC_MCUX_0_IRQ);
}