michaelh/zephyr
1
0
Fork 0
Code Releases Activity

dts: nxp_rw6xx: Add Power Domain Support

Browse source 
This is required to re-initialize the peripherals on
exit from Power Mode 3.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This commit is contained in:
Mahesh Mahadevan 2025-01-30 17:13:44 -06:00 • committed by Benjamin Cabé
commit 296716c850
1 changed files with 33 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

33
dts/arm/nxp/nxp_rw6xx_common.dtsi
View file

@ -83,6 +83,11 @@
ranges = <0x0 0x443C0000 DT_SIZE_K(140)>; ranges = <0x0 0x443C0000 DT_SIZE_K(140)>;
}; };
power_mode3_domain: power_mode3_domain {
compatible = "power-domain-soc-state-change";
onoff-power-states = <&standby>;
#power-domain-cells = <0>;
};
}; };
&sram { &sram {
@ -189,6 +194,7 @@
reg = <0x14000 0x1000>; reg = <0x14000 0x1000>;
status = "okay"; status = "okay";
interrupts = <123 0>; interrupts = <123 0>;
power-domains = <&power_mode3_domain>;
}; };
wwdt: watchdog@e000 { wwdt: watchdog@e000 {
@ -211,6 +217,7 @@
#gpio-cells = <2>; #gpio-cells = <2>;
reg = <0>; reg = <0>;
int-source = "pint"; int-source = "pint";
power-domains = <&power_mode3_domain>;
}; };
hsgpio1: gpio@1 { hsgpio1: gpio@1 {
@ -219,6 +226,7 @@
#gpio-cells = <2>; #gpio-cells = <2>;
reg = <1>; reg = <1>;
int-source = "pint"; int-source = "pint";
power-domains = <&power_mode3_domain>;
}; };
}; };
@ -228,6 +236,7 @@
interrupts = <50 1>; interrupts = <50 1>;
interrupt-names = "usb_otg"; interrupt-names = "usb_otg";
num-bidir-endpoints = <8>; num-bidir-endpoints = <8>;
power-domains = <&power_mode3_domain>;
status = "disabled"; status = "disabled";
}; };
@ -240,6 +249,7 @@
dmas = <&dma0 0>, <&dma0 1>; dmas = <&dma0 0>, <&dma0 1>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
zephyr,disabling-power-states = <&suspend &standby>; zephyr,disabling-power-states = <&suspend &standby>;
power-domains = <&power_mode3_domain>;
status = "disabled"; status = "disabled";
}; };
@ -252,6 +262,7 @@
dmas = <&dma0 2>, <&dma0 3>; dmas = <&dma0 2>, <&dma0 3>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
zephyr,disabling-power-states = <&suspend &standby>; zephyr,disabling-power-states = <&suspend &standby>;
power-domains = <&power_mode3_domain>;
status = "disabled"; status = "disabled";
}; };
@ -264,6 +275,7 @@
dmas = <&dma0 4>, <&dma0 5>; dmas = <&dma0 4>, <&dma0 5>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
zephyr,disabling-power-states = <&suspend &standby>; zephyr,disabling-power-states = <&suspend &standby>;
power-domains = <&power_mode3_domain>;
status = "disabled"; status = "disabled";
}; };
@ -276,6 +288,7 @@
dmas = <&dma0 6>, <&dma0 7>; dmas = <&dma0 6>, <&dma0 7>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
zephyr,disabling-power-states = <&suspend &standby>; zephyr,disabling-power-states = <&suspend &standby>;
power-domains = <&power_mode3_domain>;
status = "disabled"; status = "disabled";
}; };
@ -288,6 +301,7 @@
dmas = <&dma0 26>, <&dma0 27>; dmas = <&dma0 26>, <&dma0 27>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
zephyr,disabling-power-states = <&suspend &standby>; zephyr,disabling-power-states = <&suspend &standby>;
power-domains = <&power_mode3_domain>;
status = "disabled"; status = "disabled";
}; };
@ -319,6 +333,7 @@
compatible = "nxp,wifi"; compatible = "nxp,wifi";
/* first index is the imu interrupt, the second is the wakeup done interrupt */ /* first index is the imu interrupt, the second is the wakeup done interrupt */
interrupts = <72 2>, <64 2>; interrupts = <72 2>, <64 2>;
power-domains = <&power_mode3_domain>;
}; };
dma0: dma-controller@104000 { dma0: dma-controller@104000 {
@ -328,6 +343,7 @@
status = "disabled"; status = "disabled";
#dma-cells = <1>; #dma-cells = <1>;
dma-channels = <33>; dma-channels = <33>;
power-domains = <&power_mode3_domain>;
}; };
lcdic: lcdic@128000 { lcdic: lcdic@128000 {
@ -339,6 +355,7 @@
#size-cells = <0>; #size-cells = <0>;
clocks = <&clkctl1 MCUX_LCDIC_CLK>; clocks = <&clkctl1 MCUX_LCDIC_CLK>;
dmas = <&dma0 0>; dmas = <&dma0 0>;
power-domains = <&power_mode3_domain>;
}; };
rtc: rtc@30000 { rtc: rtc@30000 {
@ -362,6 +379,7 @@
mode = <0>; mode = <0>;
input = <0>; input = <0>;
prescale = <0>; prescale = <0>;
power-domains = <&power_mode3_domain>;
}; };
ctimer1: ctimer@29000 { ctimer1: ctimer@29000 {
@ -374,6 +392,7 @@
mode = <0>; mode = <0>;
input = <0>; input = <0>;
prescale = <0>; prescale = <0>;
power-domains = <&power_mode3_domain>;
}; };
ctimer2: ctimer@2a000 { ctimer2: ctimer@2a000 {
@ -386,6 +405,7 @@
mode = <0>; mode = <0>;
input = <0>; input = <0>;
prescale = <0>; prescale = <0>;
power-domains = <&power_mode3_domain>;
}; };
ctimer3: ctimer@2b000 { ctimer3: ctimer@2b000 {
@ -398,6 +418,7 @@
mode = <0>; mode = <0>;
input = <0>; input = <0>;
prescale = <0>; prescale = <0>;
power-domains = <&power_mode3_domain>;
}; };
sctimer: pwm@146000 { sctimer: pwm@146000 {
@ -408,6 +429,7 @@
status = "disabled"; status = "disabled";
prescaler = <8>; prescaler = <8>;
#pwm-cells = <3>; #pwm-cells = <3>;
power-domains = <&power_mode3_domain>;
}; };
mrt0: mrt@2d000 { mrt0: mrt@2d000 {
@ -420,6 +442,7 @@
resets = <&rstctl1 NXP_SYSCON_RESET(2, 8)>; resets = <&rstctl1 NXP_SYSCON_RESET(2, 8)>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
power-domains = <&power_mode3_domain>;
mrt0_channel0: mrt0_channel@0 { mrt0_channel0: mrt0_channel@0 {
compatible = "nxp,mrt-channel"; compatible = "nxp,mrt-channel";
@ -453,6 +476,7 @@
resets = <&rstctl0 NXP_SYSCON_RESET(2, 26)>; resets = <&rstctl0 NXP_SYSCON_RESET(2, 26)>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
power-domains = <&power_mode3_domain>;
mrt1_channel0: mrt1_channel@0 { mrt1_channel0: mrt1_channel@0 {
compatible = "nxp,mrt-channel"; compatible = "nxp,mrt-channel";
@ -484,6 +508,7 @@
interrupts = <25 0>; interrupts = <25 0>;
status = "disabled"; status = "disabled";
clocks = <&clkctl1 MCUX_DMIC_CLK>; clocks = <&clkctl1 MCUX_DMIC_CLK>;
power-domains = <&power_mode3_domain>;
pdmc0: dmic-channel@0 { pdmc0: dmic-channel@0 {
reg = <0>; reg = <0>;
@ -521,6 +546,7 @@
interrupts = <112 0>; interrupts = <112 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
power-domains = <&power_mode3_domain>;
}; };
adc1: gau_adc1@38100 { adc1: gau_adc1@38100 {
@ -529,6 +555,7 @@
interrupts = <111 0>; interrupts = <111 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <1>; #io-channel-cells = <1>;
power-domains = <&power_mode3_domain>;
}; };
dac0: dac@38200 { dac0: dac@38200 {
@ -537,6 +564,7 @@
interrupts = <108 0>; interrupts = <108 0>;
status = "disabled"; status = "disabled";
#io-channel-cells = <0>; #io-channel-cells = <0>;
power-domains = <&power_mode3_domain>;
}; };
}; };
@ -555,12 +583,14 @@
hci: hci_ble { hci: hci_ble {
compatible = "nxp,hci-ble"; compatible = "nxp,hci-ble";
power-domains = <&power_mode3_domain>;
}; };
hdlc_rcp_if: hdlc_rcp_if { hdlc_rcp_if: hdlc_rcp_if {
compatible = "nxp,hdlc-rcp-if"; compatible = "nxp,hdlc-rcp-if";
interrupts = <90 2>, <82 2>; interrupts = <90 2>, <82 2>;
interrupt-names = "hdlc_rcp_if_int", "wakeup_int"; interrupt-names = "hdlc_rcp_if_int", "wakeup_int";
power-domains = <&power_mode3_domain>;
}; };
enet: enet@138000 { enet: enet@138000 {
@ -574,18 +604,21 @@
nxp,mdio = <&enet_mdio>; nxp,mdio = <&enet_mdio>;
nxp,ptp-clock = <&enet_ptp_clock>; nxp,ptp-clock = <&enet_ptp_clock>;
status = "disabled"; status = "disabled";
power-domains = <&power_mode3_domain>;
}; };
enet_mdio: mdio { enet_mdio: mdio {
compatible = "nxp,enet-mdio"; compatible = "nxp,enet-mdio";
status = "disabled"; status = "disabled";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
power-domains = <&power_mode3_domain>;
}; };
enet_ptp_clock: ptp-clock { enet_ptp_clock: ptp-clock {
compatible = "nxp,enet-ptp-clock"; compatible = "nxp,enet-ptp-clock";
interrupts = <116 0>; interrupts = <116 0>;
status = "disabled"; status = "disabled";
clocks = <&clkctl1 MCUX_ENET_PLL>; clocks = <&clkctl1 MCUX_ENET_PLL>;
power-domains = <&power_mode3_domain>;
}; };
}; };
}; };