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serial: k64: Remove the uart_k20 driver

Browse source 
Now that we have a more generic mcux serial driver, remove the uart_k20
driver.

Jira: ZEP-719
Change-Id: I51a3237454140feabbfe18ac2c8ee451e572c7be
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
Maureen Helm 2017-01-11 16:20:06 -06:00 • committed by Kumar Gala
commit 294fdab7bd
10 changed files with 1 additions and 1140 deletions
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1
arch/arm/soc/nxp_kinetis/k6x/Makefile
View file

@ -1,3 +1,2 @@
obj-y += soc_config.o
obj-y += soc.o
obj-y += wdog.o

3
arch/arm/soc/nxp_kinetis/k6x/soc.c
View file

@ -141,8 +141,7 @@ static ALWAYS_INLINE void clkInit(void)
*
* @brief Perform basic hardware initialization
*
* Initialize the interrupt controller device drivers and the
* Kinetis UART device driver.
* Initialize the interrupt controller device drivers.
* Also initialize the timer device driver, if required.
*
* @return 0

31
arch/arm/soc/nxp_kinetis/k6x/soc.h
View file

@ -138,37 +138,6 @@ extern "C" {
#include <misc/util.h>
#include <drivers/rand32.h>
/*
* UART configuration settings
*/
#if defined(CONFIG_UART_K20)
#include <drivers/k20_pcr.h>
#define UART_IRQ_FLAGS 0
#define UART_K20_PORT_0_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ
#define UART_K20_PORT_0_BASE_ADDR 0x4006A000
#define UART_K20_PORT_0_IRQ IRQ_UART0_STATUS
#define UART_K20_PORT_1_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ
#define UART_K20_PORT_1_BASE_ADDR 0x4006B000
#define UART_K20_PORT_1_IRQ IRQ_UART1_STATUS
#define UART_K20_PORT_2_CLK_FREQ BUSCLK_DEFAULT_IOSC_HZ
#define UART_K20_PORT_2_BASE_ADDR 0x4006C000
#define UART_K20_PORT_2_IRQ IRQ_UART2_STATUS
#define UART_K20_PORT_3_CLK_FREQ BUSCLK_DEFAULT_IOSC_HZ
#define UART_K20_PORT_3_BASE_ADDR 0x4006D000
#define UART_K20_PORT_3_IRQ IRQ_UART3_STATUS
#define UART_K20_PORT_4_CLK_FREQ BUSCLK_DEFAULT_IOSC_HZ
#define UART_K20_PORT_4_BASE_ADDR 0x400EA000
#define UART_K20_PORT_4_IRQ IRQ_UART4_STATUS
#endif /* CONFIG_UART_K20 */
/*
* PWM/FTM configuration settings
*/

73
arch/arm/soc/nxp_kinetis/k6x/soc_config.c
View file

@ -1,73 +0,0 @@
/*
* Copyright (c) 2015 Intel Corporation.
* Copyright (c) 2016, Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file Board config file
*/
#include <device.h>
#include <init.h>
#include <kernel.h>
#include "soc.h"
#include <fsl_common.h>
#ifdef CONFIG_UART_K20
#include <uart.h>
#include <console/uart_console.h>
#include <serial/uart_k20_priv.h>
#endif /* CONFIG_UART_K20 */
/*
* UART configuration
*/
#ifdef CONFIG_UART_K20
static int uart_k20_init(struct device *dev)
{
uint32_t scgc4;
ARG_UNUSED(dev);
/* Although it is possible to modify the bits through
* *sim directly, the following code saves about 20 bytes
* of ROM space, compared to direct modification.
*/
scgc4 = SIM->SCGC4;
#ifdef CONFIG_UART_K20_PORT_0
scgc4 |= SIM_SCGC4_UART0(1);
#endif
#ifdef CONFIG_UART_K20_PORT_1
scgc4 |= SIM_SCGC4_UART1(1);
#endif
#ifdef CONFIG_UART_K20_PORT_2
scgc4 |= SIM_SCGC4_UART2(1);
#endif
#ifdef CONFIG_UART_K20_PORT_3
scgc4 |= SIM_SCGC4_UART3(1);
#endif
SIM->SCGC4 = scgc4;
#ifdef CONFIG_UART_K20_PORT_4
SIM->SCGC1 |= SIM_SCGC1_UART4(1);
#endif
return 0;
}
DEVICE_INIT(_uart_k20_init, "", uart_k20_init,
NULL, NULL,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* CONFIG_UART_K20 */

2
drivers/serial/Kconfig
View file

@ -57,8 +57,6 @@ comment "Serial Drivers"
source "drivers/serial/Kconfig.ns16550"
source "drivers/serial/Kconfig.k20"
source "drivers/serial/Kconfig.mcux"
source "drivers/serial/Kconfig.stellaris"

178
drivers/serial/Kconfig.k20
View file

@ -1,178 +0,0 @@
menuconfig UART_K20
bool "K20 serial driver"
default n
select SERIAL_HAS_DRIVER
help
This option enables the K20 serial driver.
This specific driver can be used for the serial hardware
available at the Freescale FRDM K64F board.
# ---------- Port 0 ----------
menuconfig UART_K20_PORT_0
bool "Enable K20 UART Port 0"
default n
depends on UART_K20
help
This tells the driver to configure the UART port at boot, depending on
the additional configure options below.
config UART_K20_PORT_0_NAME
string "Port 0 Device Name"
default "UART_0"
depends on UART_K20_PORT_0
help
This is the device name for UART, and is included in the device
struct.
config UART_K20_PORT_0_IRQ_PRI
int "Port 0 Interrupt Priority"
default 0
depends on UART_K20_PORT_0
help
The interrupt priority for UART port.
config UART_K20_PORT_0_BAUD_RATE
int "Port 0 Baud Rate"
default 0
depends on UART_K20_PORT_0
help
The baud rate for UART port to be set to at boot.
Leave at 0 to skip initialization.
# ---------- Port 1 ----------
menuconfig UART_K20_PORT_1
bool "Enable K20 UART Port 1"
default n
depends on UART_K20
help
This tells the driver to configure the UART port at boot, depending on
the additional configure options below.
config UART_K20_PORT_1_NAME
string "Port 1 Device Name"
default "UART_1"
depends on UART_K20_PORT_1
help
This is the device name for UART, and is included in the device
struct.
config UART_K20_PORT_1_IRQ_PRI
int "Port 1 Interrupt Priority"
default 0
depends on UART_K20_PORT_1
help
The interrupt priority for UART port.
config UART_K20_PORT_1_BAUD_RATE
int "Port 1 Baud Rate"
default 0
depends on UART_K20_PORT_1
help
The baud rate for UART port to be set to at boot.
Leave at 0 to skip initialization.
# ---------- Port 2 ----------
menuconfig UART_K20_PORT_2
bool "Enable K20 UART Port 2"
default n
depends on UART_K20
help
This tells the driver to configure the UART port at boot, depending on
the additional configure options below.
config UART_K20_PORT_2_NAME
string "Port 2 Device Name"
default "UART_2"
depends on UART_K20_PORT_2
help
This is the device name for UART, and is included in the device
struct.
config UART_K20_PORT_2_IRQ_PRI
int "Port 2 Interrupt Priority"
default 0
depends on UART_K20_PORT_2
help
The interrupt priority for UART port.
config UART_K20_PORT_2_BAUD_RATE
int "Port 2 Baud Rate"
default 0
depends on UART_K20_PORT_2
help
The baud rate for UART port to be set to at boot.
Leave at 0 to skip initialization.
# ---------- Port 3 ----------
menuconfig UART_K20_PORT_3
bool "Enable K20 UART Port 3"
default n
depends on UART_K20
help
This tells the driver to configure the UART port at boot, depending on
the additional configure options below.
config UART_K20_PORT_3_NAME
string "Port 3 Device Name"
default "UART_3"
depends on UART_K20_PORT_3
help
This is the device name for UART, and is included in the device
struct.
config UART_K20_PORT_3_IRQ_PRI
int "Port 3 Interrupt Priority"
default 0
depends on UART_K20_PORT_3
help
The interrupt priority for UART port.
config UART_K20_PORT_3_BAUD_RATE
int "Port 3 Baud Rate"
default 0
depends on UART_K20_PORT_3
help
The baud rate for UART port to be set to at boot.
Leave at 0 to skip initialization.
# ---------- Port 4 ----------
menuconfig UART_K20_PORT_4
bool "Enable K20 UART Port 4"
default n
depends on UART_K20
help
This tells the driver to configure the UART port at boot, depending on
the additional configure options below.
config UART_K20_PORT_4_NAME
string "Port 4 Device Name"
default "UART_4"
depends on UART_K20_PORT_4
help
This is the device name for UART, and is included in the device
struct.
config UART_K20_PORT_4_IRQ_PRI
int "Port 4 Interrupt Priority"
default 0
depends on UART_K20_PORT_4
help
The interrupt priority for UART port.
config UART_K20_PORT_4_BAUD_RATE
int "Port 4 Baud Rate"
default 0
depends on UART_K20_PORT_4
help
The baud rate for UART port to be set to at boot.
Leave at 0 to skip initialization.

1
drivers/serial/Makefile
View file

@ -2,7 +2,6 @@ ccflags-$(CONFIG_UART_QMSI) +=-I$(CONFIG_QMSI_INSTALL_PATH)/include
ccflags-y +=-I$(srctree)/drivers
obj-$(CONFIG_UART_NS16550) += uart_ns16550.o
obj-$(CONFIG_UART_K20) += uart_k20.o
obj-$(CONFIG_UART_MCUX) += uart_mcux.o
obj-$(CONFIG_UART_STELLARIS) += uart_stellaris.o
obj-$(CONFIG_UART_NSIM) += uart_nsim.o

584
drivers/serial/uart_k20.c
View file

@ -1,584 +0,0 @@
/*
* Copyright (c) 2013-2015 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief UART driver for the Freescale K20 Family of microprocessors.
*
* Before individual UART port can be used, uart_k20_port_init() has to be
* called to setup the port.
*/
#include <kernel.h>
#include <arch/cpu.h>
#include <stdint.h>
#include <board.h>
#include <init.h>
#include <uart.h>
#include <toolchain.h>
#include <sections.h>
#include "uart_k20.h"
#include "uart_k20_priv.h"
/* convenience defines */
#define DEV_CFG(dev) \
((const struct uart_device_config * const)(dev)->config->config_info)
#define DEV_DATA(dev) \
((struct uart_k20_dev_data_t * const)(dev)->driver_data)
#define UART_STRUCT(dev) \
((volatile struct K20_UART *)(DEV_CFG(dev))->base)
/* Device data structure */
struct uart_k20_dev_data_t {
uint32_t baud_rate; /* Baud rate */
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
uart_irq_callback_t cb; /**< Callback function pointer */
#endif
};
static const struct uart_driver_api uart_k20_driver_api;
/**
* @brief Initialize UART channel
*
* This routine is called to reset the chip in a quiescent state.
* It is assumed that this function is called only once per UART.
*
* @param dev UART device struct
*
* @return 0
*/
static int uart_k20_init(struct device *dev)
{
int old_level; /* old interrupt lock level */
union C1 c1; /* UART C1 register value */
union C2 c2; /* UART C2 register value */
volatile struct K20_UART *uart = UART_STRUCT(dev);
const struct uart_device_config * const dev_cfg = DEV_CFG(dev);
struct uart_k20_dev_data_t * const dev_data = DEV_DATA(dev);
/* disable interrupts */
old_level = irq_lock();
_uart_k20_baud_rate_set(uart, dev_cfg->sys_clk_freq,
dev_data->baud_rate);
/* 1 start bit, 8 data bits, no parity, 1 stop bit */
c1.value = 0;
uart->c1 = c1;
/* enable Rx and Tx with interrupts disabled */
c2.value = 0;
c2.field.rx_enable = 1;
c2.field.tx_enable = 1;
uart->c2 = c2;
/* restore interrupt state */
irq_unlock(old_level);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
dev_cfg->irq_config_func(dev);
#endif
return 0;
}
/**
* @brief Poll the device for input.
*
* @param dev UART device struct
* @param c Pointer to character
*
* @return 0 if a character arrived, -1 if the input buffer if empty.
*/
static int uart_k20_poll_in(struct device *dev, unsigned char *c)
{
volatile struct K20_UART *uart = UART_STRUCT(dev);
if (uart->s1.field.rx_data_full == 0)
return (-1);
/* got a character */
*c = uart->d;
return 0;
}
/**
* @brief Output a character in polled mode.
*
* Checks if the transmitter is empty. If empty, a character is written to
* the data register.
*
* If the hardware flow control is enabled then the handshake signal CTS has to
* be asserted in order to send a character.
*
* @param dev UART device struct
* @param c Character to send
*
* @return sent character
*/
static unsigned char uart_k20_poll_out(struct device *dev,
unsigned char c)
{
volatile struct K20_UART *uart = UART_STRUCT(dev);
/* wait for transmitter to ready to accept a character */
while (uart->s1.field.tx_data_empty == 0)
;
uart->d = c;
return c;
}
#if CONFIG_UART_INTERRUPT_DRIVEN
/**
* @brief Fill FIFO with data
*
* @param dev UART device struct
* @param tx_data Data to transmit
* @param len Number of bytes to send
*
* @return number of bytes sent
*/
static int uart_k20_fifo_fill(struct device *dev, const uint8_t *tx_data,
int len)
{
volatile struct K20_UART *uart = UART_STRUCT(dev);
uint8_t num_tx = 0;
while ((len - num_tx > 0) && (uart->s1.field.tx_data_empty == 1)) {
uart->d = tx_data[num_tx++];
}
return num_tx;
}
/**
* @brief Read data from FIFO
*
* @param dev UART device struct
* @param rx_data Pointer to data container
* @param size Container size in bytes
*
* @return number of bytes read
*/
static int uart_k20_fifo_read(struct device *dev, uint8_t *rx_data,
const int size)
{
volatile struct K20_UART *uart = UART_STRUCT(dev);
uint8_t num_rx = 0;
while ((size - num_rx > 0) && (uart->s1.field.rx_data_full != 0)) {
rx_data[num_rx++] = uart->d;
}
return num_rx;
}
/**
* @brief Enable TX interrupt
*
* @param dev UART device struct
*
* @return N/A
*/
static void uart_k20_irq_tx_enable(struct device *dev)
{
volatile struct K20_UART *uart = UART_STRUCT(dev);
uart->c2.field.tx_int_dma_tx_en = 1;
}
/**
* @brief Disable TX interrupt in IER
*
* @param dev UART device struct
*
* @return N/A
*/
static void uart_k20_irq_tx_disable(struct device *dev)
{
volatile struct K20_UART *uart = UART_STRUCT(dev);
uart->c2.field.tx_int_dma_tx_en = 0;
}
/**
* @brief Check if Tx IRQ has been raised
*
* @param dev UART device struct
*
* @return 1 if an IRQ is ready, 0 otherwise
*/
static int uart_k20_irq_tx_ready(struct device *dev)
{
volatile struct K20_UART *uart = UART_STRUCT(dev);
return (uart->c2.field.tx_int_dma_tx_en == 0) ?
0 : uart->s1.field.tx_data_empty;
}
/**
* @brief Enable RX interrupt in IER
*
* @param dev UART device struct
*
* @return N/A
*/
static void uart_k20_irq_rx_enable(struct device *dev)
{
volatile struct K20_UART *uart = UART_STRUCT(dev);
uart->c2.field.rx_full_int_dma_tx_en = 1;
}
/**
* @brief Disable RX interrupt in IER
*
* @param dev UART device struct
*
* @return N/A
*/
static void uart_k20_irq_rx_disable(struct device *dev)
{
volatile struct K20_UART *uart = UART_STRUCT(dev);
uart->c2.field.rx_full_int_dma_tx_en = 0;
}
/**
* @brief Check if Rx IRQ has been raised
*
* @param dev UART device struct
*
* @return 1 if an IRQ is ready, 0 otherwise
*/
static int uart_k20_irq_rx_ready(struct device *dev)
{
volatile struct K20_UART *uart = UART_STRUCT(dev);
return (uart->c2.field.rx_full_int_dma_tx_en == 0) ?
0 : uart->s1.field.rx_data_full;
}
/**
* @brief Enable error interrupt
*
* @param dev UART device struct
*
* @return N/A
*/
static void uart_k20_irq_err_enable(struct device *dev)
{
volatile struct K20_UART *uart = UART_STRUCT(dev);
union C3 c3 = uart->c3;
c3.field.parity_err_int_en = 1;
c3.field.frame_err_int_en = 1;
c3.field.noise_err_int_en = 1;
c3.field.overrun_err_int_en = 1;
uart->c3 = c3;
}
/**
* @brief Disable error interrupt
*
* @param dev UART device struct
*
* @return N/A
*/
static void uart_k20_irq_err_disable(struct device *dev)
{
volatile struct K20_UART *uart = UART_STRUCT(dev);
union C3 c3 = uart->c3;
c3.field.parity_err_int_en = 0;
c3.field.frame_err_int_en = 0;
c3.field.noise_err_int_en = 0;
c3.field.overrun_err_int_en = 0;
uart->c3 = c3;
}
/**
* @brief Check if Tx or Rx IRQ is pending
*
* @param dev UART device struct
*
* @return 1 if a Tx or Rx IRQ is pending, 0 otherwise
*/
static int uart_k20_irq_is_pending(struct device *dev)
{
return uart_k20_irq_tx_ready(dev) || uart_k20_irq_rx_ready(dev);
}
/**
* @brief Update IRQ status
*
* @param dev UART device struct
*
* @return always 1
*/
static int uart_k20_irq_update(struct device *dev)
{
return 1;
}
/**
* @brief Set the callback function pointer for IRQ.
*
* @param dev UART device struct
* @param cb Callback function pointer.
*
* @return N/A
*/
static void uart_k20_irq_callback_set(struct device *dev,
uart_irq_callback_t cb)
{
struct uart_k20_dev_data_t * const dev_data = DEV_DATA(dev);
dev_data->cb = cb;
}
/**
* @brief Interrupt service routine.
*
* This simply calls the callback function, if one exists.
*
* @param arg Argument to ISR.
*
* @return N/A
*/
void uart_k20_isr(void *arg)
{
struct device *dev = arg;
struct uart_k20_dev_data_t * const dev_data = DEV_DATA(dev);
if (dev_data->cb) {
dev_data->cb(dev);
}
}
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
static const struct uart_driver_api uart_k20_driver_api = {
.poll_in = uart_k20_poll_in,
.poll_out = uart_k20_poll_out,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.fifo_fill = uart_k20_fifo_fill,
.fifo_read = uart_k20_fifo_read,
.irq_tx_enable = uart_k20_irq_tx_enable,
.irq_tx_disable = uart_k20_irq_tx_disable,
.irq_tx_ready = uart_k20_irq_tx_ready,
.irq_rx_enable = uart_k20_irq_rx_enable,
.irq_rx_disable = uart_k20_irq_rx_disable,
.irq_rx_ready = uart_k20_irq_rx_ready,
.irq_err_enable = uart_k20_irq_err_enable,
.irq_err_disable = uart_k20_irq_err_disable,
.irq_is_pending = uart_k20_irq_is_pending,
.irq_update = uart_k20_irq_update,
.irq_callback_set = uart_k20_irq_callback_set,
#endif
};
#ifdef CONFIG_UART_K20_PORT_0
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void irq_config_func_0(struct device *port);
#endif
static const struct uart_device_config uart_k20_dev_cfg_0 = {
.base = (uint8_t *)UART_K20_PORT_0_BASE_ADDR,
.sys_clk_freq = UART_K20_PORT_0_CLK_FREQ,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = irq_config_func_0,
#endif
};
static struct uart_k20_dev_data_t uart_k20_dev_data_0 = {
.baud_rate = CONFIG_UART_K20_PORT_0_BAUD_RATE,
};
DEVICE_AND_API_INIT(uart_k20_0, CONFIG_UART_K20_PORT_0_NAME, &uart_k20_init,
&uart_k20_dev_data_0, &uart_k20_dev_cfg_0,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&uart_k20_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void irq_config_func_0(struct device *dev)
{
IRQ_CONNECT(UART_K20_PORT_0_IRQ,
CONFIG_UART_K20_PORT_0_IRQ_PRI,
uart_k20_isr, DEVICE_GET(uart_k20_0),
UART_IRQ_FLAGS);
irq_enable(UART_K20_PORT_0_IRQ);
}
#endif
#endif /* CONFIG_UART_K20_PORT_0 */
#ifdef CONFIG_UART_K20_PORT_1
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void irq_config_func_1(struct device *port);
#endif
static const struct uart_device_config uart_k20_dev_cfg_1 = {
.base = (uint8_t *)UART_K20_PORT_1_BASE_ADDR,
.sys_clk_freq = UART_K20_PORT_1_CLK_FREQ,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = irq_config_func_1,
#endif
};
static struct uart_k20_dev_data_t uart_k20_dev_data_1 = {
.baud_rate = CONFIG_UART_K20_PORT_1_BAUD_RATE,
};
DEVICE_AND_API_INIT(uart_k20_1, CONFIG_UART_K20_PORT_1_NAME, &uart_k20_init,
&uart_k20_dev_data_1, &uart_k20_dev_cfg_1,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&uart_k20_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void irq_config_func_1(struct device *dev)
{
IRQ_CONNECT(UART_K20_PORT_1_IRQ,
CONFIG_UART_K20_PORT_1_IRQ_PRI,
uart_k20_isr, DEVICE_GET(uart_k20_1),
UART_IRQ_FLAGS);
irq_enable(UART_K20_PORT_1_IRQ);
}
#endif
#endif /* CONFIG_UART_K20_PORT_1 */
#ifdef CONFIG_UART_K20_PORT_2
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void irq_config_func_2(struct device *port);
#endif
static const struct uart_device_config uart_k20_dev_cfg_2 = {
.base = (uint8_t *)UART_K20_PORT_2_BASE_ADDR,
.sys_clk_freq = UART_K20_PORT_2_CLK_FREQ,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = irq_config_func_2,
#endif
};
static struct uart_k20_dev_data_t uart_k20_dev_data_2 = {
.baud_rate = CONFIG_UART_K20_PORT_2_BAUD_RATE,
};
DEVICE_AND_API_INIT(uart_k20_2, CONFIG_UART_K20_PORT_2_NAME, &uart_k20_init,
&uart_k20_dev_data_2, &uart_k20_dev_cfg_2,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&uart_k20_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void irq_config_func_2(struct device *dev)
{
IRQ_CONNECT(UART_K20_PORT_2_IRQ,
CONFIG_UART_K20_PORT_2_IRQ_PRI,
uart_k20_isr, DEVICE_GET(uart_k20_2),
UART_IRQ_FLAGS);
irq_enable(UART_K20_PORT_2_IRQ);
}
#endif
#endif /* CONFIG_UART_K20_PORT_2 */
#ifdef CONFIG_UART_K20_PORT_3
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void irq_config_func_3(struct device *port);
#endif
static struct uart_device_config uart_k20_dev_cfg_3 = {
.base = (uint8_t *)UART_K20_PORT_3_BASE_ADDR,
.sys_clk_freq = UART_K20_PORT_3_CLK_FREQ,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = irq_config_func_3,
#endif
};
static struct uart_k20_dev_data_t uart_k20_dev_data_3 = {
.baud_rate = CONFIG_UART_K20_PORT_3_BAUD_RATE,
};
DEVICE_AND_API_INIT(uart_k20_3, CONFIG_UART_K20_PORT_3_NAME, &uart_k20_init,
&uart_k20_dev_data_3, &uart_k20_dev_cfg_3,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&uart_k20_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void irq_config_func_3(struct device *dev)
{
IRQ_CONNECT(UART_K20_PORT_3_IRQ,
CONFIG_UART_K20_PORT_3_IRQ_PRI,
uart_k20_isr, DEVICE_GET(uart_k20_3),
UART_IRQ_FLAGS);
irq_enable(UART_K20_PORT_3_IRQ);
}
#endif
#endif /* CONFIG_UART_K20_PORT_3 */
#ifdef CONFIG_UART_K20_PORT_4
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void irq_config_func_4(struct device *port);
#endif
static const struct uart_device_config uart_k20_dev_cfg_4 = {
.base = (uint8_t *)UART_K20_PORT_4_BASE_ADDR,
.sys_clk_freq = UART_K20_PORT_4_CLK_FREQ,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = irq_config_func_4,
#endif
};
static struct uart_k20_dev_data_t uart_k20_dev_data_4 = {
.baud_rate = CONFIG_UART_K20_PORT_4_BAUD_RATE,
};
DEVICE_AND_API_INIT(uart_k20_4, CONFIG_UART_K20_PORT_4_NAME, &uart_k20_init,
&uart_k20_dev_data_4, &uart_k20_dev_cfg_4,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&uart_k20_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void irq_config_func_4(struct device *dev)
{
IRQ_CONNECT(UART_K20_PORT_4_IRQ,
CONFIG_UART_K20_PORT_4_IRQ_PRI,
uart_k20_isr, DEVICE_GET(uart_k20_4),
UART_IRQ_FLAGS);
irq_enable(UART_K20_PORT_4_IRQ);
}
#endif
#endif /* CONFIG_UART_K20_PORT_4 */

16
drivers/serial/uart_k20.h
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@ -1,16 +0,0 @@
/*
* Copyright (c) 2016 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file UART header file for the K20 family of microprocessors..
*/
#ifndef _UART_K20_H_
#define _UART_K20_H_
void uart_k20_isr(void *arg);
#endif /* _UART_K20_H_ */

252
drivers/serial/uart_k20_priv.h
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@ -1,252 +0,0 @@
/* Freescale K20 microprocessor UART register definitions */
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief Contains the UART Registers for the K20 Family of microprocessors.
*/
#ifndef _K20UART_H_
#define _K20UART_H_
#include <stdint.h>
#include <misc/__assert.h>
#ifdef __cplusplus
extern "C" {
#endif
union BDH {
uint8_t value;
struct {
uint8_t sbr : 5 __packed; /* Hi Baud Rate Bits */
uint8_t res_5 : 1 __packed;
uint8_t rx_edge_int_en : 1 __packed; /* RxD Active Edge */
uint8_t lbkd_int_en : 1 __packed; /* LIN Break Detect */
} field;
}; /* 0x000 BaudRate High */
union C1 {
uint8_t value;
struct {
uint8_t odd_parity : 1 __packed;
uint8_t parity_enable : 1 __packed;
uint8_t idle_line_type : 1 __packed;
uint8_t rx_wakep_method : 1 __packed;
uint8_t mode9bit : 1 __packed;
uint8_t remote_loopback : 1 __packed;
uint8_t uart_stop_wait : 1 __packed;
uint8_t loopback_en : 1 __packed;
} field;
}; /* 0x002 Control 1 */
#define RX_EN_MASK 0x04
#define TX_EN_MASK 0x08
union C2 {
uint8_t value;
struct {
uint8_t send_break : 1 __packed;
uint8_t rx_wakeup_ctrl : 1 __packed;
uint8_t rx_enable : 1 __packed;
uint8_t tx_enable : 1 __packed;
uint8_t idle_line_int_en : 1 __packed;
uint8_t rx_full_int_dma_tx_en : 1 __packed;
uint8_t tx_complete_int_en : 1 __packed;
uint8_t tx_int_dma_tx_en : 1 __packed;
} field;
}; /* 0x003 Control 2 */
union C3 {
uint8_t value;
struct {
uint8_t parity_err_int_en : 1 __packed;
uint8_t frame_err_int_en : 1 __packed;
uint8_t noise_err_int_en : 1 __packed;
uint8_t overrun_err_int_en : 1 __packed;
uint8_t tx_data_invert : 1 __packed;
uint8_t tx_data_pin_outt_dir : 1 __packed;
uint8_t tx_bit8 : 1 __packed;
uint8_t rx_bit8 : 1 __packed;
} field;
}; /* 0x006 Control 3 */
union C4 {
uint8_t value;
struct {
uint8_t brfa : 5 __packed; /* BaudRateFineAdjust*/
uint8_t mode10bit : 1 __packed;
uint8_t matech_addr_mode1_en : 1 __packed;
uint8_t match_addr_mode2_en : 1 __packed;
} field;
}; /* 0x00A Control 4 */
#define TX_DATA_EMPTY_MASK 0x80
#define RX_DATA_FULL_MASK 0x20
union S1 {
uint8_t value;
struct {
uint8_t parity_err : 1 __packed;
uint8_t framing_err : 1 __packed;
uint8_t noice : 1 __packed;
uint8_t rx_overrun : 1 __packed;
uint8_t idle_line : 1 __packed;
uint8_t rx_data_full : 1 __packed;
uint8_t tx_complete : 1 __packed;
uint8_t tx_data_empty : 1 __packed;
} field;
}; /* 0x004 Status 1 */
union S2 {
uint8_t value;
struct e {
uint8_t rx_active : 1 __packed;
uint8_t lin_bk_detect_en : 1 __packed;
uint8_t brk_char_len13 : 1 __packed;
uint8_t rx_wakeup_idle_detect : 1 __packed;
uint8_t rx_data_inverted : 1 __packed;
uint8_t msb_first : 1 __packed;
uint8_t rxedgif : 1 __packed;
uint8_t lbkdif : 1 __packed;
} field;
}; /* 0x005 Status 2 */
#define FIFO_SIZE_1 0
#define FIFO_SIZE_4 1
#define FIFO_SIZE_8 2
#define FIFO_SIZE_16 3
#define FIFO_SIZE_32 4
#define FIFO_SIZE_64 5
#define FIFO_SIZE_128 6
#define FIFO_SIZE_RES 6 /* Reserved size */
#define RX_FIFO_EN_MASK 0x08
#define TX_FIFO_EN_MASK 0x80
union PFIFO {
uint8_t value;
struct {
uint8_t rx_fifo_size : 3 __packed; /* read-only */
uint8_t rx_fifo_en : 1 __packed;
uint8_t tx_fifo_size : 3 __packed; /* read-only */
uint8_t tx_fifo_en : 1 __packed;
} field;
}; /* 0x010 Fifo Parameter 1 */
#define RX_FIFO_FLUSH_MASK 0x40
#define TX_FIFO_FLUSH_MASK 0x80
union CFIFO {
uint8_t value;
struct {
uint8_t rx_fifo_underflow_int_en : 1 __packed;
uint8_t tx_fifo_overflow_int_en : 1 __packed;
uint8_t rx_fifo_overflow_int_en : 1 __packed;
uint8_t res_3 : 3 __packed;
uint8_t rx_fifo_flush : 1 __packed; /* write-only */
uint8_t tx_fifo_flush : 1 __packed; /* write-only */
} field;
}; /* 0x011 Fifo Control */
struct K20_UART {
union BDH bdh; /* 0x000 Baud Rate High */
uint8_t bdl; /* 0x001 Baud Rate Low (04)*/
union C1 c1; /* 0x002 Control 1 */
union C2 c2; /* 0x003 Control 2 */
union S1 s1; /* 0x004 Status 1 (C0) RO*/
union S2 s2; /* 0x005 Status 2 */
union C3 c3; /* 0x006 Control 3 */
uint8_t d; /* 0x007 Data */
uint8_t ma1; /* 0x008 Match Address 1 */
uint8_t ma2; /* 0x009 Match Address 1 */
union C4 c4; /* 0x00A Control 4 */
uint8_t c5; /* 0x00B Control 5 */
uint8_t ed; /* 0x00C Extended Data */
uint8_t modem; /* 0x00D Modem */
uint8_t ir; /* 0x00E Infrared */
uint8_t z_reserved00f; /* 0x00F */
union PFIFO pfifo; /* 0x010 FIFO Param */
union CFIFO cfifo; /* 0x011 FIFO Control */
uint8_t sfifo; /* 0x012 FIFO Status (C0)*/
uint8_t twfifo; /* 0x013 FIFO Tx Watermark */
uint8_t tcfifo; /* 0x014 FIFO Tx Count */
uint8_t rwfifo; /* 0x015 FIFO Rx Watermark (01)*/
uint8_t rcfifo; /* 0x016 FIFO Rx Count */
uint8_t u_7816[0x20 - 0x17]; /* 0x017-0x1F UART ISO-7816 standard */
uint8_t u_cea709_1[0x32 - 0x20]; /* 0x020-0x31 UART CEA8709.1 standard*/
/* 0x032-0xFFF Reserved */
uint8_t z_reserv_statused038_03c[0x1000 - 0x32];
}; /* K20 Microntroller UART module */
/**
* @brief Set baud rate for K20 UART port.
*
* @param uart_p UART data
* @param clk_freq Clock frequency
* @param baud_rate Baud rate to set
*
* @return N/A
*/
static ALWAYS_INLINE void _uart_k20_baud_rate_set(volatile struct K20_UART *u,
uint32_t clk_freq,
uint32_t baud_rate)
{
/* avoid divide by zero */
if ((baud_rate == 0) || (clk_freq == 0)) {
return;
}
/*
* The baud rate is calculated as:
* baud_rate = clk_freq/(16*(SBR[12:0]+BRFA[5:0]/32)), where
* - SBR is the combined UART Baud Rate Register settings and
* - BRFA is the UART Baud Rate Fine Adjustment setting
* This is equivalent to:
* 32xSBR + BRFA = 2 * clkFreq/baudRate
*/
uint32_t clk_br = 2 * clk_freq / baud_rate;
uint16_t sbr = clk_br >> 5;
uint8_t brfa = clk_br - (sbr << 5);
__ASSERT((sbr && 0x1FFF),
"clk_freq is too high or baud_rate is too low");
/* Note there are other fields (interrupts flag) in BDH register */
u->bdh.field.sbr = (uint8_t)(sbr >> 8);
u->bdl = (uint8_t)(sbr & 0xFF);
u->c4.field.brfa = brfa;
}
/**
* @brief Enable FIFO for K20 UART port
*
* @param uart_p UART data
*
* @return N/A
*/
static inline void _uart_k20_fifo_enable(volatile struct K20_UART *uart_p)
{
uint8_t tx_rx_state = uart_p->c2.value && (TX_EN_MASK | RX_EN_MASK);
/* disable Rx and Tx */
uart_p->c2.value &= ~(TX_EN_MASK | RX_EN_MASK);
uart_p->pfifo.value |= (TX_FIFO_EN_MASK | RX_FIFO_EN_MASK);
uart_p->cfifo.value |= (TX_FIFO_FLUSH_MASK | RX_FIFO_FLUSH_MASK);
/* restore Rx and Tx */
uart_p->c2.value |= tx_rx_state;
}
#ifdef __cplusplus
}
#endif
#endif /* _K20UART_H_ */