serial: k64: Remove the uart_k20 driver
Now that we have a more generic mcux serial driver, remove the uart_k20 driver. Jira: ZEP-719 Change-Id: I51a3237454140feabbfe18ac2c8ee451e572c7be Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
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bb45fd526e
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10 changed files with 1 additions and 1140 deletions
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@ -1,3 +1,2 @@
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obj-y += soc_config.o
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obj-y += soc.o
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obj-y += wdog.o
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@ -141,8 +141,7 @@ static ALWAYS_INLINE void clkInit(void)
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*
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* @brief Perform basic hardware initialization
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*
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* Initialize the interrupt controller device drivers and the
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* Kinetis UART device driver.
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* Initialize the interrupt controller device drivers.
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* Also initialize the timer device driver, if required.
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*
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* @return 0
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@ -138,37 +138,6 @@ extern "C" {
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#include <misc/util.h>
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#include <drivers/rand32.h>
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/*
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* UART configuration settings
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*/
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#if defined(CONFIG_UART_K20)
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#include <drivers/k20_pcr.h>
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#define UART_IRQ_FLAGS 0
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#define UART_K20_PORT_0_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ
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#define UART_K20_PORT_0_BASE_ADDR 0x4006A000
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#define UART_K20_PORT_0_IRQ IRQ_UART0_STATUS
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#define UART_K20_PORT_1_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ
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#define UART_K20_PORT_1_BASE_ADDR 0x4006B000
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#define UART_K20_PORT_1_IRQ IRQ_UART1_STATUS
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#define UART_K20_PORT_2_CLK_FREQ BUSCLK_DEFAULT_IOSC_HZ
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#define UART_K20_PORT_2_BASE_ADDR 0x4006C000
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#define UART_K20_PORT_2_IRQ IRQ_UART2_STATUS
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#define UART_K20_PORT_3_CLK_FREQ BUSCLK_DEFAULT_IOSC_HZ
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#define UART_K20_PORT_3_BASE_ADDR 0x4006D000
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#define UART_K20_PORT_3_IRQ IRQ_UART3_STATUS
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#define UART_K20_PORT_4_CLK_FREQ BUSCLK_DEFAULT_IOSC_HZ
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#define UART_K20_PORT_4_BASE_ADDR 0x400EA000
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#define UART_K20_PORT_4_IRQ IRQ_UART4_STATUS
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#endif /* CONFIG_UART_K20 */
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/*
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* PWM/FTM configuration settings
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*/
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@ -1,73 +0,0 @@
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/*
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* Copyright (c) 2015 Intel Corporation.
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file Board config file
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*/
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#include <device.h>
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#include <init.h>
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#include <kernel.h>
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#include "soc.h"
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#include <fsl_common.h>
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#ifdef CONFIG_UART_K20
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#include <uart.h>
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#include <console/uart_console.h>
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#include <serial/uart_k20_priv.h>
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#endif /* CONFIG_UART_K20 */
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/*
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* UART configuration
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*/
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#ifdef CONFIG_UART_K20
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static int uart_k20_init(struct device *dev)
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{
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uint32_t scgc4;
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ARG_UNUSED(dev);
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/* Although it is possible to modify the bits through
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* *sim directly, the following code saves about 20 bytes
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* of ROM space, compared to direct modification.
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*/
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scgc4 = SIM->SCGC4;
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#ifdef CONFIG_UART_K20_PORT_0
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scgc4 |= SIM_SCGC4_UART0(1);
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#endif
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#ifdef CONFIG_UART_K20_PORT_1
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scgc4 |= SIM_SCGC4_UART1(1);
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#endif
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#ifdef CONFIG_UART_K20_PORT_2
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scgc4 |= SIM_SCGC4_UART2(1);
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#endif
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#ifdef CONFIG_UART_K20_PORT_3
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scgc4 |= SIM_SCGC4_UART3(1);
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#endif
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SIM->SCGC4 = scgc4;
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#ifdef CONFIG_UART_K20_PORT_4
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SIM->SCGC1 |= SIM_SCGC1_UART4(1);
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#endif
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return 0;
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}
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DEVICE_INIT(_uart_k20_init, "", uart_k20_init,
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NULL, NULL,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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#endif /* CONFIG_UART_K20 */
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@ -57,8 +57,6 @@ comment "Serial Drivers"
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source "drivers/serial/Kconfig.ns16550"
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source "drivers/serial/Kconfig.k20"
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source "drivers/serial/Kconfig.mcux"
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source "drivers/serial/Kconfig.stellaris"
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@ -1,178 +0,0 @@
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menuconfig UART_K20
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bool "K20 serial driver"
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default n
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select SERIAL_HAS_DRIVER
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help
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This option enables the K20 serial driver.
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This specific driver can be used for the serial hardware
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available at the Freescale FRDM K64F board.
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# ---------- Port 0 ----------
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menuconfig UART_K20_PORT_0
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bool "Enable K20 UART Port 0"
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default n
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depends on UART_K20
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help
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This tells the driver to configure the UART port at boot, depending on
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the additional configure options below.
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config UART_K20_PORT_0_NAME
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string "Port 0 Device Name"
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default "UART_0"
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depends on UART_K20_PORT_0
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help
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This is the device name for UART, and is included in the device
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struct.
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config UART_K20_PORT_0_IRQ_PRI
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int "Port 0 Interrupt Priority"
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default 0
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depends on UART_K20_PORT_0
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help
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The interrupt priority for UART port.
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config UART_K20_PORT_0_BAUD_RATE
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int "Port 0 Baud Rate"
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default 0
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depends on UART_K20_PORT_0
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help
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The baud rate for UART port to be set to at boot.
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Leave at 0 to skip initialization.
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# ---------- Port 1 ----------
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menuconfig UART_K20_PORT_1
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bool "Enable K20 UART Port 1"
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default n
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depends on UART_K20
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help
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This tells the driver to configure the UART port at boot, depending on
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the additional configure options below.
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config UART_K20_PORT_1_NAME
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string "Port 1 Device Name"
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default "UART_1"
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depends on UART_K20_PORT_1
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help
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This is the device name for UART, and is included in the device
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struct.
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config UART_K20_PORT_1_IRQ_PRI
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int "Port 1 Interrupt Priority"
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default 0
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depends on UART_K20_PORT_1
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help
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The interrupt priority for UART port.
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config UART_K20_PORT_1_BAUD_RATE
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int "Port 1 Baud Rate"
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default 0
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depends on UART_K20_PORT_1
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help
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The baud rate for UART port to be set to at boot.
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Leave at 0 to skip initialization.
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# ---------- Port 2 ----------
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menuconfig UART_K20_PORT_2
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bool "Enable K20 UART Port 2"
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default n
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depends on UART_K20
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help
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This tells the driver to configure the UART port at boot, depending on
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the additional configure options below.
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config UART_K20_PORT_2_NAME
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string "Port 2 Device Name"
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default "UART_2"
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depends on UART_K20_PORT_2
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help
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This is the device name for UART, and is included in the device
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struct.
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config UART_K20_PORT_2_IRQ_PRI
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int "Port 2 Interrupt Priority"
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default 0
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depends on UART_K20_PORT_2
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help
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The interrupt priority for UART port.
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config UART_K20_PORT_2_BAUD_RATE
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int "Port 2 Baud Rate"
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default 0
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depends on UART_K20_PORT_2
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help
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The baud rate for UART port to be set to at boot.
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Leave at 0 to skip initialization.
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# ---------- Port 3 ----------
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menuconfig UART_K20_PORT_3
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bool "Enable K20 UART Port 3"
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default n
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depends on UART_K20
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help
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This tells the driver to configure the UART port at boot, depending on
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the additional configure options below.
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config UART_K20_PORT_3_NAME
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string "Port 3 Device Name"
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default "UART_3"
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depends on UART_K20_PORT_3
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help
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This is the device name for UART, and is included in the device
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struct.
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config UART_K20_PORT_3_IRQ_PRI
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int "Port 3 Interrupt Priority"
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default 0
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depends on UART_K20_PORT_3
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help
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The interrupt priority for UART port.
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config UART_K20_PORT_3_BAUD_RATE
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int "Port 3 Baud Rate"
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default 0
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depends on UART_K20_PORT_3
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help
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The baud rate for UART port to be set to at boot.
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Leave at 0 to skip initialization.
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# ---------- Port 4 ----------
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menuconfig UART_K20_PORT_4
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bool "Enable K20 UART Port 4"
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default n
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depends on UART_K20
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help
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This tells the driver to configure the UART port at boot, depending on
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the additional configure options below.
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config UART_K20_PORT_4_NAME
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string "Port 4 Device Name"
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default "UART_4"
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depends on UART_K20_PORT_4
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help
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This is the device name for UART, and is included in the device
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struct.
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config UART_K20_PORT_4_IRQ_PRI
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int "Port 4 Interrupt Priority"
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default 0
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depends on UART_K20_PORT_4
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help
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The interrupt priority for UART port.
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config UART_K20_PORT_4_BAUD_RATE
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int "Port 4 Baud Rate"
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default 0
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depends on UART_K20_PORT_4
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help
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The baud rate for UART port to be set to at boot.
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Leave at 0 to skip initialization.
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@ -2,7 +2,6 @@ ccflags-$(CONFIG_UART_QMSI) +=-I$(CONFIG_QMSI_INSTALL_PATH)/include
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ccflags-y +=-I$(srctree)/drivers
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obj-$(CONFIG_UART_NS16550) += uart_ns16550.o
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obj-$(CONFIG_UART_K20) += uart_k20.o
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obj-$(CONFIG_UART_MCUX) += uart_mcux.o
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obj-$(CONFIG_UART_STELLARIS) += uart_stellaris.o
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obj-$(CONFIG_UART_NSIM) += uart_nsim.o
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@ -1,584 +0,0 @@
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/*
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* Copyright (c) 2013-2015 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @brief UART driver for the Freescale K20 Family of microprocessors.
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*
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* Before individual UART port can be used, uart_k20_port_init() has to be
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* called to setup the port.
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*/
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#include <kernel.h>
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#include <arch/cpu.h>
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#include <stdint.h>
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#include <board.h>
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#include <init.h>
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#include <uart.h>
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#include <toolchain.h>
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#include <sections.h>
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#include "uart_k20.h"
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#include "uart_k20_priv.h"
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/* convenience defines */
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#define DEV_CFG(dev) \
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((const struct uart_device_config * const)(dev)->config->config_info)
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#define DEV_DATA(dev) \
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((struct uart_k20_dev_data_t * const)(dev)->driver_data)
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#define UART_STRUCT(dev) \
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((volatile struct K20_UART *)(DEV_CFG(dev))->base)
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/* Device data structure */
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struct uart_k20_dev_data_t {
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uint32_t baud_rate; /* Baud rate */
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uart_irq_callback_t cb; /**< Callback function pointer */
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#endif
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};
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static const struct uart_driver_api uart_k20_driver_api;
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/**
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* @brief Initialize UART channel
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*
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* This routine is called to reset the chip in a quiescent state.
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* It is assumed that this function is called only once per UART.
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*
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* @param dev UART device struct
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*
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* @return 0
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*/
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static int uart_k20_init(struct device *dev)
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{
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int old_level; /* old interrupt lock level */
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union C1 c1; /* UART C1 register value */
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union C2 c2; /* UART C2 register value */
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volatile struct K20_UART *uart = UART_STRUCT(dev);
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const struct uart_device_config * const dev_cfg = DEV_CFG(dev);
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struct uart_k20_dev_data_t * const dev_data = DEV_DATA(dev);
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/* disable interrupts */
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old_level = irq_lock();
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_uart_k20_baud_rate_set(uart, dev_cfg->sys_clk_freq,
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dev_data->baud_rate);
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/* 1 start bit, 8 data bits, no parity, 1 stop bit */
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c1.value = 0;
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uart->c1 = c1;
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/* enable Rx and Tx with interrupts disabled */
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c2.value = 0;
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c2.field.rx_enable = 1;
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c2.field.tx_enable = 1;
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uart->c2 = c2;
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/* restore interrupt state */
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irq_unlock(old_level);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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dev_cfg->irq_config_func(dev);
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#endif
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return 0;
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}
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/**
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* @brief Poll the device for input.
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*
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* @param dev UART device struct
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* @param c Pointer to character
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*
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* @return 0 if a character arrived, -1 if the input buffer if empty.
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*/
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static int uart_k20_poll_in(struct device *dev, unsigned char *c)
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{
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volatile struct K20_UART *uart = UART_STRUCT(dev);
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if (uart->s1.field.rx_data_full == 0)
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return (-1);
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/* got a character */
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*c = uart->d;
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return 0;
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}
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/**
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* @brief Output a character in polled mode.
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*
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* Checks if the transmitter is empty. If empty, a character is written to
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* the data register.
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*
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* If the hardware flow control is enabled then the handshake signal CTS has to
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* be asserted in order to send a character.
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*
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* @param dev UART device struct
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* @param c Character to send
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*
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* @return sent character
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*/
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static unsigned char uart_k20_poll_out(struct device *dev,
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unsigned char c)
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{
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volatile struct K20_UART *uart = UART_STRUCT(dev);
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/* wait for transmitter to ready to accept a character */
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while (uart->s1.field.tx_data_empty == 0)
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;
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uart->d = c;
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return c;
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}
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#if CONFIG_UART_INTERRUPT_DRIVEN
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/**
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* @brief Fill FIFO with data
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*
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* @param dev UART device struct
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* @param tx_data Data to transmit
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* @param len Number of bytes to send
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*
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* @return number of bytes sent
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*/
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static int uart_k20_fifo_fill(struct device *dev, const uint8_t *tx_data,
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int len)
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{
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volatile struct K20_UART *uart = UART_STRUCT(dev);
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uint8_t num_tx = 0;
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while ((len - num_tx > 0) && (uart->s1.field.tx_data_empty == 1)) {
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uart->d = tx_data[num_tx++];
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}
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return num_tx;
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}
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/**
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* @brief Read data from FIFO
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*
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* @param dev UART device struct
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* @param rx_data Pointer to data container
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* @param size Container size in bytes
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*
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* @return number of bytes read
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*/
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static int uart_k20_fifo_read(struct device *dev, uint8_t *rx_data,
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const int size)
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{
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volatile struct K20_UART *uart = UART_STRUCT(dev);
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uint8_t num_rx = 0;
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while ((size - num_rx > 0) && (uart->s1.field.rx_data_full != 0)) {
|
||||
rx_data[num_rx++] = uart->d;
|
||||
}
|
||||
|
||||
return num_rx;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable TX interrupt
|
||||
*
|
||||
* @param dev UART device struct
|
||||
*
|
||||
* @return N/A
|
||||
*/
|
||||
static void uart_k20_irq_tx_enable(struct device *dev)
|
||||
{
|
||||
volatile struct K20_UART *uart = UART_STRUCT(dev);
|
||||
|
||||
uart->c2.field.tx_int_dma_tx_en = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable TX interrupt in IER
|
||||
*
|
||||
* @param dev UART device struct
|
||||
*
|
||||
* @return N/A
|
||||
*/
|
||||
static void uart_k20_irq_tx_disable(struct device *dev)
|
||||
{
|
||||
volatile struct K20_UART *uart = UART_STRUCT(dev);
|
||||
|
||||
uart->c2.field.tx_int_dma_tx_en = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if Tx IRQ has been raised
|
||||
*
|
||||
* @param dev UART device struct
|
||||
*
|
||||
* @return 1 if an IRQ is ready, 0 otherwise
|
||||
*/
|
||||
static int uart_k20_irq_tx_ready(struct device *dev)
|
||||
{
|
||||
volatile struct K20_UART *uart = UART_STRUCT(dev);
|
||||
|
||||
return (uart->c2.field.tx_int_dma_tx_en == 0) ?
|
||||
0 : uart->s1.field.tx_data_empty;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable RX interrupt in IER
|
||||
*
|
||||
* @param dev UART device struct
|
||||
*
|
||||
* @return N/A
|
||||
*/
|
||||
static void uart_k20_irq_rx_enable(struct device *dev)
|
||||
{
|
||||
volatile struct K20_UART *uart = UART_STRUCT(dev);
|
||||
|
||||
uart->c2.field.rx_full_int_dma_tx_en = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable RX interrupt in IER
|
||||
*
|
||||
* @param dev UART device struct
|
||||
*
|
||||
* @return N/A
|
||||
*/
|
||||
static void uart_k20_irq_rx_disable(struct device *dev)
|
||||
{
|
||||
volatile struct K20_UART *uart = UART_STRUCT(dev);
|
||||
|
||||
uart->c2.field.rx_full_int_dma_tx_en = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if Rx IRQ has been raised
|
||||
*
|
||||
* @param dev UART device struct
|
||||
*
|
||||
* @return 1 if an IRQ is ready, 0 otherwise
|
||||
*/
|
||||
static int uart_k20_irq_rx_ready(struct device *dev)
|
||||
{
|
||||
volatile struct K20_UART *uart = UART_STRUCT(dev);
|
||||
|
||||
return (uart->c2.field.rx_full_int_dma_tx_en == 0) ?
|
||||
0 : uart->s1.field.rx_data_full;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable error interrupt
|
||||
*
|
||||
* @param dev UART device struct
|
||||
*
|
||||
* @return N/A
|
||||
*/
|
||||
static void uart_k20_irq_err_enable(struct device *dev)
|
||||
{
|
||||
volatile struct K20_UART *uart = UART_STRUCT(dev);
|
||||
union C3 c3 = uart->c3;
|
||||
|
||||
c3.field.parity_err_int_en = 1;
|
||||
c3.field.frame_err_int_en = 1;
|
||||
c3.field.noise_err_int_en = 1;
|
||||
c3.field.overrun_err_int_en = 1;
|
||||
uart->c3 = c3;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable error interrupt
|
||||
*
|
||||
* @param dev UART device struct
|
||||
*
|
||||
* @return N/A
|
||||
*/
|
||||
static void uart_k20_irq_err_disable(struct device *dev)
|
||||
{
|
||||
volatile struct K20_UART *uart = UART_STRUCT(dev);
|
||||
union C3 c3 = uart->c3;
|
||||
|
||||
c3.field.parity_err_int_en = 0;
|
||||
c3.field.frame_err_int_en = 0;
|
||||
c3.field.noise_err_int_en = 0;
|
||||
c3.field.overrun_err_int_en = 0;
|
||||
uart->c3 = c3;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if Tx or Rx IRQ is pending
|
||||
*
|
||||
* @param dev UART device struct
|
||||
*
|
||||
* @return 1 if a Tx or Rx IRQ is pending, 0 otherwise
|
||||
*/
|
||||
static int uart_k20_irq_is_pending(struct device *dev)
|
||||
{
|
||||
|
||||
return uart_k20_irq_tx_ready(dev) || uart_k20_irq_rx_ready(dev);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update IRQ status
|
||||
*
|
||||
* @param dev UART device struct
|
||||
*
|
||||
* @return always 1
|
||||
*/
|
||||
static int uart_k20_irq_update(struct device *dev)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the callback function pointer for IRQ.
|
||||
*
|
||||
* @param dev UART device struct
|
||||
* @param cb Callback function pointer.
|
||||
*
|
||||
* @return N/A
|
||||
*/
|
||||
static void uart_k20_irq_callback_set(struct device *dev,
|
||||
uart_irq_callback_t cb)
|
||||
{
|
||||
struct uart_k20_dev_data_t * const dev_data = DEV_DATA(dev);
|
||||
|
||||
dev_data->cb = cb;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Interrupt service routine.
|
||||
*
|
||||
* This simply calls the callback function, if one exists.
|
||||
*
|
||||
* @param arg Argument to ISR.
|
||||
*
|
||||
* @return N/A
|
||||
*/
|
||||
void uart_k20_isr(void *arg)
|
||||
{
|
||||
struct device *dev = arg;
|
||||
struct uart_k20_dev_data_t * const dev_data = DEV_DATA(dev);
|
||||
|
||||
if (dev_data->cb) {
|
||||
dev_data->cb(dev);
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
|
||||
|
||||
|
||||
static const struct uart_driver_api uart_k20_driver_api = {
|
||||
.poll_in = uart_k20_poll_in,
|
||||
.poll_out = uart_k20_poll_out,
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
|
||||
.fifo_fill = uart_k20_fifo_fill,
|
||||
.fifo_read = uart_k20_fifo_read,
|
||||
.irq_tx_enable = uart_k20_irq_tx_enable,
|
||||
.irq_tx_disable = uart_k20_irq_tx_disable,
|
||||
.irq_tx_ready = uart_k20_irq_tx_ready,
|
||||
.irq_rx_enable = uart_k20_irq_rx_enable,
|
||||
.irq_rx_disable = uart_k20_irq_rx_disable,
|
||||
.irq_rx_ready = uart_k20_irq_rx_ready,
|
||||
.irq_err_enable = uart_k20_irq_err_enable,
|
||||
.irq_err_disable = uart_k20_irq_err_disable,
|
||||
.irq_is_pending = uart_k20_irq_is_pending,
|
||||
.irq_update = uart_k20_irq_update,
|
||||
.irq_callback_set = uart_k20_irq_callback_set,
|
||||
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
#ifdef CONFIG_UART_K20_PORT_0
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
static void irq_config_func_0(struct device *port);
|
||||
#endif
|
||||
|
||||
static const struct uart_device_config uart_k20_dev_cfg_0 = {
|
||||
.base = (uint8_t *)UART_K20_PORT_0_BASE_ADDR,
|
||||
.sys_clk_freq = UART_K20_PORT_0_CLK_FREQ,
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
.irq_config_func = irq_config_func_0,
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct uart_k20_dev_data_t uart_k20_dev_data_0 = {
|
||||
.baud_rate = CONFIG_UART_K20_PORT_0_BAUD_RATE,
|
||||
};
|
||||
|
||||
DEVICE_AND_API_INIT(uart_k20_0, CONFIG_UART_K20_PORT_0_NAME, &uart_k20_init,
|
||||
&uart_k20_dev_data_0, &uart_k20_dev_cfg_0,
|
||||
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
&uart_k20_driver_api);
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
static void irq_config_func_0(struct device *dev)
|
||||
{
|
||||
IRQ_CONNECT(UART_K20_PORT_0_IRQ,
|
||||
CONFIG_UART_K20_PORT_0_IRQ_PRI,
|
||||
uart_k20_isr, DEVICE_GET(uart_k20_0),
|
||||
UART_IRQ_FLAGS);
|
||||
irq_enable(UART_K20_PORT_0_IRQ);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_UART_K20_PORT_0 */
|
||||
|
||||
#ifdef CONFIG_UART_K20_PORT_1
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
static void irq_config_func_1(struct device *port);
|
||||
#endif
|
||||
|
||||
static const struct uart_device_config uart_k20_dev_cfg_1 = {
|
||||
.base = (uint8_t *)UART_K20_PORT_1_BASE_ADDR,
|
||||
.sys_clk_freq = UART_K20_PORT_1_CLK_FREQ,
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
.irq_config_func = irq_config_func_1,
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct uart_k20_dev_data_t uart_k20_dev_data_1 = {
|
||||
.baud_rate = CONFIG_UART_K20_PORT_1_BAUD_RATE,
|
||||
};
|
||||
|
||||
DEVICE_AND_API_INIT(uart_k20_1, CONFIG_UART_K20_PORT_1_NAME, &uart_k20_init,
|
||||
&uart_k20_dev_data_1, &uart_k20_dev_cfg_1,
|
||||
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
&uart_k20_driver_api);
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
static void irq_config_func_1(struct device *dev)
|
||||
{
|
||||
IRQ_CONNECT(UART_K20_PORT_1_IRQ,
|
||||
CONFIG_UART_K20_PORT_1_IRQ_PRI,
|
||||
uart_k20_isr, DEVICE_GET(uart_k20_1),
|
||||
UART_IRQ_FLAGS);
|
||||
irq_enable(UART_K20_PORT_1_IRQ);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_UART_K20_PORT_1 */
|
||||
|
||||
#ifdef CONFIG_UART_K20_PORT_2
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
static void irq_config_func_2(struct device *port);
|
||||
#endif
|
||||
|
||||
static const struct uart_device_config uart_k20_dev_cfg_2 = {
|
||||
.base = (uint8_t *)UART_K20_PORT_2_BASE_ADDR,
|
||||
.sys_clk_freq = UART_K20_PORT_2_CLK_FREQ,
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
.irq_config_func = irq_config_func_2,
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct uart_k20_dev_data_t uart_k20_dev_data_2 = {
|
||||
.baud_rate = CONFIG_UART_K20_PORT_2_BAUD_RATE,
|
||||
};
|
||||
|
||||
DEVICE_AND_API_INIT(uart_k20_2, CONFIG_UART_K20_PORT_2_NAME, &uart_k20_init,
|
||||
&uart_k20_dev_data_2, &uart_k20_dev_cfg_2,
|
||||
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
&uart_k20_driver_api);
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
static void irq_config_func_2(struct device *dev)
|
||||
{
|
||||
IRQ_CONNECT(UART_K20_PORT_2_IRQ,
|
||||
CONFIG_UART_K20_PORT_2_IRQ_PRI,
|
||||
uart_k20_isr, DEVICE_GET(uart_k20_2),
|
||||
UART_IRQ_FLAGS);
|
||||
irq_enable(UART_K20_PORT_2_IRQ);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_UART_K20_PORT_2 */
|
||||
|
||||
#ifdef CONFIG_UART_K20_PORT_3
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
static void irq_config_func_3(struct device *port);
|
||||
#endif
|
||||
|
||||
static struct uart_device_config uart_k20_dev_cfg_3 = {
|
||||
.base = (uint8_t *)UART_K20_PORT_3_BASE_ADDR,
|
||||
.sys_clk_freq = UART_K20_PORT_3_CLK_FREQ,
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
.irq_config_func = irq_config_func_3,
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct uart_k20_dev_data_t uart_k20_dev_data_3 = {
|
||||
.baud_rate = CONFIG_UART_K20_PORT_3_BAUD_RATE,
|
||||
};
|
||||
|
||||
DEVICE_AND_API_INIT(uart_k20_3, CONFIG_UART_K20_PORT_3_NAME, &uart_k20_init,
|
||||
&uart_k20_dev_data_3, &uart_k20_dev_cfg_3,
|
||||
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
&uart_k20_driver_api);
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
static void irq_config_func_3(struct device *dev)
|
||||
{
|
||||
IRQ_CONNECT(UART_K20_PORT_3_IRQ,
|
||||
CONFIG_UART_K20_PORT_3_IRQ_PRI,
|
||||
uart_k20_isr, DEVICE_GET(uart_k20_3),
|
||||
UART_IRQ_FLAGS);
|
||||
irq_enable(UART_K20_PORT_3_IRQ);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_UART_K20_PORT_3 */
|
||||
|
||||
#ifdef CONFIG_UART_K20_PORT_4
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
static void irq_config_func_4(struct device *port);
|
||||
#endif
|
||||
|
||||
static const struct uart_device_config uart_k20_dev_cfg_4 = {
|
||||
.base = (uint8_t *)UART_K20_PORT_4_BASE_ADDR,
|
||||
.sys_clk_freq = UART_K20_PORT_4_CLK_FREQ,
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
.irq_config_func = irq_config_func_4,
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct uart_k20_dev_data_t uart_k20_dev_data_4 = {
|
||||
.baud_rate = CONFIG_UART_K20_PORT_4_BAUD_RATE,
|
||||
};
|
||||
|
||||
DEVICE_AND_API_INIT(uart_k20_4, CONFIG_UART_K20_PORT_4_NAME, &uart_k20_init,
|
||||
&uart_k20_dev_data_4, &uart_k20_dev_cfg_4,
|
||||
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
&uart_k20_driver_api);
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
static void irq_config_func_4(struct device *dev)
|
||||
{
|
||||
IRQ_CONNECT(UART_K20_PORT_4_IRQ,
|
||||
CONFIG_UART_K20_PORT_4_IRQ_PRI,
|
||||
uart_k20_isr, DEVICE_GET(uart_k20_4),
|
||||
UART_IRQ_FLAGS);
|
||||
irq_enable(UART_K20_PORT_4_IRQ);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_UART_K20_PORT_4 */
|
|
@ -1,16 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2016 Intel Corporation.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file UART header file for the K20 family of microprocessors..
|
||||
*/
|
||||
|
||||
#ifndef _UART_K20_H_
|
||||
#define _UART_K20_H_
|
||||
|
||||
void uart_k20_isr(void *arg);
|
||||
|
||||
#endif /* _UART_K20_H_ */
|
|
@ -1,252 +0,0 @@
|
|||
/* Freescale K20 microprocessor UART register definitions */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2013-2014 Wind River Systems, Inc.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Contains the UART Registers for the K20 Family of microprocessors.
|
||||
*/
|
||||
|
||||
#ifndef _K20UART_H_
|
||||
#define _K20UART_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include <misc/__assert.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
union BDH {
|
||||
uint8_t value;
|
||||
struct {
|
||||
uint8_t sbr : 5 __packed; /* Hi Baud Rate Bits */
|
||||
uint8_t res_5 : 1 __packed;
|
||||
uint8_t rx_edge_int_en : 1 __packed; /* RxD Active Edge */
|
||||
uint8_t lbkd_int_en : 1 __packed; /* LIN Break Detect */
|
||||
} field;
|
||||
}; /* 0x000 BaudRate High */
|
||||
|
||||
union C1 {
|
||||
uint8_t value;
|
||||
struct {
|
||||
uint8_t odd_parity : 1 __packed;
|
||||
uint8_t parity_enable : 1 __packed;
|
||||
uint8_t idle_line_type : 1 __packed;
|
||||
uint8_t rx_wakep_method : 1 __packed;
|
||||
uint8_t mode9bit : 1 __packed;
|
||||
uint8_t remote_loopback : 1 __packed;
|
||||
uint8_t uart_stop_wait : 1 __packed;
|
||||
uint8_t loopback_en : 1 __packed;
|
||||
} field;
|
||||
}; /* 0x002 Control 1 */
|
||||
|
||||
#define RX_EN_MASK 0x04
|
||||
#define TX_EN_MASK 0x08
|
||||
|
||||
union C2 {
|
||||
uint8_t value;
|
||||
struct {
|
||||
uint8_t send_break : 1 __packed;
|
||||
uint8_t rx_wakeup_ctrl : 1 __packed;
|
||||
uint8_t rx_enable : 1 __packed;
|
||||
uint8_t tx_enable : 1 __packed;
|
||||
uint8_t idle_line_int_en : 1 __packed;
|
||||
uint8_t rx_full_int_dma_tx_en : 1 __packed;
|
||||
uint8_t tx_complete_int_en : 1 __packed;
|
||||
uint8_t tx_int_dma_tx_en : 1 __packed;
|
||||
} field;
|
||||
}; /* 0x003 Control 2 */
|
||||
|
||||
union C3 {
|
||||
uint8_t value;
|
||||
struct {
|
||||
uint8_t parity_err_int_en : 1 __packed;
|
||||
uint8_t frame_err_int_en : 1 __packed;
|
||||
uint8_t noise_err_int_en : 1 __packed;
|
||||
uint8_t overrun_err_int_en : 1 __packed;
|
||||
uint8_t tx_data_invert : 1 __packed;
|
||||
uint8_t tx_data_pin_outt_dir : 1 __packed;
|
||||
uint8_t tx_bit8 : 1 __packed;
|
||||
uint8_t rx_bit8 : 1 __packed;
|
||||
} field;
|
||||
}; /* 0x006 Control 3 */
|
||||
|
||||
union C4 {
|
||||
uint8_t value;
|
||||
struct {
|
||||
uint8_t brfa : 5 __packed; /* BaudRateFineAdjust*/
|
||||
uint8_t mode10bit : 1 __packed;
|
||||
uint8_t matech_addr_mode1_en : 1 __packed;
|
||||
uint8_t match_addr_mode2_en : 1 __packed;
|
||||
} field;
|
||||
}; /* 0x00A Control 4 */
|
||||
|
||||
#define TX_DATA_EMPTY_MASK 0x80
|
||||
#define RX_DATA_FULL_MASK 0x20
|
||||
|
||||
union S1 {
|
||||
uint8_t value;
|
||||
struct {
|
||||
uint8_t parity_err : 1 __packed;
|
||||
uint8_t framing_err : 1 __packed;
|
||||
uint8_t noice : 1 __packed;
|
||||
uint8_t rx_overrun : 1 __packed;
|
||||
uint8_t idle_line : 1 __packed;
|
||||
uint8_t rx_data_full : 1 __packed;
|
||||
uint8_t tx_complete : 1 __packed;
|
||||
uint8_t tx_data_empty : 1 __packed;
|
||||
} field;
|
||||
}; /* 0x004 Status 1 */
|
||||
|
||||
union S2 {
|
||||
uint8_t value;
|
||||
struct e {
|
||||
uint8_t rx_active : 1 __packed;
|
||||
uint8_t lin_bk_detect_en : 1 __packed;
|
||||
uint8_t brk_char_len13 : 1 __packed;
|
||||
uint8_t rx_wakeup_idle_detect : 1 __packed;
|
||||
uint8_t rx_data_inverted : 1 __packed;
|
||||
uint8_t msb_first : 1 __packed;
|
||||
uint8_t rxedgif : 1 __packed;
|
||||
uint8_t lbkdif : 1 __packed;
|
||||
} field;
|
||||
}; /* 0x005 Status 2 */
|
||||
|
||||
#define FIFO_SIZE_1 0
|
||||
#define FIFO_SIZE_4 1
|
||||
#define FIFO_SIZE_8 2
|
||||
#define FIFO_SIZE_16 3
|
||||
#define FIFO_SIZE_32 4
|
||||
#define FIFO_SIZE_64 5
|
||||
#define FIFO_SIZE_128 6
|
||||
#define FIFO_SIZE_RES 6 /* Reserved size */
|
||||
|
||||
#define RX_FIFO_EN_MASK 0x08
|
||||
#define TX_FIFO_EN_MASK 0x80
|
||||
|
||||
union PFIFO {
|
||||
uint8_t value;
|
||||
struct {
|
||||
uint8_t rx_fifo_size : 3 __packed; /* read-only */
|
||||
uint8_t rx_fifo_en : 1 __packed;
|
||||
uint8_t tx_fifo_size : 3 __packed; /* read-only */
|
||||
uint8_t tx_fifo_en : 1 __packed;
|
||||
} field;
|
||||
}; /* 0x010 Fifo Parameter 1 */
|
||||
|
||||
#define RX_FIFO_FLUSH_MASK 0x40
|
||||
#define TX_FIFO_FLUSH_MASK 0x80
|
||||
|
||||
union CFIFO {
|
||||
uint8_t value;
|
||||
struct {
|
||||
uint8_t rx_fifo_underflow_int_en : 1 __packed;
|
||||
uint8_t tx_fifo_overflow_int_en : 1 __packed;
|
||||
uint8_t rx_fifo_overflow_int_en : 1 __packed;
|
||||
uint8_t res_3 : 3 __packed;
|
||||
uint8_t rx_fifo_flush : 1 __packed; /* write-only */
|
||||
uint8_t tx_fifo_flush : 1 __packed; /* write-only */
|
||||
} field;
|
||||
}; /* 0x011 Fifo Control */
|
||||
|
||||
struct K20_UART {
|
||||
union BDH bdh; /* 0x000 Baud Rate High */
|
||||
uint8_t bdl; /* 0x001 Baud Rate Low (04)*/
|
||||
union C1 c1; /* 0x002 Control 1 */
|
||||
union C2 c2; /* 0x003 Control 2 */
|
||||
union S1 s1; /* 0x004 Status 1 (C0) RO*/
|
||||
union S2 s2; /* 0x005 Status 2 */
|
||||
union C3 c3; /* 0x006 Control 3 */
|
||||
uint8_t d; /* 0x007 Data */
|
||||
uint8_t ma1; /* 0x008 Match Address 1 */
|
||||
uint8_t ma2; /* 0x009 Match Address 1 */
|
||||
union C4 c4; /* 0x00A Control 4 */
|
||||
uint8_t c5; /* 0x00B Control 5 */
|
||||
uint8_t ed; /* 0x00C Extended Data */
|
||||
uint8_t modem; /* 0x00D Modem */
|
||||
uint8_t ir; /* 0x00E Infrared */
|
||||
uint8_t z_reserved00f; /* 0x00F */
|
||||
union PFIFO pfifo; /* 0x010 FIFO Param */
|
||||
union CFIFO cfifo; /* 0x011 FIFO Control */
|
||||
uint8_t sfifo; /* 0x012 FIFO Status (C0)*/
|
||||
uint8_t twfifo; /* 0x013 FIFO Tx Watermark */
|
||||
uint8_t tcfifo; /* 0x014 FIFO Tx Count */
|
||||
uint8_t rwfifo; /* 0x015 FIFO Rx Watermark (01)*/
|
||||
uint8_t rcfifo; /* 0x016 FIFO Rx Count */
|
||||
uint8_t u_7816[0x20 - 0x17]; /* 0x017-0x1F UART ISO-7816 standard */
|
||||
uint8_t u_cea709_1[0x32 - 0x20]; /* 0x020-0x31 UART CEA8709.1 standard*/
|
||||
/* 0x032-0xFFF Reserved */
|
||||
uint8_t z_reserv_statused038_03c[0x1000 - 0x32];
|
||||
|
||||
}; /* K20 Microntroller UART module */
|
||||
|
||||
/**
|
||||
* @brief Set baud rate for K20 UART port.
|
||||
*
|
||||
* @param uart_p UART data
|
||||
* @param clk_freq Clock frequency
|
||||
* @param baud_rate Baud rate to set
|
||||
*
|
||||
* @return N/A
|
||||
*/
|
||||
static ALWAYS_INLINE void _uart_k20_baud_rate_set(volatile struct K20_UART *u,
|
||||
uint32_t clk_freq,
|
||||
uint32_t baud_rate)
|
||||
{
|
||||
/* avoid divide by zero */
|
||||
if ((baud_rate == 0) || (clk_freq == 0)) {
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* The baud rate is calculated as:
|
||||
* baud_rate = clk_freq/(16*(SBR[12:0]+BRFA[5:0]/32)), where
|
||||
* - SBR is the combined UART Baud Rate Register settings and
|
||||
* - BRFA is the UART Baud Rate Fine Adjustment setting
|
||||
* This is equivalent to:
|
||||
* 32xSBR + BRFA = 2 * clkFreq/baudRate
|
||||
*/
|
||||
uint32_t clk_br = 2 * clk_freq / baud_rate;
|
||||
uint16_t sbr = clk_br >> 5;
|
||||
uint8_t brfa = clk_br - (sbr << 5);
|
||||
|
||||
__ASSERT((sbr && 0x1FFF),
|
||||
"clk_freq is too high or baud_rate is too low");
|
||||
|
||||
/* Note there are other fields (interrupts flag) in BDH register */
|
||||
u->bdh.field.sbr = (uint8_t)(sbr >> 8);
|
||||
u->bdl = (uint8_t)(sbr & 0xFF);
|
||||
u->c4.field.brfa = brfa;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable FIFO for K20 UART port
|
||||
*
|
||||
* @param uart_p UART data
|
||||
*
|
||||
* @return N/A
|
||||
*/
|
||||
static inline void _uart_k20_fifo_enable(volatile struct K20_UART *uart_p)
|
||||
{
|
||||
uint8_t tx_rx_state = uart_p->c2.value && (TX_EN_MASK | RX_EN_MASK);
|
||||
|
||||
/* disable Rx and Tx */
|
||||
uart_p->c2.value &= ~(TX_EN_MASK | RX_EN_MASK);
|
||||
|
||||
uart_p->pfifo.value |= (TX_FIFO_EN_MASK | RX_FIFO_EN_MASK);
|
||||
|
||||
uart_p->cfifo.value |= (TX_FIFO_FLUSH_MASK | RX_FIFO_FLUSH_MASK);
|
||||
|
||||
/* restore Rx and Tx */
|
||||
uart_p->c2.value |= tx_rx_state;
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _K20UART_H_ */
|
Loading…
Add table
Add a link
Reference in a new issue