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boards: frdm_mcxn947: Enable ENET QOS

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Enable ENET QOS on FRDM MCXN947 board

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2024-03-01 14:36:26 -06:00 • committed by Anas Nashif
commit 293cf9150c
6 changed files with 73 additions and 0 deletions
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9
boards/nxp/frdm_mcxn947/Kconfig.defconfig Normal file
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@ -0,0 +1,9 @@
# Copyright 2024 NXP
# SPDX-License-Identifier: Apache-2.0
if BOARD_FRDM_MCXN947
config NET_L2_ETHERNET
default y if NETWORKING
endif

9
boards/nxp/frdm_mcxn947/board.c
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@ -153,6 +153,15 @@ static int frdm_mcxn947_init(void)
CLOCK_EnableClock(kCLOCK_Dac1); CLOCK_EnableClock(kCLOCK_Dac1);
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(enet), okay)
CLOCK_AttachClk(kNONE_to_ENETRMII);
CLOCK_EnableClock(kCLOCK_Enet);
SYSCON0->PRESETCTRL2 = SYSCON_PRESETCTRL2_ENET_RST_MASK;
SYSCON0->PRESETCTRL2 &= ~SYSCON_PRESETCTRL2_ENET_RST_MASK;
/* rmii selection for this board */
SYSCON->ENET_PHY_INTF_SEL = SYSCON_ENET_PHY_INTF_SEL_PHY_SEL(1);
#endif
/* Set SystemCoreClock variable. */ /* Set SystemCoreClock variable. */
SystemCoreClock = CLOCK_INIT_CORE_CLOCK; SystemCoreClock = CLOCK_INIT_CORE_CLOCK;

2
boards/nxp/frdm_mcxn947/doc/index.rst
View file

@ -74,6 +74,8 @@ The FRDM-MCXN947 board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+ +-----------+------------+-------------------------------------+
| DAC | on-chip | dac | | DAC | on-chip | dac |
+-----------+------------+-------------------------------------+ +-----------+------------+-------------------------------------+
| ENET QOS | on-chip | ethernet |
+-----------+------------+-------------------------------------+
Targets available Targets available
================== ==================

22
boards/nxp/frdm_mcxn947/frdm_mcxn947-pinctrl.dtsi
View file

@ -69,4 +69,26 @@
slew-rate = "fast"; slew-rate = "fast";
}; };
}; };
pinmux_enet_qos: pinmux_enet_qos {
mdio_group {
pinmux = <ENET0_MDC_PIO1_20>,
<ENET0_MDIO_PIO1_21>;
slew-rate = "fast";
drive-strength = "low";
input-enable;
};
mac_group {
pinmux = <ENET0_RXDV_PIO1_13>,
<ENET0_RXD0_PIO1_14>,
<ENET0_RXD1_PIO1_15>,
<ENET0_TX_CLK_PIO1_4>,
<ENET0_TXEN_PIO1_5>,
<ENET0_TXD0_PIO1_6>,
<ENET0_TXD1_PIO1_7>;
slew-rate = "fast";
drive-strength = "low";
input-enable;
};
};
}; };

19
boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi
View file

@ -143,3 +143,22 @@
pinctrl-0 = <&pinmux_dac0>; pinctrl-0 = <&pinmux_dac0>;
pinctrl-names = "default"; pinctrl-names = "default";
}; };
&enet {
pinctrl-0 = <&pinmux_enet_qos>;
pinctrl-names = "default";
};
&enet_mac {
phy-connection-type = "rmii";
zephyr,random-mac-address;
phy-handle = <&phy>;
};
&enet_mdio {
phy: ethernet-phy@0 {
compatible = "ethernet-phy";
reg = <0>;
status = "okay";
};
};

12
boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0.dts
View file

@ -104,3 +104,15 @@
&dac0 { &dac0 {
status = "okay"; status = "okay";
}; };
&enet {
status = "okay";
};
&enet_mac {
status = "okay";
};
&enet_mdio {
status = "okay";
};