diff --git a/boards/arm/mps2_an385/dts_fixup.h b/boards/arm/mps2_an385/dts_fixup.h
index 5423d8602e3..5dc702dcf04 100644
--- a/boards/arm/mps2_an385/dts_fixup.h
+++ b/boards/arm/mps2_an385/dts_fixup.h
@@ -17,4 +17,16 @@
 #define DT_CMSDK_AHB_GPIO3			DT_ARM_CMSDK_GPIO_40013000_BASE_ADDRESS
 #define DT_IRQ_PORT3_ALL			DT_ARM_CMSDK_GPIO_40013000_IRQ_0
 
+#define DT_FPGAIO_LED0_GPIO_NAME		DT_ARM_MPS2_FPGAIO_GPIO_40028000_LABEL
+#define DT_FPGAIO_LED0_NUM			DT_ARM_MPS2_FPGAIO_GPIO_40028000_NGPIOS
+#define DT_FPGAIO_LED0				DT_ARM_MPS2_FPGAIO_GPIO_40028000_BASE_ADDRESS
+
+#define DT_FPGAIO_BUTTON_GPIO_NAME		DT_ARM_MPS2_FPGAIO_GPIO_40028008_LABEL
+#define DT_FPGAIO_BUTTON_NUM			DT_ARM_MPS2_FPGAIO_GPIO_40028008_NGPIOS
+#define DT_FPGAIO_BUTTON			DT_ARM_MPS2_FPGAIO_GPIO_40028008_BASE_ADDRESS
+
+#define DT_FPGAIO_MISC_GPIO_NAME		DT_ARM_MPS2_FPGAIO_GPIO_4002804C_LABEL
+#define DT_FPGAIO_MISC_NUM			DT_ARM_MPS2_FPGAIO_GPIO_4002804C_NGPIOS
+#define DT_FPGAIO_MISC				DT_ARM_MPS2_FPGAIO_GPIO_4002804C_BASE_ADDRESS
+
 /* End of SoC Level DTS fixup file */
diff --git a/boards/arm/mps2_an385/mps2_an385.dts b/boards/arm/mps2_an385/mps2_an385.dts
index 5bb064facf6..b7b9a13ba0b 100644
--- a/boards/arm/mps2_an385/mps2_an385.dts
+++ b/boards/arm/mps2_an385/mps2_an385.dts
@@ -199,6 +199,37 @@
 			reg = <0x4002a000 0x1000>;
 			label = "I2C_SHIELD1";
 		};
+
+		gpio_led0: mps2_fpgaio@40028000 {
+			compatible = "arm,mps2-fpgaio-gpio";
+
+			reg = <0x40028000 0x4>;
+			gpio-controller;
+			#gpio-cells = <1>;
+			ngpios = <2>;
+			label = "FPGA_LED0";
+		};
+
+		gpio_button: mps2_fpgaio@40028008 {
+			compatible = "arm,mps2-fpgaio-gpio";
+
+			reg = <0x40028008 0x4>;
+			gpio-controller;
+			#gpio-cells = <1>;
+			ngpios = <2>;
+			label = "FPGA_BUTTON";
+		};
+
+		gpio_misc: mps2_fpgaio@4002804c {
+			compatible = "arm,mps2-fpgaio-gpio";
+
+			reg = <0x4002804c 0x4>;
+			gpio-controller;
+			#gpio-cells = <1>;
+			ngpios = <10>;
+			label = "FPGA_MISC";
+		};
+
 	};
 };
 
diff --git a/boards/arm/mps2_an521/mps2_an521-common.dtsi b/boards/arm/mps2_an521/mps2_an521-common.dtsi
index 94b42342157..6d131b49764 100644
--- a/boards/arm/mps2_an521/mps2_an521-common.dtsi
+++ b/boards/arm/mps2_an521/mps2_an521-common.dtsi
@@ -168,3 +168,33 @@ i2c_shield1: i2c@20d000 {
 	reg = <0x20d000 0x1000>;
 	label = "I2C_SHIELD1";
 };
+
+gpio_led0: mps2_fpgaio@302000 {
+	compatible = "arm,mps2-fpgaio-gpio";
+
+	reg = <0x302000 0x4>;
+	gpio-controller;
+	#gpio-cells = <1>;
+	ngpios = <2>;
+	label = "FPGA_LED0";
+};
+
+gpio_button: mps2_fpgaio@302008 {
+	compatible = "arm,mps2-fpgaio-gpio";
+
+	reg = <0x302008 0x4>;
+	gpio-controller;
+	#gpio-cells = <1>;
+	ngpios = <2>;
+	label = "FPGA_BUTTON";
+};
+
+gpio_misc: mps2_fpgaio@30204c {
+	compatible = "arm,mps2-fpgaio-gpio";
+
+	reg = <0x30204c 0x4>;
+	gpio-controller;
+	#gpio-cells = <1>;
+	ngpios = <10>;
+	label = "FPGA_MISC";
+};
diff --git a/dts/bindings/gpio/arm,mps2-fpgaio-gpio.yaml b/dts/bindings/gpio/arm,mps2-fpgaio-gpio.yaml
new file mode 100644
index 00000000000..b2f47b93ba2
--- /dev/null
+++ b/dts/bindings/gpio/arm,mps2-fpgaio-gpio.yaml
@@ -0,0 +1,20 @@
+title: ARM MPS2 FPGA GPIO
+
+description: GPIO controller on ARM MPS2 FPGA
+
+compatible: "arm,mps2-fpgaio-gpio"
+
+include: [gpio-controller.yaml, base.yaml]
+
+properties:
+    reg:
+      required: true
+
+    ngpios:
+      required: true
+
+    "#gpio-cells":
+      const: 1
+
+gpio-cells:
+  - pin
diff --git a/soc/arm/arm/mps2/dts_fixup.h b/soc/arm/arm/mps2/dts_fixup.h
index 5bd9e6960b6..6d37502349a 100644
--- a/soc/arm/arm/mps2/dts_fixup.h
+++ b/soc/arm/arm/mps2/dts_fixup.h
@@ -36,6 +36,18 @@
 #define DT_CMSDK_AHB_GPIO3			DT_ARM_CMSDK_GPIO_40103000_BASE_ADDRESS
 #define DT_IRQ_PORT3_ALL			DT_ARM_CMSDK_GPIO_40103000_IRQ_0
 
+#define DT_FPGAIO_LED0_GPIO_NAME		DT_ARM_MPS2_FPGAIO_GPIO_40302000_LABEL
+#define DT_FPGAIO_LED0_NUM			DT_ARM_MPS2_FPGAIO_GPIO_40302000_NGPIOS
+#define DT_FPGAIO_LED0				DT_ARM_MPS2_FPGAIO_GPIO_40302000_BASE_ADDRESS
+
+#define DT_FPGAIO_BUTTON_GPIO_NAME		DT_ARM_MPS2_FPGAIO_GPIO_40302008_LABEL
+#define DT_FPGAIO_BUTTON_NUM			DT_ARM_MPS2_FPGAIO_GPIO_40302008_NGPIOS
+#define DT_FPGAIO_BUTTON			DT_ARM_MPS2_FPGAIO_GPIO_40302008_BASE_ADDRESS
+
+#define DT_FPGAIO_MISC_GPIO_NAME		DT_ARM_MPS2_FPGAIO_GPIO_4030204C_LABEL
+#define DT_FPGAIO_MISC_NUM			DT_ARM_MPS2_FPGAIO_GPIO_4030204C_NGPIOS
+#define DT_FPGAIO_MISC				DT_ARM_MPS2_FPGAIO_GPIO_4030204C_BASE_ADDRESS
+
 #else
 
 /* CMSDK APB Timers */
@@ -62,6 +74,18 @@
 #define DT_CMSDK_AHB_GPIO3			DT_ARM_CMSDK_GPIO_50103000_BASE_ADDRESS
 #define DT_IRQ_PORT3_ALL			DT_ARM_CMSDK_GPIO_50103000_IRQ_0
 
+#define DT_FPGAIO_LED0_GPIO_NAME		DT_ARM_MPS2_FPGAIO_GPIO_50302000_LABEL
+#define DT_FPGAIO_LED0_NUM			DT_ARM_MPS2_FPGAIO_GPIO_50302000_NGPIOS
+#define DT_FPGAIO_LED0				DT_ARM_MPS2_FPGAIO_GPIO_50302000_BASE_ADDRESS
+
+#define DT_FPGAIO_BUTTON_GPIO_NAME		DT_ARM_MPS2_FPGAIO_GPIO_50302008_LABEL
+#define DT_FPGAIO_BUTTON_NUM			DT_ARM_MPS2_FPGAIO_GPIO_50302008_NGPIOS
+#define DT_FPGAIO_BUTTON			DT_ARM_MPS2_FPGAIO_GPIO_50302008_BASE_ADDRESS
+
+#define DT_FPGAIO_MISC_GPIO_NAME		DT_ARM_MPS2_FPGAIO_GPIO_5030204C_LABEL
+#define DT_FPGAIO_MISC_NUM			DT_ARM_MPS2_FPGAIO_GPIO_5030204C_NGPIOS
+#define DT_FPGAIO_MISC				DT_ARM_MPS2_FPGAIO_GPIO_5030204C_BASE_ADDRESS
+
 #endif
 
 #endif /* CONFIG_SOC_MPS2_AN521 */
diff --git a/soc/arm/arm/mps2/soc.c b/soc/arm/arm/mps2/soc.c
index 2982b8c3e7c..d7ebbf1c143 100644
--- a/soc/arm/arm/mps2/soc.c
+++ b/soc/arm/arm/mps2/soc.c
@@ -13,12 +13,12 @@
 #include <soc.h>
 
 /* Setup GPIO drivers for accessing FPGAIO registers */
-GPIO_MMIO32_INIT(fpgaio_led0, FPGAIO_LED0_GPIO_NAME,
-				&__MPS2_FPGAIO->led0, FPGAIO_LED0_MASK);
-GPIO_MMIO32_INIT(fpgaio_button, FPGAIO_BUTTON_GPIO_NAME,
-				&__MPS2_FPGAIO->button, FPGAIO_BUTTON_MASK);
-GPIO_MMIO32_INIT(fpgaio_misc, FPGAIO_MISC_GPIO_NAME,
-				&__MPS2_FPGAIO->misc, FPGAIO_MISC_MASK);
+GPIO_MMIO32_INIT(fpgaio_led0, DT_FPGAIO_LED0_GPIO_NAME, DT_FPGAIO_LED0,
+				BIT_MASK(DT_FPGAIO_LED0_NUM));
+GPIO_MMIO32_INIT(fpgaio_button, DT_FPGAIO_BUTTON_GPIO_NAME, DT_FPGAIO_BUTTON,
+				BIT_MASK(DT_FPGAIO_BUTTON_NUM));
+GPIO_MMIO32_INIT(fpgaio_misc, DT_FPGAIO_MISC_GPIO_NAME, DT_FPGAIO_MISC,
+				BIT_MASK(DT_FPGAIO_MISC_NUM));
 
 /* (Secure System Control) Base Address */
 #define SSE_200_SYSTEM_CTRL_S_BASE	(0x50021000UL)
diff --git a/soc/arm/arm/mps2/soc.h b/soc/arm/arm/mps2/soc.h
index 14b8d95756a..937608b97ea 100644
--- a/soc/arm/arm/mps2/soc.h
+++ b/soc/arm/arm/mps2/soc.h
@@ -15,8 +15,8 @@
 #define __DSP_PRESENT             1U        /* DSP extension present */
 #endif
 
-#include <soc_devices.h>
 #include <generated_dts_board.h>
+#include <soc_registers.h>
 
 extern void wakeup_cpu1(void);
 
diff --git a/soc/arm/arm/mps2/soc_devices.h b/soc/arm/arm/mps2/soc_devices.h
deleted file mode 100644
index 9814c44f6ef..00000000000
--- a/soc/arm/arm/mps2/soc_devices.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Copyright (c) 2017 Linaro Limited
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#ifndef _SOC_DEVICES_H_
-#define _SOC_DEVICES_H_
-
-#ifndef _ASMLANGUAGE
-
-#include <stddef.h>
-#include "soc_registers.h"
-
-
-/* FPGA system control block (FPGAIO) */
-#define FPGAIO_BASE_ADDR	 (0x40028000)
-#define __MPS2_FPGAIO ((volatile struct mps2_fpgaio *)FPGAIO_BASE_ADDR)
-
-/* Names of GPIO drivers used to provide access to some FPGAIO registers */
-#define FPGAIO_LED0_GPIO_NAME		"FPGAIO_LED0"
-#define FPGAIO_BUTTON_GPIO_NAME		"FPGAIO_BUTTON"
-#define FPGAIO_MISC_GPIO_NAME		"FPGAIO_MISC"
-
-#endif /* !_ASMLANGUAGE */
-
-#endif /* _SOC_DEVICES_H_ */
diff --git a/soc/arm/arm/mps2/soc_registers.h b/soc/arm/arm/mps2/soc_registers.h
index 947ab9868f0..aa2463c9e92 100644
--- a/soc/arm/arm/mps2/soc_registers.h
+++ b/soc/arm/arm/mps2/soc_registers.h
@@ -45,16 +45,10 @@ struct mps2_fpgaio {
 #define FPGAIO_LED0_USERLED0		0
 #define FPGAIO_LED0_USERLED1		1
 
-/* Mask of valid bits in fpgaio led0 register */
-#define FPGAIO_LED0_MASK		BIT_MASK(2)
-
 /* Defines for bits in fpgaio button register */
 #define FPGAIO_BUTTON_USERPB0		0
 #define FPGAIO_BUTTON_USERPB1		1
 
-/* Mask of valid bits in fpgaio button register */
-#define FPGAIO_BUTTON_MASK		BIT_MASK(2)
-
 /* Defines for bits in fpgaio misc register */
 #define FPGAIO_MISC_CLCD_CS		0
 #define FPGAIO_MISC_SPI_SS		1
@@ -66,7 +60,4 @@ struct mps2_fpgaio {
 #define FPGAIO_MISC_SHIELD0_SPI_CS	8
 #define FPGAIO_MISC_SHIELD1_SPI_CS	9
 
-/* Mask of valid bits in fpgaio misc register */
-#define FPGAIO_MISC_MASK		BIT_MASK(10)
-
 #endif /* _ARM_MPS2_REGS_H_ */