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drivers: atmel sam0: Convert atmel sam0 drivers to new DT_INST macros

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Convert older DT_INST_ macro use in atmel sam0 drivers to the new
include/devicetree.h DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-03-24 15:41:31 -05:00 • committed by Maureen Helm
commit 28870e7a32
10 changed files with 82 additions and 62 deletions
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20
drivers/dma/dma_sam0.c
View file

@ -4,6 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam0_dmac
#include <device.h>
#include <soc.h>
#include <drivers/dma.h>
@ -11,7 +13,7 @@
#include <logging/log.h>
LOG_MODULE_REGISTER(dma_sam0, CONFIG_DMA_LOG_LEVEL);
#define DMA_REGS ((Dmac *)DT_INST_0_ATMEL_SAM0_DMAC_BASE_ADDRESS)
#define DMA_REGS ((Dmac *)DT_INST_REG_ADDR(0))
typedef void (*dma_callback)(void *callback_arg, u32_t channel,
int error_code);
@ -381,10 +383,10 @@ DEVICE_DECLARE(dma_sam0_0);
#define DMA_SAM0_IRQ_CONNECT(n) \
do { \
IRQ_CONNECT(DT_INST_0_ATMEL_SAM0_DMAC_IRQ_ ## n, \
DT_INST_0_ATMEL_SAM0_DMAC_IRQ_ ## n ## _PRIORITY, \
IRQ_CONNECT(DT_INST_IRQ_BY_IDX(0, n, irq), \
DT_INST_IRQ_HAS_IDX(0, n, priority), \
dma_sam0_isr, DEVICE_GET(dma_sam0_0), 0); \
irq_enable(DT_INST_0_ATMEL_SAM0_DMAC_IRQ_ ## n); \
irq_enable(DT_INST_IRQ_BY_IDX(0, n, irq)); \
} while (0)
static int dma_sam0_init(struct device *dev)
@ -411,19 +413,19 @@ static int dma_sam0_init(struct device *dev)
/* Enable the unit and enable all priorities */
DMA_REGS->CTRL.reg = DMAC_CTRL_DMAENABLE | DMAC_CTRL_LVLEN(0x0F);
#ifdef DT_INST_0_ATMEL_SAM0_DMAC_IRQ_0
#if DT_INST_IRQ_HAS_CELL(0, irq)
DMA_SAM0_IRQ_CONNECT(0);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_DMAC_IRQ_1
#if DT_INST_IRQ_HAS_IDX(0, 1)
DMA_SAM0_IRQ_CONNECT(1);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_DMAC_IRQ_2
#if DT_INST_IRQ_HAS_IDX(0, 2)
DMA_SAM0_IRQ_CONNECT(2);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_DMAC_IRQ_3
#if DT_INST_IRQ_HAS_IDX(0, 3)
DMA_SAM0_IRQ_CONNECT(3);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_DMAC_IRQ_4
#if DT_INST_IRQ_HAS_IDX(0, 4)
DMA_SAM0_IRQ_CONNECT(4);
#endif

6
drivers/flash/flash_sam0.c
View file

@ -4,6 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam0_nvmctrl
#define LOG_LEVEL CONFIG_FLASH_LOG_LEVEL
#include <logging/log.h>
LOG_MODULE_REGISTER(flash_sam0);
@ -30,7 +32,7 @@ LOG_MODULE_REGISTER(flash_sam0);
* Number of lock regions. The number is fixed and the region size
* grows with the flash size.
*/
#define LOCK_REGIONS DT_INST_0_ATMEL_SAM0_NVMCTRL_LOCK_REGIONS
#define LOCK_REGIONS DT_INST_PROP(0, lock_regions)
#define LOCK_REGION_SIZE (FLASH_SIZE / LOCK_REGIONS)
#if defined(NVMCTRL_BLOCK_SIZE)
@ -420,6 +422,6 @@ static const struct flash_driver_api flash_sam0_api = {
static struct flash_sam0_data flash_sam0_data_0;
DEVICE_AND_API_INIT(flash_sam0, DT_INST_0_ATMEL_SAM0_NVMCTRL_LABEL,
DEVICE_AND_API_INIT(flash_sam0, DT_INST_LABEL(0),
flash_sam0_init, &flash_sam0_data_0, NULL, POST_KERNEL,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &flash_sam0_api);

10
drivers/gpio/gpio_sam0.c
View file

@ -5,6 +5,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam0_gpio
#include <errno.h>
#include <device.h>
#include <drivers/gpio.h>
@ -304,7 +306,7 @@ static int gpio_sam0_init(struct device *dev) { return 0; }
static const struct gpio_sam0_config gpio_sam0_config_0 = {
.common = {
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_0_ATMEL_SAM0_GPIO_NGPIOS),
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(0, ngpios)),
},
.regs = (PortGroup *)DT_ATMEL_SAM0_GPIO_PORT_A_BASE_ADDRESS,
#ifdef CONFIG_SAM0_EIC
@ -325,7 +327,7 @@ DEVICE_AND_API_INIT(gpio_sam0_0, DT_ATMEL_SAM0_GPIO_PORT_A_LABEL,
static const struct gpio_sam0_config gpio_sam0_config_1 = {
.common = {
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_1_ATMEL_SAM0_GPIO_NGPIOS),
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(1, ngpios)),
},
.regs = (PortGroup *)DT_ATMEL_SAM0_GPIO_PORT_B_BASE_ADDRESS,
#ifdef CONFIG_SAM0_EIC
@ -346,7 +348,7 @@ DEVICE_AND_API_INIT(gpio_sam0_1, DT_ATMEL_SAM0_GPIO_PORT_B_LABEL,
static const struct gpio_sam0_config gpio_sam0_config_2 = {
.common = {
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_2_ATMEL_SAM0_GPIO_NGPIOS),
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(2, ngpios)),
},
.regs = (PortGroup *)DT_ATMEL_SAM0_GPIO_PORT_C_BASE_ADDRESS,
#ifdef CONFIG_SAM0_EIC
@ -367,7 +369,7 @@ DEVICE_AND_API_INIT(gpio_sam0_2, DT_ATMEL_SAM0_GPIO_PORT_C_LABEL,
static const struct gpio_sam0_config gpio_sam0_config_3 = {
.common = {
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_3_ATMEL_SAM0_GPIO_NGPIOS),
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(3, ngpios)),
},
.regs = (PortGroup *)DT_ATMEL_SAM0_GPIO_PORT_D_BASE_ADDRESS,
#ifdef CONFIG_SAM0_EIC

10
drivers/hwinfo/hwinfo_sam0.c
View file

@ -4,6 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam0_id
#include <soc.h>
#include <drivers/hwinfo.h>
#include <string.h>
@ -16,10 +18,10 @@ ssize_t z_impl_hwinfo_get_device_id(u8_t *buffer, size_t length)
{
struct sam0_uid dev_id;
dev_id.id[0] = *(const u32_t *) DT_INST_0_ATMEL_SAM0_ID_BASE_ADDRESS_0;
dev_id.id[1] = *(const u32_t *) DT_INST_0_ATMEL_SAM0_ID_BASE_ADDRESS_1;
dev_id.id[2] = *(const u32_t *) DT_INST_0_ATMEL_SAM0_ID_BASE_ADDRESS_2;
dev_id.id[3] = *(const u32_t *) DT_INST_0_ATMEL_SAM0_ID_BASE_ADDRESS_3;
dev_id.id[0] = *(const u32_t *) DT_INST_REG_ADDR_BY_IDX(0, 0);
dev_id.id[1] = *(const u32_t *) DT_INST_REG_ADDR_BY_IDX(0, 1);
dev_id.id[2] = *(const u32_t *) DT_INST_REG_ADDR_BY_IDX(0, 2);
dev_id.id[3] = *(const u32_t *) DT_INST_REG_ADDR_BY_IDX(0, 3);
if (length > sizeof(dev_id.id)) {
length = sizeof(dev_id.id);

4
drivers/i2c/i2c_sam0.c
View file

@ -4,6 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam0_i2c
#include <errno.h>
#include <device.h>
@ -775,7 +777,7 @@ static const struct i2c_driver_api i2c_sam0_driver_api = {
irq_enable(DT_ATMEL_SAM0_I2C_SERCOM_IRQ(n, m)); \
} while (0)
#ifdef DT_INST_0_ATMEL_SAM0_I2C_IRQ_3
#if DT_INST_IRQ_HAS_IDX(0, 3)
#define I2C_SAM0_IRQ_HANDLER(n) \
static void i2c_sam0_irq_config_##n(struct device *dev) \
{ \

42
drivers/interrupt_controller/intc_sam0_eic.c
View file

@ -4,6 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam0_eic
#include <device.h>
#include <soc.h>
#include <drivers/interrupt_controller/sam0_eic.h>
@ -330,10 +332,10 @@ u32_t sam0_eic_interrupt_pending(int port)
#define SAM0_EIC_IRQ_CONNECT(n) \
do { \
IRQ_CONNECT(DT_INST_0_ATMEL_SAM0_EIC_IRQ_ ## n, \
DT_INST_0_ATMEL_SAM0_EIC_IRQ_ ## n ## _PRIORITY, \
IRQ_CONNECT(DT_INST_IRQ_BY_IDX(0, n, irq), \
DT_INST_IRQ_BY_IDX(0, n, priority), \
sam0_eic_isr, DEVICE_GET(sam0_eic), 0); \
irq_enable(DT_INST_0_ATMEL_SAM0_EIC_IRQ_ ## n); \
irq_enable(DT_INST_IRQ_BY_IDX(0, n, irq)); \
} while (0)
static int sam0_eic_init(struct device *dev)
@ -356,52 +358,52 @@ static int sam0_eic_init(struct device *dev)
GCLK_CLKCTRL_CLKEN;
#endif
#ifdef DT_INST_0_ATMEL_SAM0_EIC_IRQ_0
#if DT_INST_IRQ_HAS_CELL(0, irq)
SAM0_EIC_IRQ_CONNECT(0);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_EIC_IRQ_1
#if DT_INST_IRQ_HAS_IDX(0, 1)
SAM0_EIC_IRQ_CONNECT(1);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_EIC_IRQ_2
#if DT_INST_IRQ_HAS_IDX(0, 2)
SAM0_EIC_IRQ_CONNECT(2);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_EIC_IRQ_3
#if DT_INST_IRQ_HAS_IDX(0, 3)
SAM0_EIC_IRQ_CONNECT(3);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_EIC_IRQ_4
#if DT_INST_IRQ_HAS_IDX(0, 4)
SAM0_EIC_IRQ_CONNECT(4);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_EIC_IRQ_5
#if DT_INST_IRQ_HAS_IDX(0, 5)
SAM0_EIC_IRQ_CONNECT(5);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_EIC_IRQ_6
#if DT_INST_IRQ_HAS_IDX(0, 6)
SAM0_EIC_IRQ_CONNECT(6);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_EIC_IRQ_7
#if DT_INST_IRQ_HAS_IDX(0, 7)
SAM0_EIC_IRQ_CONNECT(7);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_EIC_IRQ_8
#if DT_INST_IRQ_HAS_IDX(0, 8)
SAM0_EIC_IRQ_CONNECT(8);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_EIC_IRQ_9
#if DT_INST_IRQ_HAS_IDX(0, 9)
SAM0_EIC_IRQ_CONNECT(9);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_EIC_IRQ_10
#if DT_INST_IRQ_HAS_IDX(0, 10)
SAM0_EIC_IRQ_CONNECT(10);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_EIC_IRQ_11
#if DT_INST_IRQ_HAS_IDX(0, 11)
SAM0_EIC_IRQ_CONNECT(11);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_EIC_IRQ_12
#if DT_INST_IRQ_HAS_IDX(0, 12)
SAM0_EIC_IRQ_CONNECT(12);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_EIC_IRQ_13
#if DT_INST_IRQ_HAS_IDX(0, 13)
SAM0_EIC_IRQ_CONNECT(13);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_EIC_IRQ_14
#if DT_INST_IRQ_HAS_IDX(0, 14)
SAM0_EIC_IRQ_CONNECT(14);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_EIC_IRQ_15
#if DT_INST_IRQ_HAS_IDX(0, 15)
SAM0_EIC_IRQ_CONNECT(15);
#endif
@ -412,6 +414,6 @@ static int sam0_eic_init(struct device *dev)
}
static struct sam0_eic_data eic_data;
DEVICE_INIT(sam0_eic, DT_INST_0_ATMEL_SAM0_EIC_LABEL, sam0_eic_init,
DEVICE_INIT(sam0_eic, DT_INST_LABEL(0), sam0_eic_init,
&eic_data, NULL,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);

4
drivers/serial/uart_sam0.c
View file

@ -4,6 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam0_uart
#include <device.h>
#include <errno.h>
#include <init.h>
@ -940,7 +942,7 @@ static const struct uart_driver_api uart_sam0_driver_api = {
#define UART_SAM0_IRQ_HANDLER_FUNC(n) \
.irq_config_func = uart_sam0_irq_config_##n,
#ifdef DT_INST_0_ATMEL_SAM0_UART_IRQ_3
#if DT_INST_IRQ_HAS_IDX(0, 3)
#define UART_SAM0_IRQ_HANDLER(n) \
static void uart_sam0_irq_config_##n(struct device *dev) \
{ \

14
drivers/timer/sam0_rtc_timer.c
View file

@ -4,6 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam0_rtc
/**
* @file
* @brief Atmel SAM0 series RTC-based system timer
@ -20,7 +22,7 @@
#include <sys_clock.h>
/* RTC registers. */
#define RTC0 ((RtcMode0 *) DT_INST_0_ATMEL_SAM0_RTC_BASE_ADDRESS)
#define RTC0 ((RtcMode0 *) DT_INST_REG_ADDR(0))
#ifdef MCLK
#define RTC_CLOCK_HW_CYCLES_PER_SEC SOC_ATMEL_SAM0_OSC32K_FREQ_HZ
@ -184,7 +186,7 @@ int z_clock_driver_init(struct device *device)
/* Set up bus clock and GCLK generator. */
PM->APBAMASK.reg |= PM_APBAMASK_RTC;
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(RTC_GCLK_ID) | GCLK_CLKCTRL_CLKEN
| GCLK_GEN(DT_INST_0_ATMEL_SAM0_RTC_CLOCK_GENERATOR);
| GCLK_GEN(DT_INST_CLOCKS_CELL(0, generator));
/* Synchronize GCLK. */
while (GCLK->STATUS.bit.SYNCBUSY) {
@ -238,10 +240,10 @@ int z_clock_driver_init(struct device *device)
#endif
/* Enable RTC interrupt. */
NVIC_ClearPendingIRQ(DT_INST_0_ATMEL_SAM0_RTC_IRQ_0);
IRQ_CONNECT(DT_INST_0_ATMEL_SAM0_RTC_IRQ_0,
DT_INST_0_ATMEL_SAM0_RTC_IRQ_0_PRIORITY, rtc_isr, 0, 0);
irq_enable(DT_INST_0_ATMEL_SAM0_RTC_IRQ_0);
NVIC_ClearPendingIRQ(DT_INST_IRQN(0));
IRQ_CONNECT(DT_INST_IRQN(0),
DT_INST_IRQ(0, priority), rtc_isr, 0, 0);
irq_enable(DT_INST_IRQN(0));
return 0;
}

22
drivers/usb/device/usb_dc_sam0.c
View file

@ -4,6 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam0_usb
#define LOG_LEVEL CONFIG_USB_DRIVER_LOG_LEVEL
#include <logging/log.h>
LOG_MODULE_REGISTER(usb_dc_sam0);
@ -21,8 +23,8 @@ LOG_MODULE_REGISTER(usb_dc_sam0);
#define USB_SAM0_IN_EP 0x80
#define REGS ((Usb *)DT_INST_0_ATMEL_SAM0_USB_BASE_ADDRESS)
#define USB_NUM_ENDPOINTS DT_INST_0_ATMEL_SAM0_USB_NUM_BIDIR_ENDPOINTS
#define REGS ((Usb *)DT_INST_REG_ADDR(0))
#define USB_NUM_ENDPOINTS DT_INST_PROP(0, num_bidir_endpoints)
struct usb_sam0_data {
UsbDeviceDescriptor descriptors[USB_NUM_ENDPOINTS];
@ -180,10 +182,10 @@ static void usb_sam0_load_padcal(void)
#define SAM0_USB_IRQ_CONNECT(n) \
do { \
IRQ_CONNECT(DT_INST_0_ATMEL_SAM0_USB_IRQ_##n, \
DT_INST_0_ATMEL_SAM0_USB_IRQ_##n##_PRIORITY,\
IRQ_CONNECT(DT_INST_IRQ_BY_IDX(0, n, irq), \
DT_INST_IRQ_BY_IDX(0, n, priority), \
usb_sam0_isr, 0, 0); \
irq_enable(DT_INST_0_ATMEL_SAM0_USB_IRQ_##n); \
irq_enable(DT_INST_IRQ_BY_IDX(0, n, irq)); \
} while (0)
/* Attach by initializing the device */
@ -235,16 +237,16 @@ int usb_dc_attach(void)
regs->INTENSET.reg = USB_DEVICE_INTENSET_EORST;
/* Connect and enable the interrupt */
#ifdef DT_INST_0_ATMEL_SAM0_USB_IRQ_0
#if DT_INST_IRQ_HAS_CELL(0, irq)
SAM0_USB_IRQ_CONNECT(0);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_USB_IRQ_1
#if DT_INST_IRQ_HAS_IDX(0, 1)
SAM0_USB_IRQ_CONNECT(1);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_USB_IRQ_2
#if DT_INST_IRQ_HAS_IDX(0, 2)
SAM0_USB_IRQ_CONNECT(2);
#endif
#ifdef DT_INST_0_ATMEL_SAM0_USB_IRQ_3
#if DT_INST_IRQ_HAS_IDX(0, 3)
SAM0_USB_IRQ_CONNECT(3);
#endif
@ -272,7 +274,7 @@ int usb_dc_reset(void)
{
UsbDevice *regs = &REGS->DEVICE;
irq_disable(DT_INST_0_ATMEL_SAM0_USB_IRQ_0);
irq_disable(DT_INST_IRQN(0));
regs->CTRLA.bit.SWRST = 1;
usb_sam0_wait_syncbusy();

12
drivers/watchdog/wdt_sam0.c
View file

@ -5,6 +5,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam0_watchdog
#include <soc.h>
#include <drivers/watchdog.h>
@ -12,7 +14,7 @@
#include <logging/log.h>
LOG_MODULE_REGISTER(wdt_sam0);
#define WDT_REGS ((Wdt *)DT_INST_0_ATMEL_SAM0_WATCHDOG_BASE_ADDRESS)
#define WDT_REGS ((Wdt *)DT_INST_REG_ADDR(0))
#ifndef WDT_CONFIG_PER_8_Val
#define WDT_CONFIG_PER_8_Val WDT_CONFIG_PER_CYC8_Val
@ -262,16 +264,16 @@ static int wdt_sam0_init(struct device *dev)
| GCLK_CLKCTRL_CLKEN;
#endif
IRQ_CONNECT(DT_INST_0_ATMEL_SAM0_WATCHDOG_IRQ_0,
DT_INST_0_ATMEL_SAM0_WATCHDOG_IRQ_0_PRIORITY, wdt_sam0_isr,
IRQ_CONNECT(DT_INST_IRQN(0),
DT_INST_IRQ(0, priority), wdt_sam0_isr,
DEVICE_GET(wdt_sam0), 0);
irq_enable(DT_INST_0_ATMEL_SAM0_WATCHDOG_IRQ_0);
irq_enable(DT_INST_IRQN(0));
return 0;
}
static struct wdt_sam0_dev_data wdt_sam0_data;
DEVICE_AND_API_INIT(wdt_sam0, DT_INST_0_ATMEL_SAM0_WATCHDOG_LABEL, wdt_sam0_init,
DEVICE_AND_API_INIT(wdt_sam0, DT_INST_LABEL(0), wdt_sam0_init,
&wdt_sam0_data, NULL, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &wdt_sam0_api);