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bbram: npcx: Add emulator

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Add an emulator for the NPCX BBRAM which supports reading and writing

Signed-off-by: Yuval Peress <peress@google.com>
This commit is contained in:
Yuval Peress 2024-01-05 12:19:08 -07:00 • committed by Carles Cufí
commit 2772843cf1
5 changed files with 119 additions and 22 deletions
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2
drivers/bbram/CMakeLists.txt
View file

@ -7,6 +7,8 @@ zephyr_library_sources_ifdef(CONFIG_BBRAM_SHELL bbram_shell.c)
zephyr_library_sources_ifdef(CONFIG_USERSPACE bbram_handlers.c)
zephyr_library_sources_ifdef(CONFIG_BBRAM_NPCX bbram_npcx.c)
zephyr_library_sources_ifdef(CONFIG_BBRAM_NPCX_EMUL bbram_npcx_emul.c)
zephyr_library_include_directories_ifdef(CONFIG_BBRAM_NPCX .)
zephyr_library_sources_ifdef(CONFIG_BBRAM_IT8XXX2 bbram_it8xxx2.c)
zephyr_library_sources_ifdef(CONFIG_BBRAM_IT8XXX2_EMUL bbram_it8xxx2_emul.c)
zephyr_library_include_directories_ifdef(CONFIG_BBRAM_IT8XXX2 .)

8
drivers/bbram/Kconfig.npcx
View file

@ -7,3 +7,11 @@ config BBRAM_NPCX
depends on DT_HAS_NUVOTON_NPCX_BBRAM_ENABLED
help
This option enables the BBRAM driver for NPCX family of processors.
config BBRAM_NPCX_EMUL
bool "Emulator for the NPCX BBRAM driver"
default y
depends on BBRAM_NPCX
depends on EMUL
help
Enable the emulator for the NPCX BBRAM.

30
drivers/bbram/bbram_npcx.c
View file

@ -11,17 +11,9 @@
#include <zephyr/sys/util.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(bbram, CONFIG_BBRAM_LOG_LEVEL);
LOG_MODULE_REGISTER(npcx_bbram, CONFIG_BBRAM_LOG_LEVEL);
/** Device config */
struct bbram_npcx_config {
/** BBRAM base address */
uintptr_t base_addr;
/** BBRAM size (Unit:bytes) */
int size;
/** Status register base address */
uintptr_t status_reg_addr;
};
#include "npcx.h"
#define NPCX_STATUS_IBBR BIT(7)
#define NPCX_STATUS_VSBY BIT(1)
@ -35,7 +27,7 @@ static int get_bit_and_reset(const struct device *dev, int mask)
int result = DRV_STATUS(dev) & mask;
/* Clear the bit(s) */
DRV_STATUS(dev) = mask;
DRV_STATUS(dev) &= ~mask;
return result;
}
@ -69,7 +61,7 @@ static int bbram_npcx_read(const struct device *dev, size_t offset, size_t size,
const struct bbram_npcx_config *config = dev->config;
if (size < 1 || offset + size > config->size || bbram_npcx_check_invalid(dev)) {
return -EFAULT;
return -EINVAL;
}
@ -83,7 +75,7 @@ static int bbram_npcx_write(const struct device *dev, size_t offset, size_t size
const struct bbram_npcx_config *config = dev->config;
if (size < 1 || offset + size > config->size || bbram_npcx_check_invalid(dev)) {
return -EFAULT;
return -EINVAL;
}
bytecpy(((uint8_t *)config->base_addr + offset), data, size);
@ -100,14 +92,8 @@ static const struct bbram_driver_api bbram_npcx_driver_api = {
};
#define BBRAM_INIT(inst) \
static struct { \
} bbram_data_##inst; \
static const struct bbram_npcx_config bbram_cfg_##inst = { \
.base_addr = DT_INST_REG_ADDR_BY_NAME(inst, memory), \
.size = DT_INST_REG_SIZE_BY_NAME(inst, memory), \
.status_reg_addr = DT_INST_REG_ADDR_BY_NAME(inst, status), \
}; \
DEVICE_DT_INST_DEFINE(inst, NULL, NULL, &bbram_data_##inst, &bbram_cfg_##inst, \
PRE_KERNEL_1, CONFIG_BBRAM_INIT_PRIORITY, &bbram_npcx_driver_api);
BBRAM_NPCX_DECL_CONFIG(inst); \
DEVICE_DT_INST_DEFINE(inst, NULL, NULL, NULL, &bbram_cfg_##inst, PRE_KERNEL_1, \
CONFIG_BBRAM_INIT_PRIORITY, &bbram_npcx_driver_api);
DT_INST_FOREACH_STATUS_OKAY(BBRAM_INIT);

60
drivers/bbram/bbram_npcx_emul.c Normal file
View file

@ -0,0 +1,60 @@
/*
* Copyright (c) 2024 Google Inc
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/devicetree.h>
#include <zephyr/drivers/emul.h>
#include <zephyr/drivers/emul_bbram.h>
#include "npcx.h"
#define DT_DRV_COMPAT nuvoton_npcx_bbram
struct bbram_npcx_emul_config {
const struct device *dev;
};
#define GET_CONFIG(target) \
((const struct bbram_npcx_config \
*)(((const struct bbram_npcx_emul_config *)((target)->cfg))->dev->config))
static int npcx_emul_backend_set_data(const struct emul *target, size_t offset, size_t count,
const uint8_t *buffer)
{
const struct bbram_npcx_config *config = GET_CONFIG(target);
if (offset + count > config->size) {
return -ERANGE;
}
bytecpy(((uint8_t *)config->base_addr + offset), buffer, count);
return 0;
}
static int npcx_emul_backend_get_data(const struct emul *target, size_t offset, size_t count,
uint8_t *buffer)
{
const struct bbram_npcx_config *config = GET_CONFIG(target);
if (offset + count > config->size) {
return -ERANGE;
}
bytecpy(buffer, ((uint8_t *)config->base_addr + offset), count);
return 0;
}
static const struct emul_bbram_backend_api npcx_emul_backend_api = {
.set_data = npcx_emul_backend_set_data,
.get_data = npcx_emul_backend_get_data,
};
#define BBRAM_EMUL_INIT(inst) \
static struct bbram_npcx_emul_config bbram_npcx_emul_config_##inst = { \
.dev = DEVICE_DT_INST_GET(inst), \
}; \
EMUL_DT_INST_DEFINE(inst, NULL, NULL, &bbram_npcx_emul_config_##inst, NULL, \
&npcx_emul_backend_api)
DT_INST_FOREACH_STATUS_OKAY(BBRAM_EMUL_INIT);

41
drivers/bbram/npcx.h Normal file
View file

@ -0,0 +1,41 @@
/*
* Copyright (c) 2024 Google Inc
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef INCLUDE_ZEPHYR_DRIVERS_BBRAM_NPCX_H_
#define INCLUDE_ZEPHYR_DRIVERS_BBRAM_NPCX_H_
#include <stdint.h>
#include <zephyr/devicetree.h>
/** Device config */
struct bbram_npcx_config {
/** BBRAM base address */
uintptr_t base_addr;
/** BBRAM size (Unit:bytes) */
int size;
/** Status register base address */
uintptr_t status_reg_addr;
};
#ifdef CONFIG_BBRAM_NPCX_EMUL
#define BBRAM_NPCX_DECL_CONFIG(inst) \
static uint8_t bbram_npcx_emul_buffer_##inst[DT_INST_REG_SIZE_BY_NAME(inst, memory)]; \
static uint8_t bbram_npcx_emul_status_##inst; \
static const struct bbram_npcx_config bbram_cfg_##inst = { \
.base_addr = (uintptr_t)bbram_npcx_emul_buffer_##inst, \
.size = DT_INST_REG_SIZE_BY_NAME(inst, memory), \
.status_reg_addr = (uintptr_t)&bbram_npcx_emul_status_##inst, \
}
#else
#define BBRAM_NPCX_DECL_CONFIG(inst) \
static const struct bbram_npcx_config bbram_cfg_##inst = { \
.base_addr = DT_INST_REG_ADDR_BY_NAME(inst, memory), \
.size = DT_INST_REG_SIZE_BY_NAME(inst, memory), \
.status_reg_addr = DT_INST_REG_ADDR_BY_NAME(inst, status), \
}
#endif
#endif /* INCLUDE_ZEPHYR_DRIVERS_BBRAM_NPCX_H_ */