bbram: npcx: Add emulator
Add an emulator for the NPCX BBRAM which supports reading and writing Signed-off-by: Yuval Peress <peress@google.com>
This commit is contained in:
parent
69dfb2fee3
commit
2772843cf1
5 changed files with 119 additions and 22 deletions
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@ -7,6 +7,8 @@ zephyr_library_sources_ifdef(CONFIG_BBRAM_SHELL bbram_shell.c)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE bbram_handlers.c)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE bbram_handlers.c)
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zephyr_library_sources_ifdef(CONFIG_BBRAM_NPCX bbram_npcx.c)
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zephyr_library_sources_ifdef(CONFIG_BBRAM_NPCX bbram_npcx.c)
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zephyr_library_sources_ifdef(CONFIG_BBRAM_NPCX_EMUL bbram_npcx_emul.c)
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zephyr_library_include_directories_ifdef(CONFIG_BBRAM_NPCX .)
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zephyr_library_sources_ifdef(CONFIG_BBRAM_IT8XXX2 bbram_it8xxx2.c)
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zephyr_library_sources_ifdef(CONFIG_BBRAM_IT8XXX2 bbram_it8xxx2.c)
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zephyr_library_sources_ifdef(CONFIG_BBRAM_IT8XXX2_EMUL bbram_it8xxx2_emul.c)
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zephyr_library_sources_ifdef(CONFIG_BBRAM_IT8XXX2_EMUL bbram_it8xxx2_emul.c)
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zephyr_library_include_directories_ifdef(CONFIG_BBRAM_IT8XXX2 .)
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zephyr_library_include_directories_ifdef(CONFIG_BBRAM_IT8XXX2 .)
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@ -7,3 +7,11 @@ config BBRAM_NPCX
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depends on DT_HAS_NUVOTON_NPCX_BBRAM_ENABLED
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depends on DT_HAS_NUVOTON_NPCX_BBRAM_ENABLED
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help
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help
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This option enables the BBRAM driver for NPCX family of processors.
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This option enables the BBRAM driver for NPCX family of processors.
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config BBRAM_NPCX_EMUL
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bool "Emulator for the NPCX BBRAM driver"
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default y
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depends on BBRAM_NPCX
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depends on EMUL
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help
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Enable the emulator for the NPCX BBRAM.
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@ -11,17 +11,9 @@
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#include <zephyr/sys/util.h>
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#include <zephyr/sys/util.h>
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#include <zephyr/logging/log.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(bbram, CONFIG_BBRAM_LOG_LEVEL);
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LOG_MODULE_REGISTER(npcx_bbram, CONFIG_BBRAM_LOG_LEVEL);
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/** Device config */
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#include "npcx.h"
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struct bbram_npcx_config {
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/** BBRAM base address */
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uintptr_t base_addr;
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/** BBRAM size (Unit:bytes) */
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int size;
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/** Status register base address */
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uintptr_t status_reg_addr;
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};
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#define NPCX_STATUS_IBBR BIT(7)
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#define NPCX_STATUS_IBBR BIT(7)
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#define NPCX_STATUS_VSBY BIT(1)
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#define NPCX_STATUS_VSBY BIT(1)
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@ -35,7 +27,7 @@ static int get_bit_and_reset(const struct device *dev, int mask)
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int result = DRV_STATUS(dev) & mask;
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int result = DRV_STATUS(dev) & mask;
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/* Clear the bit(s) */
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/* Clear the bit(s) */
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DRV_STATUS(dev) = mask;
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DRV_STATUS(dev) &= ~mask;
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return result;
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return result;
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}
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}
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@ -69,7 +61,7 @@ static int bbram_npcx_read(const struct device *dev, size_t offset, size_t size,
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const struct bbram_npcx_config *config = dev->config;
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const struct bbram_npcx_config *config = dev->config;
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if (size < 1 || offset + size > config->size || bbram_npcx_check_invalid(dev)) {
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if (size < 1 || offset + size > config->size || bbram_npcx_check_invalid(dev)) {
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return -EFAULT;
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return -EINVAL;
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}
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}
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@ -83,7 +75,7 @@ static int bbram_npcx_write(const struct device *dev, size_t offset, size_t size
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const struct bbram_npcx_config *config = dev->config;
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const struct bbram_npcx_config *config = dev->config;
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if (size < 1 || offset + size > config->size || bbram_npcx_check_invalid(dev)) {
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if (size < 1 || offset + size > config->size || bbram_npcx_check_invalid(dev)) {
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return -EFAULT;
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return -EINVAL;
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}
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}
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bytecpy(((uint8_t *)config->base_addr + offset), data, size);
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bytecpy(((uint8_t *)config->base_addr + offset), data, size);
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@ -100,14 +92,8 @@ static const struct bbram_driver_api bbram_npcx_driver_api = {
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};
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};
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#define BBRAM_INIT(inst) \
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#define BBRAM_INIT(inst) \
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static struct { \
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BBRAM_NPCX_DECL_CONFIG(inst); \
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} bbram_data_##inst; \
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DEVICE_DT_INST_DEFINE(inst, NULL, NULL, NULL, &bbram_cfg_##inst, PRE_KERNEL_1, \
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static const struct bbram_npcx_config bbram_cfg_##inst = { \
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CONFIG_BBRAM_INIT_PRIORITY, &bbram_npcx_driver_api);
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.base_addr = DT_INST_REG_ADDR_BY_NAME(inst, memory), \
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.size = DT_INST_REG_SIZE_BY_NAME(inst, memory), \
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.status_reg_addr = DT_INST_REG_ADDR_BY_NAME(inst, status), \
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}; \
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DEVICE_DT_INST_DEFINE(inst, NULL, NULL, &bbram_data_##inst, &bbram_cfg_##inst, \
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PRE_KERNEL_1, CONFIG_BBRAM_INIT_PRIORITY, &bbram_npcx_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(BBRAM_INIT);
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DT_INST_FOREACH_STATUS_OKAY(BBRAM_INIT);
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60
drivers/bbram/bbram_npcx_emul.c
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60
drivers/bbram/bbram_npcx_emul.c
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@ -0,0 +1,60 @@
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/*
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* Copyright (c) 2024 Google Inc
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/devicetree.h>
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#include <zephyr/drivers/emul.h>
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#include <zephyr/drivers/emul_bbram.h>
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#include "npcx.h"
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#define DT_DRV_COMPAT nuvoton_npcx_bbram
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struct bbram_npcx_emul_config {
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const struct device *dev;
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};
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#define GET_CONFIG(target) \
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((const struct bbram_npcx_config \
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*)(((const struct bbram_npcx_emul_config *)((target)->cfg))->dev->config))
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static int npcx_emul_backend_set_data(const struct emul *target, size_t offset, size_t count,
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const uint8_t *buffer)
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{
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const struct bbram_npcx_config *config = GET_CONFIG(target);
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if (offset + count > config->size) {
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return -ERANGE;
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}
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bytecpy(((uint8_t *)config->base_addr + offset), buffer, count);
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return 0;
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}
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static int npcx_emul_backend_get_data(const struct emul *target, size_t offset, size_t count,
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uint8_t *buffer)
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{
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const struct bbram_npcx_config *config = GET_CONFIG(target);
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if (offset + count > config->size) {
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return -ERANGE;
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}
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bytecpy(buffer, ((uint8_t *)config->base_addr + offset), count);
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return 0;
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}
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static const struct emul_bbram_backend_api npcx_emul_backend_api = {
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.set_data = npcx_emul_backend_set_data,
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.get_data = npcx_emul_backend_get_data,
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};
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#define BBRAM_EMUL_INIT(inst) \
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static struct bbram_npcx_emul_config bbram_npcx_emul_config_##inst = { \
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.dev = DEVICE_DT_INST_GET(inst), \
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}; \
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EMUL_DT_INST_DEFINE(inst, NULL, NULL, &bbram_npcx_emul_config_##inst, NULL, \
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&npcx_emul_backend_api)
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DT_INST_FOREACH_STATUS_OKAY(BBRAM_EMUL_INIT);
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41
drivers/bbram/npcx.h
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41
drivers/bbram/npcx.h
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/*
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* Copyright (c) 2024 Google Inc
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef INCLUDE_ZEPHYR_DRIVERS_BBRAM_NPCX_H_
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#define INCLUDE_ZEPHYR_DRIVERS_BBRAM_NPCX_H_
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#include <stdint.h>
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#include <zephyr/devicetree.h>
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/** Device config */
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struct bbram_npcx_config {
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/** BBRAM base address */
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uintptr_t base_addr;
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/** BBRAM size (Unit:bytes) */
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int size;
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/** Status register base address */
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uintptr_t status_reg_addr;
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};
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#ifdef CONFIG_BBRAM_NPCX_EMUL
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#define BBRAM_NPCX_DECL_CONFIG(inst) \
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static uint8_t bbram_npcx_emul_buffer_##inst[DT_INST_REG_SIZE_BY_NAME(inst, memory)]; \
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static uint8_t bbram_npcx_emul_status_##inst; \
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static const struct bbram_npcx_config bbram_cfg_##inst = { \
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.base_addr = (uintptr_t)bbram_npcx_emul_buffer_##inst, \
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.size = DT_INST_REG_SIZE_BY_NAME(inst, memory), \
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.status_reg_addr = (uintptr_t)&bbram_npcx_emul_status_##inst, \
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}
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#else
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#define BBRAM_NPCX_DECL_CONFIG(inst) \
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static const struct bbram_npcx_config bbram_cfg_##inst = { \
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.base_addr = DT_INST_REG_ADDR_BY_NAME(inst, memory), \
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.size = DT_INST_REG_SIZE_BY_NAME(inst, memory), \
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.status_reg_addr = DT_INST_REG_ADDR_BY_NAME(inst, status), \
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}
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#endif
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#endif /* INCLUDE_ZEPHYR_DRIVERS_BBRAM_NPCX_H_ */
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