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dts: nordic: Change compatible property for EXMIF node

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This is a follow-up to commit cdf45cb234077522b5cef2da084869af43d42dc1.

Adjust the DTS node for the nRF EXMIF peripheral so that it is possible
to handle the peripheral with the generic MSPI driver for DW SSI based
controllers and use all its data lines in communication.
Also adjust the related board files accordingly.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit is contained in:
Andrzej Głąbek 2024-10-17 17:43:48 +02:00 • committed by Carles Cufí
commit 271a41a4a5
7 changed files with 87 additions and 21 deletions
Download patch file Download diff file Expand all files Collapse all files

27
boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-pinctrl.dtsi
View file

@ -73,12 +73,37 @@
/omit-if-no-ref/ exmif_default: exmif_default {
group1 {
psels = <NRF_PSEL(EXMIF_CK, 6, 0)>,
<NRF_PSEL(EXMIF_CS0, 6, 3)>,
<NRF_PSEL(EXMIF_RWDS, 6, 2)>,
<NRF_PSEL(EXMIF_DQ0, 6, 7)>,
<NRF_PSEL(EXMIF_DQ1, 6, 5)>;
<NRF_PSEL(EXMIF_DQ1, 6, 5)>,
<NRF_PSEL(EXMIF_DQ2, 6, 10)>,
<NRF_PSEL(EXMIF_DQ3, 6, 9)>,
<NRF_PSEL(EXMIF_DQ4, 6, 11)>,
<NRF_PSEL(EXMIF_DQ5, 6, 8)>,
<NRF_PSEL(EXMIF_DQ6, 6, 6)>,
<NRF_PSEL(EXMIF_DQ7, 6, 4)>;
nordic,drive-mode = <NRF_DRIVE_H0H1>;
};
};
/omit-if-no-ref/ exmif_sleep: exmif_sleep {
group1 {
low-power-enable;
psels = <NRF_PSEL(EXMIF_CK, 6, 0)>,
<NRF_PSEL(EXMIF_CS0, 6, 3)>,
<NRF_PSEL(EXMIF_RWDS, 6, 2)>,
<NRF_PSEL(EXMIF_DQ0, 6, 7)>,
<NRF_PSEL(EXMIF_DQ1, 6, 5)>,
<NRF_PSEL(EXMIF_DQ2, 6, 10)>,
<NRF_PSEL(EXMIF_DQ3, 6, 9)>,
<NRF_PSEL(EXMIF_DQ4, 6, 11)>,
<NRF_PSEL(EXMIF_DQ5, 6, 8)>,
<NRF_PSEL(EXMIF_DQ6, 6, 6)>,
<NRF_PSEL(EXMIF_DQ7, 6, 4)>;
};
};
/omit-if-no-ref/ can120_default: can120_default {
group1 {
psels = <NRF_PSEL(CAN_RX, 9, 4)>,

19
boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts
View file

@ -256,15 +256,15 @@ ipc0: &cpuapp_cpurad_ipc {
};
&exmif {
cs-gpios = <&gpio6 3 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&exmif_default>;
pinctrl-names = "default";
pinctrl-1 = <&exmif_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
mx25uw63: mx25uw6345g@0 {
compatible = "jedec,spi-nor";
compatible = "jedec,mspi-nor";
status = "disabled";
reg = <0>;
spi-max-frequency = <DT_FREQ_M(48)>;
jedec-id = [c2 84 37];
sfdp-bfp = [
e5 20 8a ff ff ff ff 03 00 ff 00 ff 00 ff 00 ff
@ -277,6 +277,17 @@ ipc0: &cpuapp_cpurad_ipc {
has-dpd;
t-enter-dpd = <10000>;
t-exit-dpd = <30000>;
reset-gpios = <&gpio6 12 GPIO_ACTIVE_LOW>;
t-reset-pulse = <10000>;
t-reset-recovery = <35000>;
mspi-max-frequency = <DT_FREQ_M(50)>;
mspi-io-mode = "MSPI_IO_MODE_OCTAL";
mspi-data-rate = "MSPI_DATA_RATE_SINGLE";
mspi-hardware-ce-num = <1>;
mspi-cpp-mode = "MSPI_CPP_MODE_0";
mspi-endian = "MSPI_BIG_ENDIAN";
mspi-ce-polarity = "MSPI_CE_ACTIVE_LOW";
};
};

27
boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280-pinctrl.dtsi
View file

@ -54,12 +54,37 @@
/omit-if-no-ref/ exmif_default: exmif_default {
group1 {
psels = <NRF_PSEL(EXMIF_CK, 6, 0)>,
<NRF_PSEL(EXMIF_CS0, 6, 3)>,
<NRF_PSEL(EXMIF_RWDS, 6, 2)>,
<NRF_PSEL(EXMIF_DQ0, 6, 7)>,
<NRF_PSEL(EXMIF_DQ1, 6, 5)>;
<NRF_PSEL(EXMIF_DQ1, 6, 5)>,
<NRF_PSEL(EXMIF_DQ2, 6, 10)>,
<NRF_PSEL(EXMIF_DQ3, 6, 9)>,
<NRF_PSEL(EXMIF_DQ4, 6, 11)>,
<NRF_PSEL(EXMIF_DQ5, 6, 8)>,
<NRF_PSEL(EXMIF_DQ6, 6, 6)>,
<NRF_PSEL(EXMIF_DQ7, 6, 4)>;
nordic,drive-mode = <NRF_DRIVE_H0H1>;
};
};
/omit-if-no-ref/ exmif_sleep: exmif_sleep {
group1 {
low-power-enable;
psels = <NRF_PSEL(EXMIF_CK, 6, 0)>,
<NRF_PSEL(EXMIF_CS0, 6, 3)>,
<NRF_PSEL(EXMIF_RWDS, 6, 2)>,
<NRF_PSEL(EXMIF_DQ0, 6, 7)>,
<NRF_PSEL(EXMIF_DQ1, 6, 5)>,
<NRF_PSEL(EXMIF_DQ2, 6, 10)>,
<NRF_PSEL(EXMIF_DQ3, 6, 9)>,
<NRF_PSEL(EXMIF_DQ4, 6, 11)>,
<NRF_PSEL(EXMIF_DQ5, 6, 8)>,
<NRF_PSEL(EXMIF_DQ6, 6, 6)>,
<NRF_PSEL(EXMIF_DQ7, 6, 4)>;
};
};
/omit-if-no-ref/ pwm130_default: pwm130_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 9, 2)>;

19
boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280_cpuapp.dts
View file

@ -242,15 +242,15 @@ ipc0: &cpuapp_cpurad_ipc {
};
&exmif {
cs-gpios = <&gpio6 3 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&exmif_default>;
pinctrl-names = "default";
pinctrl-1 = <&exmif_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
mx25uw63: mx25uw6345g@0 {
compatible = "jedec,spi-nor";
compatible = "jedec,mspi-nor";
status = "disabled";
reg = <0>;
spi-max-frequency = <DT_FREQ_M(48)>;
jedec-id = [c2 84 37];
sfdp-bfp = [
e5 20 8a ff ff ff ff 03 00 ff 00 ff 00 ff 00 ff
@ -263,6 +263,17 @@ ipc0: &cpuapp_cpurad_ipc {
has-dpd;
t-enter-dpd = <10000>;
t-exit-dpd = <30000>;
reset-gpios = <&gpio6 12 GPIO_ACTIVE_LOW>;
t-reset-pulse = <10000>;
t-reset-recovery = <35000>;
mspi-max-frequency = <DT_FREQ_M(50)>;
mspi-io-mode = "MSPI_IO_MODE_OCTAL";
mspi-data-rate = "MSPI_DATA_RATE_SINGLE";
mspi-hardware-ce-num = <1>;
mspi-cpp-mode = "MSPI_CPP_MODE_0";
mspi-endian = "MSPI_BIG_ENDIAN";
mspi-ce-polarity = "MSPI_CE_ACTIVE_LOW";
};
};