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boards: dragino_lsn50: Use dts for clocks configuration

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Convert board to use of device tree for clocks configuration.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This commit is contained in:
Alexandre Bourdiol 2021-04-30 15:02:16 +02:00 • committed by Maureen Helm
commit 26ae8679cc
2 changed files with 20 additions and 13 deletions
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19
boards/arm/dragino_lsn50/dragino_lsn50.dts
View file

@ -20,6 +20,25 @@
};
};
&clk_hsi {
status = "okay";
};
&pll {
div = <2>;
mul = <4>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(32)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
current-speed = <115200>;

14
boards/arm/dragino_lsn50/dragino_lsn50_defconfig
View file

@ -7,9 +7,6 @@ CONFIG_SOC_SERIES_STM32L0X=y
CONFIG_SOC_STM32L072XX=y
CONFIG_BOARD_DRAGINO_LSN50=y
# General Kernel Options
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
@ -23,14 +20,5 @@ CONFIG_PINMUX=y
# GPIO Controller
CONFIG_GPIO=y
# Clock configuration
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# SYSCLK selection
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# Use HSI source
CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
CONFIG_CLOCK_STM32_PLL_DIVISOR=2
# produce 32Mhz clock at PLL output
CONFIG_CLOCK_STM32_PLL_MULTIPLIER=4
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=1