arm: dts: Cleanup HAS_DTS

Now that all ARM platforms have a device tree we can move selecting of
HAS_DTS up and remove any !HAS_DTS cases, as well as setting in all the
defconfigs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2017-05-11 15:37:01 -05:00 committed by Anas Nashif
commit 26811defc7
37 changed files with 1 additions and 129 deletions

View file

@ -21,6 +21,7 @@ config CPU_CORTEX_M
select ARCH_HAS_CUSTOM_SWAP_TO_MAIN
select HAS_CMSIS
select HAS_FLASH_LOAD_OFFSET
select HAS_DTS
help
This option signifies the use of a CPU of the Cortex-M family.

View file

@ -129,15 +129,6 @@ config STACK_ALIGN_DOUBLE_WORD
This is needed to conform to AAPCS, the procedure call standard for
the ARM. It wastes stack space.
config NUM_IRQ_PRIO_BITS
int
#hidden option, implemented by board
help
Cortex-M chips can implement up to 8 bits of interrupt priorities,
for a maximum of 256 priorities. Most chips implement fewer than 8.
The board must define the correct value.
config RUNTIME_NMI
bool
prompt "Attach an NMI handler at runtime"
@ -167,38 +158,6 @@ config FAULT_DUMP
config XIP
default y
config SRAM_SIZE
int "SRAM Size in kB"
depends on !HAS_DTS
help
This option specifies the size of the SRAM in kB. It is normally set by
the board's defconfig file and the user should generally avoid modifying
it via the menu configuration.
config SRAM_BASE_ADDRESS
hex "SRAM Base Address"
depends on !HAS_DTS
help
This option specifies the base address of the SRAM on the board. It is
normally set by the board's defconfig file and the user should generally
avoid modifying it via the menu configuration.
config FLASH_SIZE
int "Flash Size in kB"
depends on !HAS_DTS
help
This option specifies the size of the flash in kB. It is normally set by
the board's defconfig file and the user should generally avoid modifying
it via the menu configuration.
config FLASH_BASE_ADDRESS
hex "Flash Base Address"
depends on !HAS_DTS
help
This option specifies the base address of the flash on the board. It is
normally set by the board's defconfig file and the user should generally
avoid modifying it via the menu configuration.
endmenu
menu "ARM Cortex-M0/M0+/M3/M4/M7 options"

View file

@ -38,6 +38,3 @@ CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=7
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=2
CONFIG_CLOCK_STM32_APB2_PRESCALER=1
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -17,6 +17,3 @@ CONFIG_GPIO_AS_PINRESET=y
# bluetooth
CONFIG_BLUETOOTH=y
CONFIG_BLUETOOTH_CONTROLLER=y
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -11,6 +11,3 @@ CONFIG_UART_NRF5=y
# bluetooth
CONFIG_BLUETOOTH=y
CONFIG_BLUETOOTH_CONTROLLER=y
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -11,4 +11,3 @@ CONFIG_UART_ATMEL_SAM3=y
CONFIG_SOC_ATMEL_SAM3X_EXT_MAINCK=y
CONFIG_PINMUX=y
CONFIG_WATCHDOG=n
CONFIG_HAS_DTS=y

View file

@ -19,6 +19,3 @@ CONFIG_UART_CONSOLE=y
# bluetooth
CONFIG_BLUETOOTH=y
CONFIG_BLUETOOTH_CONTROLLER=y
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -23,6 +23,3 @@ CONFIG_UART_CONSOLE=y
# Enable CC3200 SDK driver files
CONFIG_CC3200SDK_ROM_DRIVERLIB=y
# Enable DTS parsing
CONFIG_HAS_DTS=y

View file

@ -23,6 +23,3 @@ CONFIG_UART_CONSOLE=y
# Enable SimpleLink CC3220 SDK
CONFIG_HAS_CC3220SDK=y
# Enable DTS parsing
CONFIG_HAS_DTS=y

View file

@ -11,6 +11,3 @@ CONFIG_UART_NRF5=y
# bluetooth
CONFIG_BLUETOOTH=y
CONFIG_BLUETOOTH_CONTROLLER=y
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -7,9 +7,6 @@ CONFIG_CORTEX_M_SYSTICK=y
# 80MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000
#enable DTS
CONFIG_HAS_DTS=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_STM32=y

View file

@ -9,4 +9,3 @@ CONFIG_CORTEX_M_SYSTICK=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000
CONFIG_OSC_EXTERNAL=y
CONFIG_HAS_DTS=y

View file

@ -9,4 +9,3 @@ CONFIG_CORTEX_M_SYSTICK=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
CONFIG_OSC_LOW_POWER=y
CONFIG_HAS_DTS=y

View file

@ -9,4 +9,3 @@ CONFIG_CORTEX_M_SYSTICK=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=40000000
CONFIG_OSC_EXTERNAL=y
CONFIG_HAS_DTS=y

View file

@ -9,4 +9,3 @@ CONFIG_CORTEX_M_SYSTICK=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000
CONFIG_OSC_LOW_POWER=y
CONFIG_HAS_DTS=y

View file

@ -9,4 +9,3 @@ CONFIG_PINMUX=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=40000000
CONFIG_OSC_EXTERNAL=y
CONFIG_HAS_DTS=y

View file

@ -12,9 +12,6 @@ CONFIG_BOARD_MPS2_AN385=y
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_RUNTIME_NMI=y
#DTS
CONFIG_HAS_DTS=y
# GPIOs
CONFIG_GPIO=y

View file

@ -15,6 +15,3 @@ CONFIG_UART_CONSOLE=y
# bluetooth
CONFIG_BLUETOOTH=y
CONFIG_BLUETOOTH_CONTROLLER=y
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -15,6 +15,3 @@ CONFIG_UART_CONSOLE=y
# bluetooth
CONFIG_BLUETOOTH=y
CONFIG_BLUETOOTH_CONTROLLER=y
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -18,6 +18,3 @@ CONFIG_GPIO_AS_PINRESET=y
# bluetooth
CONFIG_BLUETOOTH=y
CONFIG_BLUETOOTH_CONTROLLER=y
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -15,6 +15,3 @@ CONFIG_UART_CONSOLE=y
# bluetooth
CONFIG_BLUETOOTH=y
CONFIG_BLUETOOTH_CONTROLLER=y
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -18,6 +18,3 @@ CONFIG_GPIO_AS_PINRESET=y
# bluetooth
CONFIG_BLUETOOTH=y
CONFIG_BLUETOOTH_CONTROLLER=y
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -48,6 +48,3 @@ CONFIG_CLOCK_STM32F10X_APB2_PRESCALER=0
CONFIG_PWM=y
CONFIG_PWM_STM32=y
CONFIG_PWM_STM32_1=y
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -54,6 +54,3 @@ CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=2
CONFIG_CLOCK_STM32_APB2_PRESCALER=1
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -45,6 +45,3 @@ CONFIG_CLOCK_STM32_APB2_PRESCALER=1
CONFIG_PWM=y
CONFIG_PWM_STM32=y
CONFIG_PWM_STM32_2=y
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -39,6 +39,3 @@ CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=8
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=2
CONFIG_CLOCK_STM32_APB2_PRESCALER=1
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -37,6 +37,3 @@ CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=8
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=2
CONFIG_CLOCK_STM32_APB2_PRESCALER=1
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -50,6 +50,3 @@ CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_2"
CONFIG_PWM=y
CONFIG_PWM_STM32=y
CONFIG_PWM_STM32_2=y
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -54,6 +54,3 @@ CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_2"
CONFIG_PWM=y
CONFIG_PWM_STM32=y
CONFIG_PWM_STM32_2=y
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -41,6 +41,3 @@ CONFIG_CLOCK_STM32F10X_AHB_PRESCALER=0
# APB1 clock must not exceed 36MHz limit
CONFIG_CLOCK_STM32F10X_APB1_PRESCALER=2
CONFIG_CLOCK_STM32F10X_APB2_PRESCALER=0
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -7,4 +7,3 @@ CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_UART_STELLARIS=y
CONFIG_HAS_DTS=y

View file

@ -11,6 +11,3 @@ CONFIG_UART_NRF5=y
# bluetooth
CONFIG_BLUETOOTH=y
CONFIG_BLUETOOTH_CONTROLLER=y
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -14,4 +14,3 @@ CONFIG_SERIAL=y
CONFIG_USART_SAM=y
CONFIG_USART_SAM_PORT_1=y
CONFIG_BOARD_SAM_E70_XPLAINED=y
CONFIG_HAS_DTS=y

View file

@ -58,6 +58,3 @@ CONFIG_CLOCK_STM32F10X_CONN_LINE_AHB_PRESCALER=0
# APB1 clock must not to exceed 36MHz limit
CONFIG_CLOCK_STM32F10X_CONN_LINE_APB1_PRESCALER=2
CONFIG_CLOCK_STM32F10X_CONN_LINE_APB2_PRESCALER=0
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -63,6 +63,3 @@ CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=2
CONFIG_CLOCK_STM32_APB2_PRESCALER=2
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -37,6 +37,3 @@ CONFIG_CLOCK_STM32F10X_APB2_PRESCALER=0
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
#enable DTS
CONFIG_HAS_DTS=y

View file

@ -33,5 +33,3 @@ CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_1"
# Watchdog
CONFIG_WATCHDOG=y
CONFIG_HAS_DTS=y