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drivers: clk_ctrl: npcx: fixed 'line length exceeds 80 columns' warning.

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Fixed 'line length exceeds 80 columns' warning by shortening the clock
controller device name from NPCX_CLOCK_CONTROL_NAME to
NPCX_CLK_CTRL_NAME.

Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This commit is contained in:
Mulin Chao 2020-09-03 10:27:29 +08:00 • committed by Carles Cufí
commit 2612c50daa
3 changed files with 3 additions and 3 deletions
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2
drivers/clock_control/clock_control_npcx.c
View file

@ -154,7 +154,7 @@ const struct npcx_pcc_config pcc_config = {
.base_pmc = DT_INST_REG_ADDR_BY_NAME(0, pmc),
};
DEVICE_AND_API_INIT(npcx_cdcg, NPCX_CLOCK_CONTROL_NAME,
DEVICE_AND_API_INIT(npcx_cdcg, NPCX_CLK_CTRL_NAME,
&npcx_clock_control_init,
NULL, &pcc_config,
PRE_KERNEL_1,

2
drivers/serial/uart_npcx.c
View file

@ -291,7 +291,7 @@ static int uart_npcx_init(const struct device *dev)
const struct uart_npcx_config *config = DRV_CONFIG(dev);
const struct uart_npcx_data *data = DRV_DATA(dev);
struct uart_reg *inst = HAL_INSTANCE(dev);
const struct device *clk_dev = device_get_binding(NPCX_CLOCK_CONTROL_NAME);
const struct device *clk_dev = device_get_binding(NPCX_CLK_CTRL_NAME);
uint32_t uart_rate;
/* Turn on device clock first */

2
soc/arm/nuvoton_npcx/common/soc_clock.h
View file

@ -12,7 +12,7 @@ extern "C" {
#endif
/* Common clock control device name for all NPCX series */
#define NPCX_CLOCK_CONTROL_NAME "npcx-cc"
#define NPCX_CLK_CTRL_NAME "npcx-cc"
/**
* @brief NPCX clock configuration structure