From 25f87aac87fd3bfd5cdfe7679cb9ece89b69a052 Mon Sep 17 00:00:00 2001 From: Daniel Leung Date: Thu, 6 Jan 2022 17:05:53 -0800 Subject: [PATCH] x86: remove @return doc for void functions For functions returning nothing, there is no need to document with @return, as Doxgen complains about "documented empty return type of ...". Signed-off-by: Daniel Leung --- arch/x86/core/cache.c | 2 -- arch/x86/core/ia32/excstub.S | 2 -- arch/x86/core/ia32/float.c | 15 --------------- arch/x86/core/ia32/intstub.S | 2 -- include/arch/x86/ia32/arch.h | 3 --- 5 files changed, 24 deletions(-) diff --git a/arch/x86/core/cache.c b/arch/x86/core/cache.c index 0d6322247cb..831bd706867 100644 --- a/arch/x86/core/cache.c +++ b/arch/x86/core/cache.c @@ -26,8 +26,6 @@ * both is optimal. * * The cache line size is specified via the d-cache-line-size DTS property. - * - * @return N/A */ static void arch_dcache_flush(void *start_addr, size_t size) { diff --git a/arch/x86/core/ia32/excstub.S b/arch/x86/core/ia32/excstub.S index 9ecb2142226..2316ac935a3 100644 --- a/arch/x86/core/ia32/excstub.S +++ b/arch/x86/core/ia32/excstub.S @@ -45,8 +45,6 @@ * created by this routine to determine the locations of volatile registers. * These tools must be updated to reflect any changes to the stack frame. * - * @return N/A - * * C function prototype: * * void _exception_enter(uint32_t error_code, void *handler) diff --git a/arch/x86/core/ia32/float.c b/arch/x86/core/ia32/float.c index a4f78687e63..cce812e33d8 100644 --- a/arch/x86/core/ia32/float.c +++ b/arch/x86/core/ia32/float.c @@ -50,13 +50,10 @@ extern uint32_t _sse_mxcsr_default_value; /** - * * @brief Disallow use of floating point capabilities * * This routine sets CR0[TS] to 1, which disallows the use of FP instructions * by the currently executing thread. - * - * @return N/A */ static inline void z_FpAccessDisable(void) { @@ -73,15 +70,12 @@ static inline void z_FpAccessDisable(void) /** - * * @brief Save non-integer context information * * This routine saves the system's "live" non-integer context into the * specified area. If the specified thread supports SSE then * x87/MMX/SSEx thread info is saved, otherwise only x87/MMX thread is saved. * Function is invoked by FpCtxSave(struct k_thread *thread) - * - * @return N/A */ static inline void z_do_fp_regs_save(void *preemp_float_reg) { @@ -92,15 +86,12 @@ static inline void z_do_fp_regs_save(void *preemp_float_reg) } /** - * * @brief Save non-integer context information * * This routine saves the system's "live" non-integer context into the * specified area. If the specified thread supports SSE then * x87/MMX/SSEx thread info is saved, otherwise only x87/MMX thread is saved. * Function is invoked by FpCtxSave(struct k_thread *thread) - * - * @return N/A */ static inline void z_do_fp_and_sse_regs_save(void *preemp_float_reg) { @@ -111,12 +102,9 @@ static inline void z_do_fp_and_sse_regs_save(void *preemp_float_reg) } /** - * * @brief Initialize floating point register context information. * * This routine initializes the system's "live" floating point registers. - * - * @return N/A */ static inline void z_do_fp_regs_init(void) { @@ -124,12 +112,9 @@ static inline void z_do_fp_regs_init(void) } /** - * * @brief Initialize SSE register context information. * * This routine initializes the system's "live" SSE registers. - * - * @return N/A */ static inline void z_do_sse_regs_init(void) { diff --git a/arch/x86/core/ia32/intstub.S b/arch/x86/core/ia32/intstub.S index 8f7f130d56f..1c6d90119c4 100644 --- a/arch/x86/core/ia32/intstub.S +++ b/arch/x86/core/ia32/intstub.S @@ -56,8 +56,6 @@ * created by this routine to determine the locations of volatile registers. * These tools must be updated to reflect any changes to the stack frame. * - * @return N/A - * * C function prototype: * * void _interrupt_enter(void *isr, void *isr_param); diff --git a/include/arch/x86/ia32/arch.h b/include/arch/x86/ia32/arch.h index 29fd3368099..02f9570067d 100644 --- a/include/arch/x86/ia32/arch.h +++ b/include/arch/x86/ia32/arch.h @@ -115,9 +115,6 @@ typedef struct s_isrList { * @param p IRQ priority * @param v Interrupt Vector * @param d Descriptor Privilege Level - * - * @return N/A - * */ #define NANO_CPU_INT_REGISTER(r, n, p, v, d) \