drivers: dp: move the nrf code to its own file

Move the nrf specific functions to a separate file so that every soc has
a dedicated header.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit is contained in:
Fabio Baltieri 2025-05-02 12:08:35 +01:00 committed by Fabio Baltieri
commit 25bd4abfc4
2 changed files with 62 additions and 38 deletions

View file

@ -8,18 +8,6 @@
#include <zephyr/drivers/gpio.h>
#include <soc.h>
#if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
#define CPU_CLOCK 64000000U
#else
#define CPU_CLOCK CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
#endif
#if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
#define FAST_BITBANG_HW_SUPPORT 1
#else
#define FAST_BITBANG_HW_SUPPORT 0
#endif
static ALWAYS_INLINE void pin_delay_asm(uint32_t delay)
{
#if defined(CONFIG_CPU_CORTEX_M)
@ -36,50 +24,43 @@ static ALWAYS_INLINE void pin_delay_asm(uint32_t delay)
#endif
}
#if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
#include "swdp_ll_pin_nrf.h"
#else
#define CPU_CLOCK CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
#define FAST_BITBANG_HW_SUPPORT 0
static ALWAYS_INLINE void swdp_ll_pin_input(void *const base, uint8_t pin)
{
#if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
NRF_GPIO_Type * reg = base;
reg->PIN_CNF[pin] = 0b0000;
#endif
}
static ALWAYS_INLINE void swdp_ll_pin_output(void *const base, uint8_t pin)
{
#if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
NRF_GPIO_Type * reg = base;
reg->PIN_CNF[pin] = 0b0001;
#endif
}
static ALWAYS_INLINE void swdp_ll_pin_set(void *const base, uint8_t pin)
{
#if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
NRF_GPIO_Type * reg = base;
reg->OUTSET = BIT(pin);
#endif
}
static ALWAYS_INLINE void swdp_ll_pin_clr(void *const base, uint8_t pin)
{
#if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
NRF_GPIO_Type * reg = base;
reg->OUTCLR = BIT(pin);
#endif
}
static ALWAYS_INLINE uint32_t swdp_ll_pin_get(void *const base, uint8_t pin)
{
#if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
NRF_GPIO_Type * reg = base;
return ((reg->IN >> pin) & 1);
#else
return 0UL;
#endif
}
#endif
#ifndef CPU_CLOCK
#error "CPU_CLOCK not defined by any soc specific driver"
#endif
#ifndef FAST_BITBANG_HW_SUPPORT
#error "FAST_BITBANG_HW_SUPPORT not defined by any soc specific driver"
#endif

View file

@ -0,0 +1,43 @@
/*
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#define CPU_CLOCK 64000000U
#define FAST_BITBANG_HW_SUPPORT 1
static ALWAYS_INLINE void swdp_ll_pin_input(void *const base, uint8_t pin)
{
NRF_GPIO_Type *reg = base;
reg->PIN_CNF[pin] = 0b0000;
}
static ALWAYS_INLINE void swdp_ll_pin_output(void *const base, uint8_t pin)
{
NRF_GPIO_Type *reg = base;
reg->PIN_CNF[pin] = 0b0001;
}
static ALWAYS_INLINE void swdp_ll_pin_set(void *const base, uint8_t pin)
{
NRF_GPIO_Type *reg = base;
reg->OUTSET = BIT(pin);
}
static ALWAYS_INLINE void swdp_ll_pin_clr(void *const base, uint8_t pin)
{
NRF_GPIO_Type *reg = base;
reg->OUTCLR = BIT(pin);
}
static ALWAYS_INLINE uint32_t swdp_ll_pin_get(void *const base, uint8_t pin)
{
NRF_GPIO_Type *reg = base;
return ((reg->IN >> pin) & 1);
}