diff --git a/boards/arm/cc3220sf_launchxl/pinmux.c b/boards/arm/cc3220sf_launchxl/pinmux.c index 5f07e931c63..3b2c13ed237 100644 --- a/boards/arm/cc3220sf_launchxl/pinmux.c +++ b/boards/arm/cc3220sf_launchxl/pinmux.c @@ -103,7 +103,6 @@ int pinmux_initialize(struct device *port) MAP_PinTypeUART(PIN_57, PIN_MODE_3); #endif -#ifdef CONFIG_GPIO_CC32XX_A1 /* Enable Peripheral Clocks */ MAP_PRCMPeripheralClkEnable(PRCM_GPIOA1, PRCM_RUN_MODE_CLK); @@ -124,21 +123,15 @@ int pinmux_initialize(struct device *port) /* SW3: Configure PIN_04 (GPIO13) for GPIOInput */ MAP_PinTypeGPIO(PIN_04, PIN_MODE_0, false); MAP_GPIODirModeSet(GPIOA1_BASE, 0x20, GPIO_DIR_MODE_IN); -#endif -#ifdef CONFIG_GPIO_CC32XX_A2 MAP_PRCMPeripheralClkEnable(PRCM_GPIOA2, PRCM_RUN_MODE_CLK); /* SW2: Configure PIN_15 (GPIO22) for GPIOInput */ MAP_PinTypeGPIO(PIN_15, PIN_MODE_0, false); MAP_GPIODirModeSet(GPIOA2_BASE, 0x40, GPIO_DIR_MODE_IN); -#endif -#ifdef CONFIG_GPIO_CC32XX_A3 MAP_PRCMPeripheralClkEnable(PRCM_GPIOA3, PRCM_RUN_MODE_CLK); -#endif - #ifdef CONFIG_I2C_CC32XX { unsigned long pin; diff --git a/boards/arm/cc3235sf_launchxl/pinmux.c b/boards/arm/cc3235sf_launchxl/pinmux.c index b2d6d16b9a5..7892075cc13 100644 --- a/boards/arm/cc3235sf_launchxl/pinmux.c +++ b/boards/arm/cc3235sf_launchxl/pinmux.c @@ -78,7 +78,6 @@ int pinmux_initialize(struct device *port) MAP_PinTypeUART(PIN_57, PIN_MODE_3); #endif -#ifdef CONFIG_GPIO_CC32XX_A1 /* Enable Peripheral Clocks */ MAP_PRCMPeripheralClkEnable(PRCM_GPIOA1, PRCM_RUN_MODE_CLK); @@ -99,20 +98,15 @@ int pinmux_initialize(struct device *port) /* SW3: Configure PIN_04 (GPIO13) for GPIOInput */ MAP_PinTypeGPIO(PIN_04, PIN_MODE_0, false); MAP_GPIODirModeSet(GPIOA1_BASE, 0x20, GPIO_DIR_MODE_IN); -#endif -#ifdef CONFIG_GPIO_CC32XX_A2 MAP_PRCMPeripheralClkEnable(PRCM_GPIOA2, PRCM_RUN_MODE_CLK); /* SW2: Configure PIN_15 (GPIO22) for GPIOInput */ MAP_PinTypeGPIO(PIN_15, PIN_MODE_0, false); MAP_GPIODirModeSet(GPIOA2_BASE, 0x40, GPIO_DIR_MODE_IN); -#endif -#ifdef CONFIG_GPIO_CC32XX_A3 MAP_PRCMPeripheralClkEnable(PRCM_GPIOA3, PRCM_RUN_MODE_CLK); -#endif #ifdef CONFIG_I2C_CC32XX { diff --git a/drivers/gpio/Kconfig.cc32xx b/drivers/gpio/Kconfig.cc32xx index 0606345632d..cd4cd06be48 100644 --- a/drivers/gpio/Kconfig.cc32xx +++ b/drivers/gpio/Kconfig.cc32xx @@ -2,32 +2,8 @@ # SPDX-License-Identifier: Apache-2.0 -menuconfig GPIO_CC32XX +config GPIO_CC32XX bool "TI CC32XX GPIO driver" depends on SOC_FAMILY_TISIMPLELINK help Enable the GPIO driver on TI SimpleLink CC32xx boards - -if GPIO_CC32XX - -config GPIO_CC32XX_A0 - bool "GPIO block A0" - help - Include support for the GPIO port A0. - -config GPIO_CC32XX_A1 - bool "GPIO block A1" - help - Include support for the GPIO port A1. - -config GPIO_CC32XX_A2 - bool "GPIO block A2" - help - Include support for the GPIO port A2. - -config GPIO_CC32XX_A3 - bool "GPIO block A3" - help - Include support for the GPIO port A3. - -endif # GPIO_CC32XX diff --git a/drivers/gpio/gpio_cc32xx.c b/drivers/gpio/gpio_cc32xx.c index c00b7e3b176..e0a7d46b0ea 100644 --- a/drivers/gpio/gpio_cc32xx.c +++ b/drivers/gpio/gpio_cc32xx.c @@ -274,134 +274,42 @@ static const struct gpio_driver_api api_funcs = { }; -#ifdef CONFIG_GPIO_CC32XX_A0 -static const struct gpio_cc32xx_config gpio_cc32xx_a0_config = { - .common = { - .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(0), - }, - .port_base = DT_INST_REG_ADDR(0), - .port_num = 0 -}; +#define GPIO_CC32XX_INIT_FUNC(n) \ + static int gpio_cc32xx_a##n##_init(struct device *dev) \ + { \ + ARG_UNUSED(dev); \ + \ + IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), \ + gpio_cc32xx_port_isr, DEVICE_GET(gpio_cc32xx_a##n), \ + 0); \ + \ + MAP_IntPendClear(DT_INST_IRQN(n) + 16); \ + irq_enable(DT_INST_IRQN(n)); \ + \ + return 0; \ + } -static struct device DEVICE_NAME_GET(gpio_cc32xx_a0); -static struct gpio_cc32xx_data gpio_cc32xx_a0_data; +#define GPIO_CC32XX_DEVICE_INIT(n) \ + DEVICE_AND_API_INIT(gpio_cc32xx_a##n, DT_INST_LABEL(n), \ + &gpio_cc32xx_a##n##_init, &gpio_cc32xx_a##n##_data, \ + &gpio_cc32xx_a##n##_config, \ + POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \ + &api_funcs) -static int gpio_cc32xx_a0_init(struct device *dev) -{ - ARG_UNUSED(dev); +#define GPIO_CC32XX_INIT(n) \ + static const struct gpio_cc32xx_config gpio_cc32xx_a##n##_config = { \ + .common = { \ + .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n), \ + }, \ + .port_base = DT_INST_REG_ADDR(n), \ + .port_num = n \ + }; \ + \ + static struct device DEVICE_NAME_GET(gpio_cc32xx_a##n); \ + static struct gpio_cc32xx_data gpio_cc32xx_a##n##_data; \ + \ + GPIO_CC32XX_INIT_FUNC(n) \ + \ + GPIO_CC32XX_DEVICE_INIT(n) - IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority), - gpio_cc32xx_port_isr, DEVICE_GET(gpio_cc32xx_a0), 0); - - MAP_IntPendClear(DT_INST_IRQN(0) + 16); - irq_enable(DT_INST_IRQN(0)); - - return 0; -} - -DEVICE_AND_API_INIT(gpio_cc32xx_a0, DT_INST_LABEL(0), - &gpio_cc32xx_a0_init, &gpio_cc32xx_a0_data, - &gpio_cc32xx_a0_config, - POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, - &api_funcs); - -#endif - -#ifdef CONFIG_GPIO_CC32XX_A1 -static const struct gpio_cc32xx_config gpio_cc32xx_a1_config = { - .common = { - .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(1), - }, - .port_base = DT_INST_REG_ADDR(1), - .port_num = 1 -}; - -static struct device DEVICE_NAME_GET(gpio_cc32xx_a1); -static struct gpio_cc32xx_data gpio_cc32xx_a1_data; - -static int gpio_cc32xx_a1_init(struct device *dev) -{ - ARG_UNUSED(dev); - - IRQ_CONNECT(DT_INST_IRQN(1), DT_INST_IRQ(1, priority), - gpio_cc32xx_port_isr, DEVICE_GET(gpio_cc32xx_a1), 0); - - MAP_IntPendClear(DT_INST_IRQN(1) + 16); - irq_enable(DT_INST_IRQN(1)); - - return 0; -} - -DEVICE_AND_API_INIT(gpio_cc32xx_a1, DT_INST_LABEL(1), - &gpio_cc32xx_a1_init, &gpio_cc32xx_a1_data, - &gpio_cc32xx_a1_config, - POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, - &api_funcs); - -#endif /* CONFIG_GPIO_CC32XX_A1 */ - -#ifdef CONFIG_GPIO_CC32XX_A2 -static const struct gpio_cc32xx_config gpio_cc32xx_a2_config = { - .common = { - .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(2), - }, - .port_base = DT_INST_REG_ADDR(2), - .port_num = 2 -}; - -static struct device DEVICE_NAME_GET(gpio_cc32xx_a2); -static struct gpio_cc32xx_data gpio_cc32xx_a2_data; - -static int gpio_cc32xx_a2_init(struct device *dev) -{ - ARG_UNUSED(dev); - - IRQ_CONNECT(DT_INST_IRQN(2), DT_INST_IRQ(2, priority), - gpio_cc32xx_port_isr, DEVICE_GET(gpio_cc32xx_a2), 0); - - MAP_IntPendClear(DT_INST_IRQN(2) + 16); - irq_enable(DT_INST_IRQN(2)); - - return 0; -} - -DEVICE_AND_API_INIT(gpio_cc32xx_a2, DT_INST_LABEL(2), - &gpio_cc32xx_a2_init, &gpio_cc32xx_a2_data, - &gpio_cc32xx_a2_config, - POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, - &api_funcs); - -#endif - -#ifdef CONFIG_GPIO_CC32XX_A3 -static const struct gpio_cc32xx_config gpio_cc32xx_a3_config = { - .common = { - .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(3), - }, - .port_base = DT_INST_REG_ADDR(3), - .port_num = 3 -}; - -static struct device DEVICE_NAME_GET(gpio_cc32xx_a3); -static struct gpio_cc32xx_data gpio_cc32xx_a3_data; - -static int gpio_cc32xx_a3_init(struct device *dev) -{ - ARG_UNUSED(dev); - - IRQ_CONNECT(DT_INST_IRQN(3), DT_INST_IRQ(3, priority), - gpio_cc32xx_port_isr, DEVICE_GET(gpio_cc32xx_a3), 0); - - MAP_IntPendClear(DT_INST_IRQN(3) + 16); - irq_enable(DT_INST_IRQN(3)); - - return 0; -} - -DEVICE_AND_API_INIT(gpio_cc32xx_a3, DT_INST_LABEL(3), - &gpio_cc32xx_a3_init, &gpio_cc32xx_a3_data, - &gpio_cc32xx_a3_config, - POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, - &api_funcs); - -#endif +DT_INST_FOREACH(GPIO_CC32XX_INIT) diff --git a/soc/arm/ti_simplelink/cc32xx/Kconfig.defconfig.cc3220sf b/soc/arm/ti_simplelink/cc32xx/Kconfig.defconfig.cc3220sf index 2e889016958..612c153b561 100644 --- a/soc/arm/ti_simplelink/cc32xx/Kconfig.defconfig.cc3220sf +++ b/soc/arm/ti_simplelink/cc32xx/Kconfig.defconfig.cc3220sf @@ -28,18 +28,6 @@ if GPIO config GPIO_CC32XX default y -config GPIO_CC32XX_A0 - default n - -config GPIO_CC32XX_A1 - default y - -config GPIO_CC32XX_A2 - default y - -config GPIO_CC32XX_A3 - default n - endif # GPIO if !XIP diff --git a/soc/arm/ti_simplelink/cc32xx/Kconfig.defconfig.cc3235sf b/soc/arm/ti_simplelink/cc32xx/Kconfig.defconfig.cc3235sf index b36b4399b2d..6dd65f4a7f2 100644 --- a/soc/arm/ti_simplelink/cc32xx/Kconfig.defconfig.cc3235sf +++ b/soc/arm/ti_simplelink/cc32xx/Kconfig.defconfig.cc3235sf @@ -29,18 +29,6 @@ if GPIO config GPIO_CC32XX default y -config GPIO_CC32XX_A0 - default n - -config GPIO_CC32XX_A1 - default y - -config GPIO_CC32XX_A2 - default y - -config GPIO_CC32XX_A3 - default n - endif # GPIO if !XIP diff --git a/soc/arm/ti_simplelink/cc32xx/dts_fixup.h b/soc/arm/ti_simplelink/cc32xx/dts_fixup.h deleted file mode 100644 index 160835c848f..00000000000 --- a/soc/arm/ti_simplelink/cc32xx/dts_fixup.h +++ /dev/null @@ -1,34 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 */ - -/* SoC level DTS fixup file */ - -#define DT_UART_CC32XX_NAME DT_TI_CC32XX_UART_4000C000_LABEL - -#define DT_I2C_0_LABEL DT_TI_CC32XX_I2C_40020000_LABEL -#define DT_I2C_0_BASE_ADDRESS DT_TI_CC32XX_I2C_40020000_BASE_ADDRESS -#define DT_I2C_0_BITRATE DT_TI_CC32XX_I2C_40020000_CLOCK_FREQUENCY -#define DT_I2C_0_CLOCK_FREQUENCY DT_TI_CC32XX_I2C_40020000_CLOCKS_CLOCK_FREQUENCY -#define DT_I2C_0_IRQ DT_TI_CC32XX_I2C_40020000_IRQ_0 -#define DT_I2C_0_IRQ_PRIORITY DT_TI_CC32XX_I2C_40020000_IRQ_0_PRIORITY - -#define DT_GPIO_CC32XX_A0_BASE_ADDRESS DT_TI_CC32XX_GPIO_40004000_BASE_ADDRESS -#define DT_GPIO_CC32XX_A0_IRQ DT_TI_CC32XX_GPIO_40004000_IRQ_0 -#define DT_GPIO_CC32XX_A0_IRQ_PRI DT_TI_CC32XX_GPIO_40004000_IRQ_0_PRIORITY -#define DT_GPIO_CC32XX_A0_NAME DT_TI_CC32XX_GPIO_40004000_LABEL - -#define DT_GPIO_CC32XX_A1_BASE_ADDRESS DT_TI_CC32XX_GPIO_40005000_BASE_ADDRESS -#define DT_GPIO_CC32XX_A1_IRQ DT_TI_CC32XX_GPIO_40005000_IRQ_0 -#define DT_GPIO_CC32XX_A1_IRQ_PRI DT_TI_CC32XX_GPIO_40005000_IRQ_0_PRIORITY -#define DT_GPIO_CC32XX_A1_NAME DT_TI_CC32XX_GPIO_40005000_LABEL - -#define DT_GPIO_CC32XX_A2_BASE_ADDRESS DT_TI_CC32XX_GPIO_40006000_BASE_ADDRESS -#define DT_GPIO_CC32XX_A2_IRQ DT_TI_CC32XX_GPIO_40006000_IRQ_0 -#define DT_GPIO_CC32XX_A2_IRQ_PRI DT_TI_CC32XX_GPIO_40006000_IRQ_0_PRIORITY -#define DT_GPIO_CC32XX_A2_NAME DT_TI_CC32XX_GPIO_40006000_LABEL - -#define DT_GPIO_CC32XX_A3_BASE_ADDRESS DT_TI_CC32XX_GPIO_40007000_BASE_ADDRESS -#define DT_GPIO_CC32XX_A3_IRQ DT_TI_CC32XX_GPIO_40007000_IRQ_0 -#define DT_GPIO_CC32XX_A3_IRQ_PRI DT_TI_CC32XX_GPIO_40007000_IRQ_0_PRIORITY -#define DT_GPIO_CC32XX_A3_NAME DT_TI_CC32XX_GPIO_40007000_LABEL - -/* End of SoC Level DTS fixup file */