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boards: nucleo_f103rb: Convert to dt based clocks configuration

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Configure clocks for nucleo_f103rb using device tree.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2021-04-14 14:22:55 +02:00 • committed by Carles Cufí
commit 2578f3afc9
2 changed files with 21 additions and 17 deletions
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20
boards/arm/nucleo_f103rb/nucleo_f103rb.dts
View file

@ -42,6 +42,26 @@
};
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
mul = <9>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(72)>;
ahb-prescaler = <1>;
apb1-prescaler = <2>;
apb2-prescaler = <1>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
current-speed = <115200>;

18
boards/arm/nucleo_f103rb/nucleo_f103rb_defconfig
View file

@ -2,8 +2,6 @@
CONFIG_SOC_SERIES_STM32F1X=y
CONFIG_SOC_STM32F103XB=y
# 72MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
# enable uart driver
CONFIG_SERIAL=y
@ -17,19 +15,5 @@ CONFIG_PINMUX=y
# enable GPIO
CONFIG_GPIO=y
# clock configuration
# enable clock
CONFIG_CLOCK_CONTROL=y
# Clock configuration for Cube Clock control driver
CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# use HSE as PLL input
CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
# however, the board does not have an external oscillator, so just use
# the 8MHz clock signal coming from integrated STLink
CONFIG_CLOCK_STM32_HSE_BYPASS=y
# produce 72MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
# APB1 clock must not to exceed 36MHz limit
CONFIG_CLOCK_STM32_APB1_PRESCALER=2
CONFIG_CLOCK_STM32_APB2_PRESCALER=1