drivers/sensor: stmemsc: Add common i2c/spi read/write routines

Add common i2c/spi read/write routines for the benefit of those
ST sensor drivers who make use of the stmemsc HAL i/f.

Add generic stmemsc_cfg_i2c and stmemsc_cfg_spi structures which
contains all relevant information required by i2c/spi low level
routines, such as:

    - the pointer to the bus device
    - the I2C slave address (if instance is on I2C bus)
    - the spi_config structure (if istance is on SPI bus)

This level of abstraction allows the re-use of the i2c/spi read/write
routines among all stmemsc based sensor driver without the need to
reference the specific sensor data and or config structures.

The STMEMSC HAL source code is located here:
     zephyrproject-rtos/modules/hal/st/sensor/stmemsc/

Signed-off-by: Armando Visconti <armando.visconti@st.com>

drivers/sensor/CMakeLists.txt

@@ -70,6 +70,7 @@ add_subdirectory_ifdef(CONFIG_SI7006		si7006)
 add_subdirectory_ifdef(CONFIG_SI7055		si7055)
 add_subdirectory_ifdef(CONFIG_SI7060		si7060)
 add_subdirectory_ifdef(CONFIG_SM351LT		sm351lt)
+add_subdirectory_ifdef(CONFIG_HAS_STMEMSC	stmemsc)
 add_subdirectory_ifdef(CONFIG_STTS751		stts751)
 add_subdirectory_ifdef(CONFIG_SX9500		sx9500)
 add_subdirectory_ifdef(CONFIG_TH02		    th02)

drivers/sensor/stmemsc/CMakeLists.txt

@@ -0,0 +1,10 @@
+# ST Microelectronics stmemsc hal i/f
+#
+# Copyright (c) 2021 STMicroelectronics
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+zephyr_library()
+
+zephyr_library_sources_ifdef(CONFIG_I2C        stmemsc_i2c.c)
+zephyr_library_sources_ifdef(CONFIG_SPI        stmemsc_spi.c)

drivers/sensor/stmemsc/stmemsc.h

@@ -0,0 +1,39 @@
+/* ST Microelectronics STMEMS hal i/f
+ *
+ * Copyright (c) 2021 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * zephyrproject-rtos/modules/hal/st/sensor/stmemsc/
+ */
+
+#ifndef ZEPHYR_DRIVERS_SENSOR_STMEMSC_STMEMSC_H_
+#define ZEPHYR_DRIVERS_SENSOR_STMEMSC_STMEMSC_H_
+
+#include <drivers/i2c.h>
+#include <drivers/spi.h>
+
+#ifdef CONFIG_I2C
+struct stmemsc_cfg_i2c {
+	const struct device *bus;
+	uint16_t i2c_slv_addr;
+};
+
+int stmemsc_i2c_read(const struct stmemsc_cfg_i2c *stmemsc,
+		     uint8_t reg_addr, uint8_t *value, uint8_t len);
+int stmemsc_i2c_write(const struct stmemsc_cfg_i2c *stmemsc,
+		      uint8_t reg_addr, uint8_t *value, uint8_t len);
+#endif
+
+#ifdef CONFIG_SPI
+struct stmemsc_cfg_spi {
+	const struct device *bus;
+	struct spi_config spi_cfg;
+};
+
+int stmemsc_spi_read(const struct stmemsc_cfg_spi *stmemsc,
+		     uint8_t reg_addr, uint8_t *value, uint8_t len);
+int stmemsc_spi_write(const struct stmemsc_cfg_spi *stmemsc,
+		      uint8_t reg_addr, uint8_t *value, uint8_t len);
+#endif
+#endif /* ZEPHYR_DRIVERS_SENSOR_STMEMSC_STMEMSC_H_ */

drivers/sensor/stmemsc/stmemsc_i2c.c

@@ -0,0 +1,24 @@
+/* ST Microelectronics STMEMS hal i/f
+ *
+ * Copyright (c) 2021 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * zephyrproject-rtos/modules/hal/st/sensor/stmemsc/
+ */
+
+#include "stmemsc.h"
+
+int stmemsc_i2c_read(const struct stmemsc_cfg_i2c *stmemsc,
+			     uint8_t reg_addr, uint8_t *value, uint8_t len)
+{
+	return i2c_burst_read(stmemsc->bus, stmemsc->i2c_slv_addr,
+			      reg_addr, value, len);
+}
+
+int stmemsc_i2c_write(const struct stmemsc_cfg_i2c *stmemsc,
+			      uint8_t reg_addr, uint8_t *value, uint8_t len)
+{
+	return i2c_burst_write(stmemsc->bus, stmemsc->i2c_slv_addr,
+			       reg_addr, value, len);
+}

drivers/sensor/stmemsc/stmemsc_spi.c

@@ -0,0 +1,60 @@
+/* ST Microelectronics STMEMS hal i/f
+ *
+ * Copyright (c) 2021 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * zephyrproject-rtos/modules/hal/st/sensor/stmemsc/
+ */
+
+#include "stmemsc.h"
+
+#define SPI_READ		(1 << 7)
+
+/*
+ * SPI read
+ */
+int stmemsc_spi_read(const struct stmemsc_cfg_spi *stmemsc,
+		     uint8_t reg_addr, uint8_t *value, uint8_t len)
+{
+	const struct spi_config *spi_cfg = &stmemsc->spi_cfg;
+	uint8_t buffer_tx[2] = { reg_addr | SPI_READ, 0 };
+
+	/*  write 1 byte with reg addr (msb at 1) + 1 dummy byte */
+	const struct spi_buf tx_buf = { .buf = buffer_tx, .len = 2, };
+	const struct spi_buf_set tx = { .buffers = &tx_buf, .count = 1 };
+
+	/*
+	 *   trensactions #1: dummy read to skip first byte
+	 *   trensactions #2: read "len" byte of data
+	 */
+	const struct spi_buf rx_buf[2] = {
+		{ .buf = NULL, .len = 1, },
+		{ .buf = value, .len = len, }
+	};
+	const struct spi_buf_set rx = { .buffers = rx_buf, .count = 2 };
+
+	return spi_transceive(stmemsc->bus, spi_cfg, &tx, &rx);
+}
+
+/*
+ * SPI write
+ */
+int stmemsc_spi_write(const struct stmemsc_cfg_spi *stmemsc,
+		      uint8_t reg_addr, uint8_t *value, uint8_t len)
+{
+	const struct spi_config *spi_cfg = &stmemsc->spi_cfg;
+	uint8_t buffer_tx[1] = { reg_addr & ~SPI_READ };
+
+	/*
+	 *   trensactions #1: write 1 byte with reg addr (msb at 0)
+	 *   trensactions #2: write "len" byte of data
+	 */
+	const struct spi_buf tx_buf[2] = {
+		{ .buf = buffer_tx, .len = 1, },
+		{ .buf = value, .len = len, }
+	};
+	const struct spi_buf_set tx = { .buffers = tx_buf, .count = 2 };
+
+	return spi_write(stmemsc->bus, spi_cfg, &tx);
+}