diff --git a/drivers/serial/uart_stm32.c b/drivers/serial/uart_stm32.c
index f8d4c13a17f..e08e2472e5b 100644
--- a/drivers/serial/uart_stm32.c
+++ b/drivers/serial/uart_stm32.c
@@ -20,6 +20,8 @@
 #include <soc.h>
 #include <init.h>
 #include <drivers/uart.h>
+#include <drivers/pinmux.h>
+#include <pinmux/stm32/pinmux_stm32.h>
 #include <drivers/clock_control.h>
 
 #include <linker/sections.h>
@@ -676,6 +678,12 @@ static int uart_stm32_init(const struct device *dev)
 		return -EIO;
 	}
 
+	/* Configure dt provided device signals when available */
+	if (config->pinctrl_list_size != 0) {
+		stm32_dt_pinctrl_configure(config->pinctrl_list,
+					   config->pinctrl_list_size);
+	}
+
 	LL_USART_Disable(UartInstance);
 
 	/* TX/RX direction */
@@ -760,6 +768,9 @@ static void uart_stm32_irq_config_func_##index(const struct device *dev)	\
 #define STM32_UART_INIT(index)						\
 STM32_UART_IRQ_HANDLER_DECL(index);					\
 									\
+static const struct soc_gpio_pinctrl uart_pins_##index[] =		\
+					ST_STM32_DT_PINCTRL(0, index);	\
+									\
 static const struct uart_stm32_config uart_stm32_cfg_##index = {	\
 	.uconf = {							\
 		.base = (uint8_t *)DT_INST_REG_ADDR(index),		\
@@ -770,6 +781,8 @@ static const struct uart_stm32_config uart_stm32_cfg_##index = {	\
 	},								\
 	.hw_flow_control = DT_INST_PROP(index, hw_flow_control),	\
 	.parity = DT_INST_PROP(index, parity),				\
+	.pinctrl_list = uart_pins_##index,				\
+	.pinctrl_list_size = ARRAY_SIZE(uart_pins_##index),		\
 };									\
 									\
 static struct uart_stm32_data uart_stm32_data_##index = {		\
diff --git a/drivers/serial/uart_stm32.h b/drivers/serial/uart_stm32.h
index 865a423f09b..0756100f5dc 100644
--- a/drivers/serial/uart_stm32.h
+++ b/drivers/serial/uart_stm32.h
@@ -12,6 +12,8 @@
 #ifndef ZEPHYR_DRIVERS_SERIAL_UART_STM32_H_
 #define ZEPHYR_DRIVERS_SERIAL_UART_STM32_H_
 
+#include <drivers/pinmux.h>
+
 /* device config */
 struct uart_stm32_config {
 	struct uart_device_config uconf;
@@ -21,6 +23,8 @@ struct uart_stm32_config {
 	bool hw_flow_control;
 	/* initial parity, 0 for none, 1 for odd, 2 for even */
 	int  parity;
+	const struct soc_gpio_pinctrl *pinctrl_list;
+	size_t pinctrl_list_size;
 };
 
 /* driver data */
diff --git a/dts/bindings/serial/st,stm32-lpuart.yaml b/dts/bindings/serial/st,stm32-lpuart.yaml
index a5c89483551..f6856b60c67 100644
--- a/dts/bindings/serial/st,stm32-lpuart.yaml
+++ b/dts/bindings/serial/st,stm32-lpuart.yaml
@@ -19,3 +19,13 @@ properties:
       type: int
       description: Configures the parity of the adapter. Value 0 for none, 1 for odd and 2 for even parity.
       default: 0
+
+    pinctrl-0:
+      type: phandles
+      required: false
+      description: |
+        GPIO pin configuration for serial signals (RX, TX, RTS, CTS).  We expect
+        that the phandles will reference pinctrl nodes.
+
+        For example the USART1 would be
+           pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
diff --git a/dts/bindings/serial/st,stm32-uart.yaml b/dts/bindings/serial/st,stm32-uart.yaml
index d391c5da5b5..3a1856caf68 100644
--- a/dts/bindings/serial/st,stm32-uart.yaml
+++ b/dts/bindings/serial/st,stm32-uart.yaml
@@ -16,3 +16,13 @@ properties:
       type: int
       description: Configures the parity of the adapter. Value 0 for none, 1 for odd and 2 for even parity.
       default: 0
+
+    pinctrl-0:
+      type: phandles
+      required: false
+      description: |
+        GPIO pin configuration for serial signals (RX, TX, RTS, CTS).  We expect
+        that the phandles will reference pinctrl nodes.
+
+        For example the USART1 would be
+           pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
diff --git a/dts/bindings/serial/st,stm32-usart.yaml b/dts/bindings/serial/st,stm32-usart.yaml
index fa5dd306728..ce6639ef340 100644
--- a/dts/bindings/serial/st,stm32-usart.yaml
+++ b/dts/bindings/serial/st,stm32-usart.yaml
@@ -16,3 +16,13 @@ properties:
       type: int
       description: Configures the parity of the adapter. Value 0 for none, 1 for odd and 2 for even parity.
       default: 0
+
+    pinctrl-0:
+      type: phandles
+      required: false
+      description: |
+        GPIO pin configuration for serial signals (RX, TX, RTS, CTS).  We expect
+        that the phandles will reference pinctrl nodes.
+
+        For example the USART1 would be
+           pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;