diff --git a/boards/arm/npcx7m6fb_evb/npcx7m6fb_evb.dts b/boards/arm/npcx7m6fb_evb/npcx7m6fb_evb.dts index 556fcdc0503..757cba118b5 100644 --- a/boards/arm/npcx7m6fb_evb/npcx7m6fb_evb.dts +++ b/boards/arm/npcx7m6fb_evb/npcx7m6fb_evb.dts @@ -50,22 +50,12 @@ min-residency-us = <201000>; }; }; - - vsby-psl-in-list { - psl-in-pads = <&psl_in1>; /* Use PSL_IN1 as detection pins */ - status = "okay"; - }; }; &cpu0 { cpu-power-states = <&suspend_to_idle0 &suspend_to_idle1>; }; -&psl_in1 { - /* A falling edge detection type for PSL_IN1 */ - flag = ; -}; - /* Overwrite default device properties with overlays in board dt file here. */ &uart1 { status = "okay"; diff --git a/boards/arm/npcx9m6f_evb/npcx9m6f_evb.dts b/boards/arm/npcx9m6f_evb/npcx9m6f_evb.dts index f5f1f12b8bb..ce10b46f286 100644 --- a/boards/arm/npcx9m6f_evb/npcx9m6f_evb.dts +++ b/boards/arm/npcx9m6f_evb/npcx9m6f_evb.dts @@ -62,22 +62,12 @@ min-residency-us = <201000>; }; }; - - vsby-psl-in-list { - psl-in-pads = <&psl_in1>; /* Use PSL_IN1 as detection pins */ - status = "okay"; - }; }; &cpu0 { cpu-power-states = <&suspend_to_idle0 &suspend_to_idle1>; }; -&psl_in1 { - /* A falling edge detection type for PSL_IN1 */ - flag = ; -}; - /* Overwrite default device properties with overlays in board dt file here. */ &uart1 { status = "okay"; diff --git a/dts/arm/nuvoton/npcx.dtsi b/dts/arm/nuvoton/npcx.dtsi index 351111a920a..b9fbaaeba0d 100644 --- a/dts/arm/nuvoton/npcx.dtsi +++ b/dts/arm/nuvoton/npcx.dtsi @@ -54,21 +54,6 @@ lvol-io-pads = <>; }; - vsby-psl-in-list { - compatible = "nuvoton,npcx-pslctrl-def"; - /* Put Power Switch Logic (PSL) input pads which detect the - * wake-up events and turn on core power supply (VCC1) from - * standby power state (ultra-low-power mode) into "psl-in-pads" - * property. For example, if PSL input 1 that is plan to detect - * a 'falling edge' event, this property should be: - * psl-in-pads = <&psl_in1>; - * And the flag property in psl_in1 should change to - * flag = ; - */ - psl-in-pads = <>; - status = "disabled"; - }; - /** Dummy pinctrl node. It will be initialized with defaults based on the SoC series. * Then, the user can override the pin control options at the board level. */ @@ -585,13 +570,6 @@ status = "disabled"; }; - psl_out: psl-out { - compatible = "nuvoton,npcx-psl-out"; - controller = <&gpio8>; - pin = <5>; - label = "PSL_OUT"; - }; - i2c0_0: io_i2c_ctrl0_port0 { compatible = "nuvoton,npcx-i2c-port"; #address-cells = <1>; diff --git a/dts/arm/nuvoton/npcx/npcx-psl-ctrl-map.dtsi b/dts/arm/nuvoton/npcx/npcx-psl-ctrl-map.dtsi deleted file mode 100644 index aabfd3cc0ad..00000000000 --- a/dts/arm/nuvoton/npcx/npcx-psl-ctrl-map.dtsi +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (c) 2021 Nuvoton Technology Corporation. - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/ { - def-psl-conf-list { - compatible = "nuvoton,npcx-pslctrl-conf"; - - /* PSL input IO configurations */ - psl_in1: psl-iod2 { - offset = <0>; /* PSL_IN1/PIND2 */ - pinctrl-0 = <&altd_npsl_in1_sl>; - polarity-0 = <&altd_psl_in1_ahi>; - }; - psl_in2: psl-io00 { - offset = <1>; /* PSL_IN2/PIN00 */ - pinctrl-0 = <&altd_npsl_in2_sl>; - polarity-0 = <&altd_psl_in2_ahi>; - }; - psl_in3: psl-io01 { - offset = <2>; /* PSL_IN3/PIN01 */ - pinctrl-0 = <&altd_psl_in3_sl>; - polarity-0 = <&altd_psl_in3_ahi>; - }; - psl_in4: psl-io02 { - offset = <3>; /* PSL_IN4/PIN02 */ - pinctrl-0 = <&altd_psl_in4_sl>; - polarity-0 = <&altd_psl_in4_ahi>; - }; - }; -}; diff --git a/dts/arm/nuvoton/npcx/npcx7/npcx7-psl-ctrl-map.dtsi b/dts/arm/nuvoton/npcx/npcx7/npcx7-psl-ctrl-map.dtsi deleted file mode 100644 index cd9a21e192a..00000000000 --- a/dts/arm/nuvoton/npcx/npcx7/npcx7-psl-ctrl-map.dtsi +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (c) 2021 Nuvoton Technology Corporation. - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/* Common Power Switch Logic (PSL) pads configurations in npcx family */ -#include - -/* Specific Power Switch Logic (PSL) pads configurations in npcx7 series */ diff --git a/dts/arm/nuvoton/npcx/npcx9/npcx9-psl-ctrl-map.dtsi b/dts/arm/nuvoton/npcx/npcx9/npcx9-psl-ctrl-map.dtsi deleted file mode 100644 index db403a90766..00000000000 --- a/dts/arm/nuvoton/npcx/npcx9/npcx9-psl-ctrl-map.dtsi +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (c) 2021 Nuvoton Technology Corporation. - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/* Common Power Switch Logic (PSL) pads configurations in npcx family */ -#include - -/* Specific Power Switch Logic (PSL) pads configurations in npcx9 series */ diff --git a/dts/arm/nuvoton/npcx7.dtsi b/dts/arm/nuvoton/npcx7.dtsi index 8b6c305b50d..5a2c7526ebd 100644 --- a/dts/arm/nuvoton/npcx7.dtsi +++ b/dts/arm/nuvoton/npcx7.dtsi @@ -14,8 +14,6 @@ #include "npcx/npcx7/npcx7-espi-vws-map.dtsi" /* NPCX7 series low-voltage io controls mapping table */ #include "npcx/npcx7/npcx7-lvol-ctrl-map.dtsi" -/* NPCX7 series power-switch-logic (PSL) io controls mapping table */ -#include "npcx/npcx7/npcx7-psl-ctrl-map.dtsi" /* Device tree declarations of npcx soc family */ #include "npcx.dtsi" diff --git a/dts/arm/nuvoton/npcx9.dtsi b/dts/arm/nuvoton/npcx9.dtsi index 24fc3c87fc5..a1f9fb4d9f5 100644 --- a/dts/arm/nuvoton/npcx9.dtsi +++ b/dts/arm/nuvoton/npcx9.dtsi @@ -14,8 +14,6 @@ #include "npcx/npcx9/npcx9-espi-vws-map.dtsi" /* NPCX9 series low-voltage io controls mapping table */ #include "npcx/npcx9/npcx9-lvol-ctrl-map.dtsi" -/* NPCX9 series power-switch-logic (PSL) io controls mapping table */ -#include "npcx/npcx9/npcx9-psl-ctrl-map.dtsi" /* Device tree declarations of npcx soc family */ #include "npcx.dtsi" diff --git a/dts/bindings/gpio/nuvoton,npcx-psl-out.yaml b/dts/bindings/gpio/nuvoton,npcx-psl-out.yaml deleted file mode 100644 index f220e72c273..00000000000 --- a/dts/bindings/gpio/nuvoton,npcx-psl-out.yaml +++ /dev/null @@ -1,19 +0,0 @@ -# Copyright (c) 2021 Nuvoton Technology Corporation. -# SPDX-License-Identifier: Apache-2.0 - -description: Nuvoton, NPCX-PSL (Power Switch Logic) Output node - -compatible: "nuvoton,npcx-psl-out" - -include: [base.yaml] - -properties: - controller: - type: phandle - required: true - description: gpio controller to handle PSL output pad. - - pin: - type: int - required: true - description: pin in gpio controller for PSL output. diff --git a/dts/bindings/pinctrl/nuvoton,npcx-pslctrl-conf.yaml b/dts/bindings/pinctrl/nuvoton,npcx-pslctrl-conf.yaml deleted file mode 100644 index 59690352aeb..00000000000 --- a/dts/bindings/pinctrl/nuvoton,npcx-pslctrl-conf.yaml +++ /dev/null @@ -1,44 +0,0 @@ -# Copyright (c) 2021 Nuvoton Technology Corporation. -# SPDX-License-Identifier: Apache-2.0 - -description: | - Nuvoton NPCX pads configuration map between Pin Mux controller and - Power Switch Logic (PSL) controller driver instances. - -compatible: "nuvoton,npcx-pslctrl-conf" - -child-binding: - description: | - Child node to present the mapping between pin-mux controller - and its power switch logic (PSL) support - - properties: - offset: - type: int - required: true - description: Offset in PSL_CTS for status and detection mode. - - pinctrl-0: - type: phandles - required: true - description: Pinmux controller configuration for PSL io pads. - - polarity-0: - type: phandles - required: true - description: Active polarity configuration for PSL io pads. - - flag: - type: int - required: false - description: | - Detection mode and type for wake-up event detection. - 5 = Configures PSL input in detecting rising edge. - 6 = Configures PSL input in in detecting level high state. - 9 = Configures PSL input in detecting falling edge. - 10 = Configures PSL input in detecting level low state. - enum: - - 5 - - 6 - - 9 - - 10 diff --git a/dts/bindings/pinctrl/nuvoton,npcx-pslctrl-def.yaml b/dts/bindings/pinctrl/nuvoton,npcx-pslctrl-def.yaml deleted file mode 100644 index d6729bf5945..00000000000 --- a/dts/bindings/pinctrl/nuvoton,npcx-pslctrl-def.yaml +++ /dev/null @@ -1,17 +0,0 @@ -# Copyright (c) 2021 Nuvoton Technology Corporation. -# SPDX-License-Identifier: Apache-2.0 - -description: Nuvoton, NPCX Default Power Switch Logic (PSL) input pads configurations - -compatible: "nuvoton,npcx-pslctrl-def" - -include: [base.yaml] - -properties: - psl-in-pads: - type: phandles - required: true - description: | - list of PSL input pads that are in charge of detecting the wake-up - signals and the related circuit will turn on core power supply - (VCC1) from standby power state (ultra-low-power mode) later. diff --git a/include/zephyr/dt-bindings/pinctrl/npcx-pinctrl.h b/include/zephyr/dt-bindings/pinctrl/npcx-pinctrl.h index 443bd0bec24..f1cb62a58e5 100644 --- a/include/zephyr/dt-bindings/pinctrl/npcx-pinctrl.h +++ b/include/zephyr/dt-bindings/pinctrl/npcx-pinctrl.h @@ -10,78 +10,7 @@ * @brief NPCX specific PIN configuration flag * * Pin configuration is coded with the following fields - * Power Switch Logic (PSL) [ 0 : 3 ] - * Reserved [ 4 : 31] - * - * Applicable to NPCX7 series. + * Reserved [ 0 : 31] */ -/* - * Power Switch Logic (PSL) input wake-up mode is sensitive to edge signals. - * - * This is a component flag that should be combined with other - * `NPCX_PSL_ACTIVE_*` flags to produce a meaningful configuration. - */ -#define NPCX_PSL_MODE_EDGE (1 << 0) - -/* - * Power Switch Logic (PSL) input wake-up mode is sensitive to logical levels. - * - * This is a component flag that should be combined with other - * `NPCX_PSL_ACTIVE_*` flags to produce a meaningful configuration. - */ -#define NPCX_PSL_MODE_LEVEL (1 << 1) - -/* - * The active polarity of Power Switch Logic (PSL) input is high level or - * low-to-high transition. - * - * This is a component flag that should be combined with other - * `NPCX_PSL_MODE_*` flags to produce a meaningful configuration. - */ -#define NPCX_PSL_ACTIVE_HIGH (1 << 2) - -/* - * The active polarity of Power Switch Logic (PSL) input is low level or - * high-to-low transition. - * - * This is a component flag that should be combined with other - * `NPCX_PSL_MODE_*` flags to produce a meaningful configuration. - */ -#define NPCX_PSL_ACTIVE_LOW (1 << 3) - -/* - * Configures Power Switch Logic (PSL) input in detecting rising edge. - * - * This is used for describing the 'flag' property from PSL input device with - * 'nuvoton,npcx-pslctrl-conf' compatible. - */ -#define NPCX_PSL_RISING_EDGE (NPCX_PSL_MODE_EDGE | NPCX_PSL_ACTIVE_HIGH) - -/* - * Configures Power Switch Logic (PSL) input in detecting falling edge. - * - * This is used for describing the 'flag' property from PSL input device with - * 'nuvoton,npcx-pslctrl-conf' compatible. - */ -#define NPCX_PSL_FALLING_EDGE (NPCX_PSL_MODE_EDGE | NPCX_PSL_ACTIVE_LOW) - -/* - * Configures Power Switch Logic (PSL) input in detecting level high state (has - * logical value '1'). - * - * This is used for describing the 'flag' property from PSL input device with - * 'nuvoton,npcx-pslctrl-conf' compatible. - */ -#define NPCX_PSL_LEVEL_HIGH (NPCX_PSL_MODE_LEVEL | NPCX_PSL_ACTIVE_HIGH) - -/* - * Configures Power Switch Logic (PSL) input in detecting level low state (has - * logical value '0'). - * - * This is used for describing the 'flag' property from PSL input device with - * 'nuvoton,npcx-pslctrl-conf' compatible. - */ -#define NPCX_PSL_LEVEL_LOW (NPCX_PSL_MODE_LEVEL | NPCX_PSL_ACTIVE_LOW) - #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NPCX_PINCTRL_H_ */ diff --git a/soc/arm/nuvoton_npcx/common/scfg.c b/soc/arm/nuvoton_npcx/common/scfg.c index 60edd83592e..ba7227c82ba 100644 --- a/soc/arm/nuvoton_npcx/common/scfg.c +++ b/soc/arm/nuvoton_npcx/common/scfg.c @@ -45,10 +45,6 @@ static const struct npcx_alt def_alts[] = { static const struct npcx_lvol def_lvols[] = NPCX_DT_IO_LVOL_ITEMS_DEF_LIST; -#if DT_HAS_COMPAT_STATUS_OKAY(nuvoton_npcx_pslctrl_def) -static const struct npcx_psl_in psl_in_confs[] = NPCX_DT_PSL_IN_ITEMS_LIST; -#endif - static const struct npcx_scfg_config npcx_scfg_cfg = { .base_scfg = DT_REG_ADDR_BY_NAME(DT_NODELABEL(scfg), scfg), .base_glue = DT_REG_ADDR_BY_NAME(DT_NODELABEL(scfg), glue), @@ -152,59 +148,6 @@ bool npcx_pinctrl_flash_write_protect_is_set(void) return IS_BIT_SET(inst_scfg->DEV_CTL4, NPCX_DEV_CTL4_WP_IF); } -void npcx_pinctrl_psl_output_set_inactive(void) -{ - struct gpio_reg *const inst = (struct gpio_reg *) - NPCX_DT_PSL_OUT_CONTROLLER(0); - int pin = NPCX_DT_PSL_OUT_PIN(0); - - /* Set PSL_OUT to inactive level by setting related bit of PDOUT */ - inst->PDOUT |= BIT(pin); -} - -#if DT_HAS_COMPAT_STATUS_OKAY(nuvoton_npcx_pslctrl_def) -static void npcx_pinctrl_psl_detect_mode_sel(uint32_t offset, bool edge_mode) -{ - struct glue_reg *const inst_glue = HAL_GLUE_INST(); - - if (edge_mode) { - inst_glue->PSL_CTS |= NPCX_PSL_CTS_MODE_BIT(offset); - } else { - inst_glue->PSL_CTS &= ~NPCX_PSL_CTS_MODE_BIT(offset); - } -} - -bool npcx_pinctrl_psl_input_asserted(uint32_t i) -{ - struct glue_reg *const inst_glue = HAL_GLUE_INST(); - - if (i >= ARRAY_SIZE(psl_in_confs)) { - return false; - } - - return IS_BIT_SET(inst_glue->PSL_CTS, - NPCX_PSL_CTS_EVENT_BIT(psl_in_confs[i].offset)); -} - -void npcx_pinctrl_psl_input_configure(void) -{ - /* Configure detection type of PSL input pads */ - for (int i = 0; i < ARRAY_SIZE(psl_in_confs); i++) { - /* Detection polarity select */ - npcx_pinctrl_alt_sel(&psl_in_confs[i].polarity, - (psl_in_confs[i].flag & NPCX_PSL_ACTIVE_HIGH) != 0); - /* Detection mode select */ - npcx_pinctrl_psl_detect_mode_sel(psl_in_confs[i].offset, - (psl_in_confs[i].flag & NPCX_PSL_MODE_EDGE) != 0); - } - - /* Configure pin-mux for all PSL input pads from GPIO to PSL */ - for (int i = 0; i < ARRAY_SIZE(psl_in_confs); i++) { - npcx_pinctrl_alt_sel(&psl_in_confs[i].pinctrl, 1); - } -} -#endif - void npcx_host_interface_sel(enum npcx_hif_type hif_type) { struct scfg_reg *inst_scfg = HAL_SFCG_INST(); diff --git a/soc/arm/nuvoton_npcx/common/soc_dt.h b/soc/arm/nuvoton_npcx/common/soc_dt.h index cc3136a5cde..08163ab4f93 100644 --- a/soc/arm/nuvoton_npcx/common/soc_dt.h +++ b/soc/arm/nuvoton_npcx/common/soc_dt.h @@ -402,139 +402,6 @@ NPCX_DT_LVOL_ITEMS_BY_IDX, (,), _) \ } -/** - * @brief Get a node from path '/vsby-psl-in-list' which has a property - * 'psl-in-pads' contains Power Switch Logic (PSL) input pads which are - * in charge of detecting wake-up events on VSBY power domain. - * - * @return node identifier with that path. - */ -#define NPCX_DT_NODE_PSL_IN_LIST DT_PATH(vsby_psl_in_list) - -/** - * @brief Length of npcx_psl_in structures in 'psl-in-pads' property - * - * @return length of 'psl-in-pads' prop which type is 'phandles' - */ -#define NPCX_DT_PSL_IN_ITEMS_LEN DT_PROP_LEN(NPCX_DT_NODE_PSL_IN_LIST, \ - psl_in_pads) - -/** - * @brief Get phandle from 'psl-in-pads' prop which type is 'phandles' at index - * 'i' - * - * @param i index of 'psl-in-pads' prop which type is 'phandles' - * @return phandle from 'psl-in-pads' prop at index 'i' - */ -#define NPCX_DT_PHANDLE_FROM_PSL_IN_NODE(i) \ - DT_PHANDLE_BY_IDX(NPCX_DT_NODE_PSL_IN_LIST, psl_in_pads, i) - -/** - * @brief Get phandle from 'pinctrl-0' prop which type is 'phandles' at index - * 'i' - * - * @param i index of 'psl-in-pads' prop which type is 'phandles' - * @return phandle from 'pinctrl-0' prop at index 'i' - */ -#define NPCX_DT_PHANDLE_FROM_PSL_PINMUX_NODE(i) \ - DT_PINCTRL_0(NPCX_DT_PHANDLE_FROM_PSL_IN_NODE(i), 0) - -/** - * @brief Get phandle from 'polarity-0' prop which type is 'phandles' at index - * 'i' - * - * @param i index of 'psl-in-pads' prop which type is 'phandles' - * @return phandle from 'polarity-0' prop at index 'i' - */ -#define NPCX_DT_PHANDLE_FROM_PSL_POLARITY_NODE(i) \ - DT_PHANDLE(NPCX_DT_PHANDLE_FROM_PSL_IN_NODE(i), polarity_0) - -/** - * @brief Construct a npcx_alt structure from 'pinctrl-0' property at index 'i' - * of 'psl-in-pads' prop. - * - * @param i index of 'psl-in-pads' prop which type is 'phandles' - * @return npcx_alt item from 'pinctrl-0' property at index 'i' - */ -#define NPCX_DT_PSL_IN_ALT_CONF_BY_IDX(i) \ - { \ - .group = DT_PHA(NPCX_DT_PHANDLE_FROM_PSL_PINMUX_NODE(i), alts, group), \ - .bit = DT_PHA(NPCX_DT_PHANDLE_FROM_PSL_PINMUX_NODE(i), alts, bit), \ - .inverted = DT_PHA(NPCX_DT_PHANDLE_FROM_PSL_PINMUX_NODE(i), alts, inv), \ - }, - -/** - * @brief Construct a npcx_alt structure from 'polarity-0' property at index 'i' - * of 'psl-in-pads' prop. - * - * @param i index of 'psl-in-pads' prop which type is 'phandles' - * @return npcx_alt item from 'pinctrl-0' property at index 'i' - */ -#define NPCX_DT_PSL_IN_POL_CONF_BY_IDX(i) \ - { \ - .group = DT_PHA(NPCX_DT_PHANDLE_FROM_PSL_POLARITY_NODE(i), alts, group), \ - .bit = DT_PHA(NPCX_DT_PHANDLE_FROM_PSL_POLARITY_NODE(i), alts, bit), \ - .inverted = DT_PHA(NPCX_DT_PHANDLE_FROM_PSL_POLARITY_NODE(i), alts, inv), \ - }, - -/** - * @brief Construct a npcx_psl_in structure from 'psl-in-pads' property at index - * 'i' - * - * @param i index of 'psl-in-pads' prop which type is 'phandles' - * @return npcx_psl_in item from 'psl-in-pads' property at index 'i' - */ -#define NPCX_DT_PSL_IN_ITEMS_BY_IDX(i, _) \ - { \ - .flag = DT_PROP(NPCX_DT_PHANDLE_FROM_PSL_IN_NODE(i), flag), \ - .offset = DT_PROP(NPCX_DT_PHANDLE_FROM_PSL_IN_NODE(i), offset),\ - .pinctrl = NPCX_DT_PSL_IN_ALT_CONF_BY_IDX(i) \ - .polarity = NPCX_DT_PSL_IN_POL_CONF_BY_IDX(i) \ - } - -/** - * @brief Macro function to construct a list of npcx_psl_in items by - * UTIL_LISTIFY func. - * - * Example devicetree fragment: - * / { - * vsby-psl-in-list { - * psl-in-pads = <&psl_in1>; - * }; - * }; - * &psl_in1 { - * flag = ; - * }; - * - * Example usage: - * static const struct npcx_psl_in psl_in_confs[] = NPCX_DT_PSL_IN_ITEMS_LIST; - * - * @return an array of npcx_psl_in items which configures PSL input pads - */ -#define NPCX_DT_PSL_IN_ITEMS_LIST { \ - LISTIFY(NPCX_DT_PSL_IN_ITEMS_LEN, \ - NPCX_DT_PSL_IN_ITEMS_BY_IDX, (,), _) \ - } - -/** - * @brief Get base address of corresponding GPIO controller for enabling PSL - * output. - * - * @param @param inst number for devices with compatible 'nuvoton_npcx_psl_out'. - * @return base address of corresponding GPIO controller - */ -#define NPCX_DT_PSL_OUT_CONTROLLER(inst) DT_REG_ADDR_BY_IDX(DT_PHANDLE_BY_IDX( \ - DT_INST(inst, nuvoton_npcx_psl_out), controller, 0), 0) - -/** - * @brief Get pin of corresponding GPIO controller for enabling PSL output. - * - * @param @param inst number for devices with compatible 'nuvoton_npcx_psl_out'. - * @return pin of corresponding GPIO controller. - */ -#define NPCX_DT_PSL_OUT_PIN(inst) DT_PROP(DT_INST(inst, nuvoton_npcx_psl_out), \ - pin) - /** * @brief Check if the host interface type is automatically configured by * booter. diff --git a/soc/arm/nuvoton_npcx/common/soc_pins.h b/soc/arm/nuvoton_npcx/common/soc_pins.h index 190e9705f2b..c0aa9ef2f0b 100644 --- a/soc/arm/nuvoton_npcx/common/soc_pins.h +++ b/soc/arm/nuvoton_npcx/common/soc_pins.h @@ -41,27 +41,6 @@ struct npcx_lvol { uint16_t bit:3; /** Related register bit for low-voltage conf. */ }; -/** - * @brief NPCX Power Switch Logic (PSL) input configuration structure - * - * Used to configure PSL input pad which detect the wake-up events and switch - * core power supply (VCC1) on from standby power state (ultra-low-power mode). - */ -struct npcx_psl_in { - /** flag to indicate the detection mode and type. */ - uint32_t flag; - /** offset in PSL_CTS for status and detection mode. */ - uint32_t offset; - /** Device Alternate Function. (DEVALT) register/bit for PSL pin-muxing. - * It determines whether PSL input or GPIO selected to the pad. - */ - struct npcx_alt pinctrl; - /** Device Alternate Function. (DEVALT) register/bit for PSL polarity. - * It determines active polarity of wake-up signal via PSL input. - */ - struct npcx_alt polarity; -}; - /** * @brief Select i2c port pads of i2c controller * @@ -83,34 +62,6 @@ int npcx_pinctrl_flash_write_protect_set(void); */ bool npcx_pinctrl_flash_write_protect_is_set(void); -/** - * @brief Set PSL output pad to inactive level. - * - * The PSL_OUT output pad should be connected to the control pin of either the - * switch or the power supply used generate the VCC1 power from the VSBY power. - * When PSL_OUT is high (active), the Core Domain power supply (VCC1) is turned - * on. When PSL_OUT is low (inactive) by setting bit of related PDOUT, VCC1 is - * turned off for entering standby power state (ultra-low-power mode). - */ -void npcx_pinctrl_psl_output_set_inactive(void); - -/** - * @brief Configure PSL input pads in psl_in_pads list - * - * Used to configure PSL input pads list from "psl-in-pads" property which - * detect the wake-up events and the related circuit will turn on core power - * supply (VCC1) from standby power state (ultra-low-power mode) later. - */ -void npcx_pinctrl_psl_input_configure(void); - -/** - * @brief Get the asserted status of PSL input pads - * - * @param i index of 'psl-in-pads' prop - * @return 1 is asserted, otherwise de-asserted. - */ -bool npcx_pinctrl_psl_input_asserted(uint32_t i); - /** * @brief Restore all connections between IO pads that support low-voltage power * supply and GPIO hardware devices. This utility is used for solving a