boards: M5Stack Core2 module suppport
This Pull-Request enables support for the M5Stack Core2 hardware. The module features a LCD display, touchscreen, battery, USB-Port, 8MB RAM and 16MB Flash. Basic features are working. Please refere to the board documentation for details. Signed-off-by: Martin Kiepfer <mrmarteng@teleschirm.org> gpio: gpio_axp192: fix dependecy between GET_DIRECTION and GET_CONFIG configuration Latest unit gpio get_direction unit test failes, as get_direction api internally requires get_config functionality. This commit fixes this dependecy. Signed-off-by: Martin Kiepfer <m.kiepfer@teleschirm.org>
This commit is contained in:
Martin Kiepfer
Fabio Baltieri
parent
22db117052
commit
24eb2ee80a
10 changed files with 612 additions and 0 deletions
12
boards/xtensa/m5stack_core2/Kconfig.board
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12
boards/xtensa/m5stack_core2/Kconfig.board
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# M5Stack Core2 board configuration
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# Copyright (c) 2023 Martin Kiepfer <m.kiepfer@teleschirm.org>
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_M5STACK_CORE2
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bool "M5Stack Core2 Development Board"
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depends on SOC_SERIES_ESP32
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choice SOC_PART_NUMBER
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default SOC_ESP32_D0WD_V3
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endchoice
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51
boards/xtensa/m5stack_core2/Kconfig.defconfig
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boards/xtensa/m5stack_core2/Kconfig.defconfig
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# M5Stack Core2 board configuration
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# Copyright (c) 2022 AVSystem Sławomir Wolf Sp.j. (AVSystem)
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# Copyright (c) 2023 Martin Kiepfer <m.kiepfer@teleschirm.org>
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_M5STACK_CORE2
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config BOARD
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default "m5stack_core2"
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depends on BOARD_M5STACK_CORE2
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config ENTROPY_GENERATOR
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default y
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config HEAP_MEM_POOL_SIZE
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default 98304 if WIFI
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default 65536 if BT
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default 4096
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config KERNEL_MEM_POOL
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default y
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choice BT_HCI_BUS_TYPE
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default BT_ESP32 if BT
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endchoice
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config MFD_INIT_PRIORITY
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default 60
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config REGULATOR_AXP192_INIT_PRIORITY
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default 76
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config GPIO_AXP192_INIT_PRIORITY
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default 80
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config GPIO_HOGS_INIT_PRIORITY
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default 81
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config INPUT_FT5336_INTERRUPT
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default y if INPUT
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config KSCAN
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default y if DISPLAY
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config INPUT
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default y if KSCAN
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config LV_COLOR_16_SWAP
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default y if LVGL
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endif # BOARD_M5STACK_CORE2
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9
boards/xtensa/m5stack_core2/board.cmake
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boards/xtensa/m5stack_core2/board.cmake
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# SPDX-License-Identifier: Apache-2.0
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if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
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set(OPENOCD OPENOCD-NOTFOUND)
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endif()
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find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
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include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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BIN
boards/xtensa/m5stack_core2/doc/img/m5stack_core2.webp
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BIN
boards/xtensa/m5stack_core2/doc/img/m5stack_core2.webp
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Binary file not shown.
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After Width: | Height: | Size: 87 KiB |
194
boards/xtensa/m5stack_core2/doc/index.rst
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boards/xtensa/m5stack_core2/doc/index.rst
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.. _m5stack_core2:
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M5Stack Core2
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#############
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Overview
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********
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M5Stack Core2 is an ESP32-based development board from M5Stack. It is the successor for the Core module.
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M5Stack Core2 features the following integrated components:
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- ESP32-D0WDQ6-V3 chip (240MHz dual core, 600 DMIPS, 520KB SRAM, Wi-Fi)
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- PSRAM 8MB
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- Flash 16MB
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- LCD IPS TFT 2", 320x240 px screen (ILI9342C)
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- Touch screen (FT6336U)
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- PMU AXP192
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- Audio NS4168 amplifier (1W-092 speaker)
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- Vibration motor
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- RTC BM8563
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- USB CP2104
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- SD-Card slot
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- IMO 6-axis IMU MPU6886
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- MIC SPM1423
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- Battery 390mAh 3,7V
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.. figure:: img/m5stack_core2.webp
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:align: center
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:alt: M5Stack-Core2
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:width: 400 px
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M5Stack-Core2 module
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Functional Description
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**********************
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The following table below describes the key components, interfaces, and controls
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of the M5Stack Core2 board.
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.. _M5Core2 Schematic: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/schematic/Core/CORE2_V1.0_SCH.pdf
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.. _MPU-ESP32: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/esp32_datasheet_en_v3.9.pdf
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.. _TOUCH-FT6336U: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/Ft6336GU_Firmware%20外部寄存器_20151112-%20EN.xlsx
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.. _SND-NS4168: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/NS4168_CN_datasheet.pdf
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.. _MPU-6886: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/MPU-6886-000193%2Bv1.1_GHIC_en.pdf
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.. _LCD-ILI9342C: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/ILI9342C-ILITEK.pdf
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.. _SPM-1423: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/SPM1423HM4H-B_datasheet_en.pdf
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.. _RTC-BM8563: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/BM8563_V1.1_cn.pdf
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.. _SY7088: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/SY7088-Silergy.pdf
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.. _PMU-AXP192: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/AXP192_datasheet_en.pdf
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.. _VIB-1072_RFN01: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/1027RFN01-33d.pdf
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+------------------+--------------------------------------------------------------------------+
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| Key Component | Description |
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+==================+==========================================================================+
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|| ESP32-D0WDQ6-V2 || This `MPU-ESP32`_ module provides complete Wi-Fi and Bluetooth |
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|| module || functionalities and integrates a 16-MB SPI flash. |
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+------------------+--------------------------------------------------------------------------+
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|| 32.768 kHz RTC || External precision 32.768 kHz crystal oscillator serves as a clock with |
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|| || low-power consumption while the chip is in Deep-sleep mode. |
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+------------------+--------------------------------------------------------------------------+
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| Status LED | One user LED connected to the GPIO pin. |
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+------------------+--------------------------------------------------------------------------+
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|| USB Port || USB interface. Power supply for the board as well as the |
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|| || communication interface between a computer and the board. |
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|| || Contains: TypeC x 1, GROVE(I2C+I/O+UART) x 1 |
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+------------------+--------------------------------------------------------------------------+
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| Reset button | Reset button |
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+------------------+--------------------------------------------------------------------------+
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| Power Switch | Power on/off button. |
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+------------------+--------------------------------------------------------------------------+
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|| LCD screen || Built-in LCD TFT display \(`LCD-ILI9342C`_, 2", 320x240 px\) |
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|| || controlled via SPI interface |
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+------------------+--------------------------------------------------------------------------+
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|| 3-axis || The `MPU-6886`_ is a 6-axis MotionTracking device that combines a |
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|| gyrosopce || 3-axis gyroscope and a 3-axis accelerometer. |
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+------------------+--------------------------------------------------------------------------+
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|| Built-in || The `SPM-1423`_ I2S driven microphone. |
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|| microphone || |
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+------------------+--------------------------------------------------------------------------+
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| Built-in speaker | 1W speaker for audio output via I2S interface. |
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+------------------+--------------------------------------------------------------------------+
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Supported Features
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==================
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The Zephyr m5stack_core2 board configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+-----------+------------+-------------------------------------+
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| SPI | on-chip | spi |
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+-----------+------------+-------------------------------------+
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| CLOCK | on-chip | reset and clock control |
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+-----------+------------+-------------------------------------+
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| COUNTER | on-chip | rtc |
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+-----------+------------+-------------------------------------+
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| WATCHDOG | on-chip | independent watchdog |
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+-----------+------------+-------------------------------------+
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| PWM | on-chip | pwm |
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+-----------+------------+-------------------------------------+
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| ADC | on-chip | adc |
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+-----------+------------+-------------------------------------+
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| DAC | on-chip | dac |
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+-----------+------------+-------------------------------------+
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| die-temp | on-chip | die temperature sensor |
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+-----------+------------+-------------------------------------+
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Start Application Development
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*****************************
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Before powering up your M5Stack Core2, please make sure that the board is in good
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condition with no obvious signs of damage.
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System requirements
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===================
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Prerequisites
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-------------
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Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
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below to retrieve those files.
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.. code-block:: console
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west blobs fetch hal_espressif
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.. note::
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It is recommended running the command above after :file:`west update`.
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Building & Flashing
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-------------------
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Build and flash applications as usual (see :ref:`build_an_application` and
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:ref:`application_run` for more details).
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: m5stack_core2
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:goals: build
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The usual ``flash`` target will work with the ``m5stack_core2`` board
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configuration. Here is an example for the :ref:`hello_world`
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application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: m5stack_core2
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:goals: flash
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The baud rate of 921600bps is set by default. If experiencing issues when flashing,
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try using different values by using ``--esp-baud-rate <BAUD>`` option during
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``west flash`` (e.g. ``west flash --esp-baud-rate 115200``).
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You can also open the serial monitor using the following command:
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.. code-block:: shell
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west espressif monitor
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After the board has automatically reset and booted, you should see the following
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message in the monitor:
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.. code-block:: console
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***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
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Hello World! m5stack_core2
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Debugging
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---------
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M5Stack Core2 debugging is not supported due to pinout limitations.
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Related Documents
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*****************
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- `M5StickC PLUS schematic <https://static-cdn.m5stack.com/resource/docs/products/core/m5stickc_plus/m5stickc_plus_sch_03.webp>`_ (WEBP)
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- `ESP32-PICO-D4 Datasheet <https://www.espressif.com/sites/default/files/documentation/esp32-pico-d4_datasheet_en.pdf>`_ (PDF)
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- `M5StickC PLUS docs <https://docs.m5stack.com/en/core/m5stickc_plus>`_
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- `ESP32 Datasheet <https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf>`_ (PDF)
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- `ESP32 Hardware Reference <https://docs.espressif.com/projects/esp-idf/en/latest/esp32/hw-reference/index.html>`_
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56
boards/xtensa/m5stack_core2/m5stack_core2-pinctrl.dtsi
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56
boards/xtensa/m5stack_core2/m5stack_core2-pinctrl.dtsi
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/*
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* Copyright (c) 2022 AVSystem Sławomir Wolf Sp.j. (AVSystem)
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* Copyright (c) 2023 Martin Kiepfer <m.kiepfer@teleschrim.org>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
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#include <dt-bindings/pinctrl/esp32-pinctrl.h>
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#include <zephyr/dt-bindings/pinctrl/esp32-gpio-sigmap.h>
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&pinctrl {
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uart0_tx_gpio1: uart0_tx_gpio1 {
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pinmux = <UART0_TX_GPIO1>;
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};
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uart0_rx_gpio3: uart0_rx_gpio3 {
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pinmux = <UART0_RX_GPIO3>;
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bias-pull-up;
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};
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spim3_default: spim3_default {
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group1 {
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pinmux = <SPIM3_MISO_GPIO38>,
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<SPIM3_SCLK_GPIO18>,
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<SPIM3_CSEL_GPIO5>;
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};
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group2 {
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pinmux = <SPIM3_MOSI_GPIO23>;
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output-low;
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};
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};
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spim2_default: spim2_default {
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group1 {
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pinmux = <SPIM2_SCLK_GPIO6>,
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<SPIM2_MISO_GPIO7>,
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<SPIM2_CSEL_GPIO11>;
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};
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group2 {
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pinmux = <SPIM2_MOSI_GPIO8>;
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output-low;
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};
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};
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i2c0_default: i2c0_default {
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group1 {
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pinmux = <I2C0_SDA_GPIO21>,
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<I2C0_SCL_GPIO22>;
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drive-open-drain;
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output-high;
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};
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};
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};
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246
boards/xtensa/m5stack_core2/m5stack_core2.dts
Normal file
246
boards/xtensa/m5stack_core2/m5stack_core2.dts
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/*
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* Copyright (c) 2023 Martin Kiepfer <mrmarteng@teleschirm.org>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <espressif/esp32/esp32_d0wd_v3.dtsi>
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#include "m5stack_core2-pinctrl.dtsi"
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#include <zephyr/dt-bindings/display/ili9xxx.h>
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||||||
|
#include <zephyr/dt-bindings/regulator/axp192.h>
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "esp32";
|
||||||
|
compatible = "espressif,esp32";
|
||||||
|
|
||||||
|
aliases {
|
||||||
|
pwr-led = &pwr_led;
|
||||||
|
uart-0 = &uart0;
|
||||||
|
i2c-0 = &i2c0;
|
||||||
|
watchdog0 = &wdt0;
|
||||||
|
rtc = &pfc8563_rtc;
|
||||||
|
led0 = &led_pwr;
|
||||||
|
};
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
zephyr,sram = &sram0;
|
||||||
|
zephyr,console = &uart0;
|
||||||
|
zephyr,shell-uart = &uart0;
|
||||||
|
zephyr,flash = &flash0;
|
||||||
|
zephyr,display = &ili9342c;
|
||||||
|
zephyr,keyboard-scan = &kscan_input;
|
||||||
|
zephyr,code-partition = &slot0_partition;
|
||||||
|
zephyr,rtc = &pfc8563_rtc;
|
||||||
|
};
|
||||||
|
|
||||||
|
leds {
|
||||||
|
compatible = "gpio-leds";
|
||||||
|
led_pwr: led_pwr {
|
||||||
|
gpios = <&axp192_gpio 1 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
|
||||||
|
label = "Power LED";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpu0 {
|
||||||
|
clock-frequency = <ESP32_CLK_CPU_240M>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpu1 {
|
||||||
|
clock-frequency = <ESP32_CLK_CPU_240M>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&psram0 {
|
||||||
|
reg = <0x3f800000 DT_SIZE_M(8)>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
&uart0 {
|
||||||
|
status = "okay";
|
||||||
|
current-speed = <115200>;
|
||||||
|
pinctrl-0 = <&uart0_tx_gpio1 &uart0_rx_gpio3>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
};
|
||||||
|
|
||||||
|
&gpio0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&gpio1 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c0 {
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <I2C_BITRATE_STANDARD>;
|
||||||
|
sda-gpios = <&gpio0 21 GPIO_OPEN_DRAIN>;
|
||||||
|
scl-gpios = <&gpio0 22 GPIO_OPEN_DRAIN>;
|
||||||
|
pinctrl-0 = <&i2c0_default>;
|
||||||
|
scl-timeout-us = <0>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
|
||||||
|
pfc8563_rtc: pfc8563@51 {
|
||||||
|
compatible = "nxp,pcf8523";
|
||||||
|
reg = <0x51>;
|
||||||
|
status = "okay";
|
||||||
|
battery-switch-over = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
axp192_pmic: axp192@34 {
|
||||||
|
compatible = "x-powers,axp192";
|
||||||
|
reg = <0x34>;
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
axp192_regulator: axp192_regulator {
|
||||||
|
compatible = "x-powers,axp192-regulator";
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
vdd_mcu: DCDC1 {
|
||||||
|
regulator-init-microvolt = <3350000>;
|
||||||
|
regulator-min-microvolt = <3200000>;
|
||||||
|
regulator-max-microvolt = <3400000>;
|
||||||
|
regulator-initial-mode = <AXP192_DCDC_MODE_AUTO>;
|
||||||
|
regulator-boot-on;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
lcd_bg: DCDC3 {
|
||||||
|
regulator-init-microvolt = <2800000>;
|
||||||
|
regulator-min-microvolt = <2500000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
|
regulator-boot-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
v_peri: LDO2 {
|
||||||
|
regulator-init-microvolt = <3300000>;
|
||||||
|
regulator-min-microvolt = <3200000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
|
regulator-boot-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
vib_motor: LDO3 {
|
||||||
|
regulator-init-microvolt = <2800000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
axp192_gpio: axp192_gpio {
|
||||||
|
compatible = "x-powers,axp192-gpio";
|
||||||
|
gpio-controller;
|
||||||
|
#gpio-cells = <2>;
|
||||||
|
ngpios = <5>;
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
pwr_led: axp192_gpio1 {
|
||||||
|
gpio-hog;
|
||||||
|
gpios = <1 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
|
||||||
|
output-high;
|
||||||
|
line-name = "pwr-led";
|
||||||
|
};
|
||||||
|
|
||||||
|
bus_pwr_en: axp192_gpio0 {
|
||||||
|
gpio-hog;
|
||||||
|
gpios = <0 0>;
|
||||||
|
input;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
ft5336@38 {
|
||||||
|
compatible = "focaltech,ft5336";
|
||||||
|
reg = <0x38>;
|
||||||
|
int-gpios = <&gpio1 7 0>;
|
||||||
|
|
||||||
|
kscan_input: kscan-input {
|
||||||
|
compatible = "zephyr,kscan-input";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&spi3 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
status = "okay";
|
||||||
|
pinctrl-0 = <&spim3_default>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
dma-enabled;
|
||||||
|
clock-frequency = <20000000>;
|
||||||
|
cs-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
|
||||||
|
|
||||||
|
ili9342c: ili9342c@0 {
|
||||||
|
compatible = "ilitek,ili9342c";
|
||||||
|
spi-max-frequency = <30000000>;
|
||||||
|
reg = <0>;
|
||||||
|
cmd-data-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
|
||||||
|
vin-supply = <&lcd_bg>;
|
||||||
|
reset-gpios = <&axp192_gpio 4 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
|
||||||
|
pixel-format = <ILI9XXX_PIXEL_FORMAT_RGB565>;
|
||||||
|
display-inversion;
|
||||||
|
width = <320>;
|
||||||
|
height = <240>;
|
||||||
|
rotation = <0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
&timer0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&timer1 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&timer2 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&timer3 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&trng0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&flash0 {
|
||||||
|
status = "okay";
|
||||||
|
reg = <0 DT_SIZE_M(16)>;
|
||||||
|
|
||||||
|
partitions {
|
||||||
|
compatible = "fixed-partitions";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
/* Reserve 60kB for the bootloader */
|
||||||
|
boot_partition: partition@1000 {
|
||||||
|
label = "mcuboot";
|
||||||
|
reg = <0x00001000 0x0000F000>;
|
||||||
|
read-only;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Reserve 1024kB for the application in slot 0 */
|
||||||
|
slot0_partition: partition@10000 {
|
||||||
|
label = "image-0";
|
||||||
|
reg = <0x00010000 0x00100000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Reserve 1024kB for the application in slot 1 */
|
||||||
|
slot1_partition: partition@110000 {
|
||||||
|
label = "image-1";
|
||||||
|
reg = <0x00110000 0x00100000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Reserve 256kB for the scratch partition */
|
||||||
|
scratch_partition: partition@210000 {
|
||||||
|
label = "image-scratch";
|
||||||
|
reg = <0x00210000 0x00040000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* 14MB storage */
|
||||||
|
storage_partition: partition@250000 {
|
||||||
|
label = "storage";
|
||||||
|
reg = <0x00250000 0x00db0000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
20
boards/xtensa/m5stack_core2/m5stack_core2.yaml
Normal file
20
boards/xtensa/m5stack_core2/m5stack_core2.yaml
Normal file
|
|
@ -0,0 +1,20 @@
|
||||||
|
identifier: m5stack_core2
|
||||||
|
name: M5Stack Core2
|
||||||
|
type: mcu
|
||||||
|
arch: xtensa
|
||||||
|
toolchain:
|
||||||
|
- zephyr
|
||||||
|
supported:
|
||||||
|
- gpio
|
||||||
|
- i2c
|
||||||
|
- spi
|
||||||
|
- watchdog
|
||||||
|
- regulator
|
||||||
|
- uart
|
||||||
|
- pinmux
|
||||||
|
- nvs
|
||||||
|
testing:
|
||||||
|
default: true
|
||||||
|
ignore_tags:
|
||||||
|
- net
|
||||||
|
- bluetooth
|
||||||
19
boards/xtensa/m5stack_core2/m5stack_core2_defconfig
Normal file
19
boards/xtensa/m5stack_core2/m5stack_core2_defconfig
Normal file
|
|
@ -0,0 +1,19 @@
|
||||||
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
|
||||||
|
CONFIG_BOARD_M5STACK_CORE2=y
|
||||||
|
|
||||||
|
CONFIG_SOC_SERIES_ESP32=y
|
||||||
|
|
||||||
|
CONFIG_MAIN_STACK_SIZE=2048
|
||||||
|
CONFIG_ESP_HEAP_MEM_POOL_REGION_1_SIZE=0
|
||||||
|
|
||||||
|
CONFIG_GPIO=y
|
||||||
|
|
||||||
|
CONFIG_REGULATOR=y
|
||||||
|
|
||||||
|
CONFIG_CONSOLE=y
|
||||||
|
CONFIG_SERIAL=y
|
||||||
|
CONFIG_UART_CONSOLE=y
|
||||||
|
|
||||||
|
# for debugging
|
||||||
|
CONFIG_SHELL=y
|
||||||
5
boards/xtensa/m5stack_core2/support/openocd.cfg
Normal file
5
boards/xtensa/m5stack_core2/support/openocd.cfg
Normal file
|
|
@ -0,0 +1,5 @@
|
||||||
|
set ESP_RTOS none
|
||||||
|
set ESP32_ONLYCPU 1
|
||||||
|
|
||||||
|
source [find interface/ftdi/esp32_devkitj_v1.cfg]
|
||||||
|
source [find target/esp32.cfg]
|
||||||
Loading…
Add table
Add a link
Reference in a new issue