arm: handle time slicing before context switch on exception.
Currently Thread time slice is getting reset at end of timer interrupt. Due to which equal priority threads behind current thread in ready_q are not getting chance to run and leading to starvation. This patch handles time slice in _ExcExit section context switch is required. Jira: ZEP-2444 Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com> Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com>
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1 changed files with 11 additions and 11 deletions
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@ -58,17 +58,6 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, _IntExit)
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/* _IntExit falls through to _ExcExit (they are aliases of each other) */
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/* _IntExit falls through to _ExcExit (they are aliases of each other) */
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#ifdef CONFIG_TIMESLICING
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push {lr}
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bl _update_time_slice_before_swap
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#if defined(CONFIG_ARMV6_M)
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pop {r0}
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mov lr, r0
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#else
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pop {lr}
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#endif /* CONFIG_ARMV6_M */
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#endif
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/**
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/**
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*
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*
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* @brief Kernel housekeeping when exiting exception handler installed
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* @brief Kernel housekeeping when exiting exception handler installed
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@ -98,6 +87,17 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, _ExcExit)
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cmp r0, r1
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cmp r0, r1
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beq _EXIT_EXC
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beq _EXIT_EXC
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#ifdef CONFIG_TIMESLICING
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push {lr}
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bl _update_time_slice_before_swap
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#if defined(CONFIG_ARMV6_M)
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pop {r0}
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mov lr, r0
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#else
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pop {lr}
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#endif /* CONFIG_ARMV6_M */
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#endif /* CONFIG_TIMESLICING */
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/* context switch required, pend the PendSV exception */
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/* context switch required, pend the PendSV exception */
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ldr r1, =_SCS_ICSR
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ldr r1, =_SCS_ICSR
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ldr r2, =_SCS_ICSR_PENDSV
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ldr r2, =_SCS_ICSR_PENDSV
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