arm: handle time slicing before context switch on exception.

Currently Thread time slice is getting reset at end of timer
interrupt. Due to which equal priority threads behind current thread
in ready_q are not getting chance to run and leading to starvation.

This patch handles time slice in _ExcExit section context switch is
required.

Jira: ZEP-2444

Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Youvedeep Singh 2017-08-02 11:17:24 +05:30 committed by Anas Nashif
commit 24e083c5d6

View file

@ -58,17 +58,6 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, _IntExit)
/* _IntExit falls through to _ExcExit (they are aliases of each other) */ /* _IntExit falls through to _ExcExit (they are aliases of each other) */
#ifdef CONFIG_TIMESLICING
push {lr}
bl _update_time_slice_before_swap
#if defined(CONFIG_ARMV6_M)
pop {r0}
mov lr, r0
#else
pop {lr}
#endif /* CONFIG_ARMV6_M */
#endif
/** /**
* *
* @brief Kernel housekeeping when exiting exception handler installed * @brief Kernel housekeeping when exiting exception handler installed
@ -98,6 +87,17 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, _ExcExit)
cmp r0, r1 cmp r0, r1
beq _EXIT_EXC beq _EXIT_EXC
#ifdef CONFIG_TIMESLICING
push {lr}
bl _update_time_slice_before_swap
#if defined(CONFIG_ARMV6_M)
pop {r0}
mov lr, r0
#else
pop {lr}
#endif /* CONFIG_ARMV6_M */
#endif /* CONFIG_TIMESLICING */
/* context switch required, pend the PendSV exception */ /* context switch required, pend the PendSV exception */
ldr r1, =_SCS_ICSR ldr r1, =_SCS_ICSR
ldr r2, =_SCS_ICSR_PENDSV ldr r2, =_SCS_ICSR_PENDSV