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everywhere: reindent .overlay files with tabs

Browse source 
`checkpatch.pl` requires that dts sources are indented with tabs,
fix all the spaces that slipped in while checkpatch wasn't watching.

Signed-off-by: Jordan Yates <jordan@embeint.com>
This commit is contained in:
Jordan Yates 2024-06-23 20:10:36 +10:00 • committed by Alberto Escolar
commit 243eb36b18
175 changed files with 773 additions and 774 deletions
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2
tests/drivers/build_all/adc/boards/native_sim.overlay
View file

@ -80,7 +80,7 @@
compatible = "ti,ads1119";
reg = <0x6>;
#io-channel-cells = <1>;
};
};
test_i2c_ads1112: ads1112@7 {
compatible = "ti,ads1112";

10
tests/drivers/build_all/gnss/app.overlay
View file

@ -9,14 +9,14 @@
#address-cells = <1>;
#size-cells = <1>;
test_uart: uart@0 {
compatible = "vnd,serial";
reg = <0x0 0x1000>;
status = "okay";
test_uart: uart@0 {
compatible = "vnd,serial";
reg = <0x0 0x1000>;
status = "okay";
gnss: gnss-nmea-generic {
compatible = "gnss-nmea-generic";
};
};
};
};
};

36
tests/drivers/build_all/gpio/adc_ads1145s0x_gpio.overlay
View file

@ -1,21 +1,21 @@
&test_spi {
test_spi_ads114s08: ads114s08@0 {
compatible = "ti,ads114s08";
status = "okay";
spi-max-frequency = <10000000>;
reg = <0x00>;
#address-cells = <1>;
#size-cells = <0>;
#io-channel-cells = <1>;
reset-gpios = <&test_gpio 0 0>;
drdy-gpios = <&test_gpio 0 0>;
start-sync-gpios = <&test_gpio 0 0>;
test_spi_ads114s08: ads114s08@0 {
compatible = "ti,ads114s08";
status = "okay";
spi-max-frequency = <10000000>;
reg = <0x00>;
#address-cells = <1>;
#size-cells = <0>;
#io-channel-cells = <1>;
reset-gpios = <&test_gpio 0 0>;
drdy-gpios = <&test_gpio 0 0>;
start-sync-gpios = <&test_gpio 0 0>;
test_spi_ads114s08_gpio: ads114s0x_gpio {
compatible = "ti,ads114s0x-gpio";
gpio-controller;
ngpios = <4>;
#gpio-cells = <2>;
};
};
test_spi_ads114s08_gpio: ads114s0x_gpio {
compatible = "ti,ads114s0x-gpio";
gpio-controller;
ngpios = <4>;
#gpio-cells = <2>;
};
};
};

2
tests/drivers/build_all/gpio/efinix_sapphire.overlay
View file

@ -17,5 +17,5 @@
ngpios = <4>;
status = "okay";
};
};
};
};

2
tests/drivers/build_all/gpio/iproc.overlay
View file

@ -6,7 +6,7 @@
* Application overlay for testing iproc driver builds
*/
/ {
/ {
test {
test_int_gpio {
#address-cells = <1>;

48
tests/drivers/build_all/i2c/boards/qemu_cortex_m3.overlay
View file

@ -6,32 +6,32 @@
#include <zephyr/dt-bindings/i2c/i2c.h>
/ {
i2c0: i2c@88888888 {
compatible = "xlnx,xps-iic-2.00.a";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x88888888 0x10000>;
interrupt-parent = <&nvic>;
interrupts = <4 1>;
};
/ {
i2c0: i2c@88888888 {
compatible = "xlnx,xps-iic-2.00.a";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x88888888 0x10000>;
interrupt-parent = <&nvic>;
interrupts = <4 1>;
};
i2c1: i2c@88898888 {
compatible = "xlnx,xps-iic-2.1";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x88898888 0x10000>;
interrupt-parent = <&nvic>;
interrupts = <5 1>;
};
i2c1: i2c@88898888 {
compatible = "xlnx,xps-iic-2.1";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x88898888 0x10000>;
interrupt-parent = <&nvic>;
interrupts = <5 1>;
};
i2c2: i2c@888A8888 {
i2c2: i2c@888A8888 {
compatible = "brcm,iproc-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x888A8888 0x100>;
interrupt-parent = <&nvic>;
interrupts = <6 1>;
};
#address-cells = <1>;
#size-cells = <0>;
reg = <0x888A8888 0x100>;
interrupt-parent = <&nvic>;
interrupts = <6 1>;
};
};

24
tests/drivers/build_all/i3c/boards/qemu_cortex_m3.overlay
View file

@ -4,16 +4,16 @@
* SPDX-License-Identifier: Apache-2.0
*/
/ {
i3c0: i3c@88888888 {
compatible = "cdns,i3c";
#address-cells = <3>;
#size-cells = <0>;
reg = <0x88888888 0x400>;
interrupt-parent = <&nvic>;
interrupts = <4 1>;
input-clock-frequency = <200000000>;
i3c-scl-hz = <12500000>;
i2c-scl-hz = <400000>;
};
/ {
i3c0: i3c@88888888 {
compatible = "cdns,i3c";
#address-cells = <3>;
#size-cells = <0>;
reg = <0x88888888 0x400>;
interrupt-parent = <&nvic>;
interrupts = <4 1>;
input-clock-frequency = <200000000>;
i3c-scl-hz = <12500000>;
i2c-scl-hz = <400000>;
};
};

28
tests/drivers/build_all/input/app.overlay
View file

@ -19,9 +19,9 @@
channel@0 {
reg = <0>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_VDD_1";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_VDD_1";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
};
};
@ -288,17 +288,17 @@
invert-y;
};
paw32xx@3 {
compatible = "pixart,paw32xx";
reg = <3>;
spi-max-frequency = <0>;
motion-gpios = <&test_gpio 0 0>;
zephyr,axis-x = <0>;
zephyr,axis-y = <1>;
invert-x;
invert-y;
res-cpi = <800>;
};
paw32xx@3 {
compatible = "pixart,paw32xx";
reg = <3>;
spi-max-frequency = <0>;
motion-gpios = <&test_gpio 0 0>;
zephyr,axis-x = <0>;
zephyr,axis-y = <1>;
invert-x;
invert-y;
res-cpi = <800>;
};
};
};
};

2
tests/drivers/build_all/uart/boards/qemu_cortex_m3.overlay
View file

@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
/ {
/ {
uart3: uart@88888888 {
compatible = "cdns,uart";
reg = <0x88888888 0x400>;

16
tests/drivers/build_all/watchdog/boards/qemu_cortex_m3.overlay
View file

@ -4,12 +4,12 @@
* SPDX-License-Identifier: Apache-2.0
*/
/ {
watchdog: watchdog@88888888 {
compatible = "xlnx,xps-timebase-wdt-1.00.a";
reg = <0x88888888 0x10000>;
clocks = <&sysclk>;
xlnx,wdt-interval = <31>;
xlnx,wdt-enable-once = <1>;
};
/ {
watchdog: watchdog@88888888 {
compatible = "xlnx,xps-timebase-wdt-1.00.a";
reg = <0x88888888 0x10000>;
clocks = <&sysclk>;
xlnx,wdt-interval = <31>;
xlnx,wdt-enable-once = <1>;
};
};