doc: fix misspellings in Kconfig files
Fix misspellings in Kconfig files missed during regular reviews. Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
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11 changed files with 14 additions and 14 deletions
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@ -76,8 +76,8 @@ config CUSTOM_SECTION_MIN_ALIGN_SIZE
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int "Custom Section Align Size"
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default 32
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help
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Custom algin size of memory section in linker scripts. Usually
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it should consume less alignment memory. Alougth this alignment
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Custom align size of memory section in linker scripts. Usually
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it should consume less alignment memory. Although this alignment
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size is configured by users, it must also respect the power of
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two regulation if hardware requires.
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@ -85,7 +85,7 @@ config CLOCK_CONTROL_NRF_CALIBRATION_TEMP_DIFF
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this amount since the last calibration.
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config CLOCK_CONTROL_NRF_CALIBRATION_DEBUG
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bool "Calibration intrumentation"
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bool "Calibration instrumentation"
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help
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Enables retrieving debug information like number of performed or
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skipped calibrations.
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@ -23,7 +23,7 @@ config ESPI_PERIPHERAL_UART
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def_bool y
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config ESPI_PERIPHERAL_UART_SOC_MAPPING
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int "SoC port exposed as logcial eSPI UART"
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int "SoC port exposed as logical eSPI UART"
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default 2
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depends on ESPI_PERIPHERAL_UART
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help
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@ -19,14 +19,14 @@ config KSCAN_XEC_COLUMN_SIZE
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default 16
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help
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Adjust the value to your keyboard columns. The maximum
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colum size for the Microchip XEC family is 18 (from 0 to 17).
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column size for the Microchip XEC family is 18 (from 0 to 17).
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config KSCAN_XEC_ROW_SIZE
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int "KSCAN_XEC_ROW_SIZE"
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default 8
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help
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Adjust the value to your keyboard rows. The maximum
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colum size for the Microchip XEC family is 8 (from 0 to 7).
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column size for the Microchip XEC family is 8 (from 0 to 7).
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config KSCAN_XEC_DEBOUNCE_DOWN
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int "KSCAN_XEC_DEBOUNCE_DOWN"
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@ -292,7 +292,7 @@ config MBEDTLS_HAVE_ASM
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default y if !ARM
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help
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Enable use of assembly code in mbedTLS. This improves the performances
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of asymetric cryptography, however this might have an impact on the
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of asymmetric cryptography, however this might have an impact on the
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code size.
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config MBEDTLS_ENTROPY_ENABLED
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@ -30,13 +30,13 @@ config ESPI_GPIO_DEV0
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string "Name of the GPIO port 0"
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default "GPIO_0"
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help
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Name of the port used in mimimal handshake
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Name of the port used in minimal handshake
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config ESPI_GPIO_DEV1
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string "Name of the GPIO port 1"
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default "GPIO_1"
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help
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Name of the port used in mimimal handshake
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Name of the port used in minimal handshake
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config ESPI_INIT_PIN
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int "eSPI master enable pin"
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@ -39,6 +39,6 @@ config STM32H7_BOOT_CM7_CM4GATED
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Cortex-M7 and Cortex-M4 running from the flash (each from a bank)
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Cortex-M7 boots , performs the System configuration then enable the
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Cortex-M4 boot using RCC.
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This mode requires option byte setting update (BCM4 uncheked)
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This mode requires option byte setting update (BCM4 unchecked)
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endchoice
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@ -364,7 +364,7 @@ config BT_KEYS_SAVE_AGING_COUNTER_ON_PAIRING
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help
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With this option enabled, aging counter will be stored in settings every
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time a successful pairing occurs. This increases flash wear out but offers
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a more correct finding of the oldest unused paiting info.
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a more correct finding of the oldest unused pairing info.
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endif # BT_SMP
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@ -142,7 +142,7 @@ config NET_SOCKETS_CAN_RECEIVERS
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Socket-CAN interface.
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config NET_SOCKETS_NET_MGMT
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bool "Enable network mangement socket support [EXPERIMENTAL]"
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bool "Enable network management socket support [EXPERIMENTAL]"
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depends on NET_MGMT_EVENT
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select NET_MGMT_EVENT_INFO
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help
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@ -83,7 +83,7 @@ config USB_DEVICE_DISABLE_ZLP_EPIN_HANDLING
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bool
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help
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Stack should not handle ZLP for Variable-length Data Stage
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bacause it is taken over by the hardware.
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because it is taken over by the hardware.
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config USB_DEVICE_BOS
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bool "Enable USB Binary Device Object Store (BOS)"
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