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drivers/gpio: stm32f1: Revert gpio register programming re-ordering

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In #29055, GPIO registers programming order was modified in order
to avoid late glitch generation when programming pins at device
driver init.
The issue had been seen on non F1 device, but it made sense
to be applied on F1 series as well.
After test, it appears that it doesn't and initial F1 code was fine.
New code is generating glitch on I2C bus.
Revert the change for F1 series.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2020-10-16 16:39:23 +02:00 • committed by Kumar Gala
commit 23f7eb0721
1 changed files with 8 additions and 8 deletions
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16
drivers/gpio/gpio_stm32.c
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@ -138,6 +138,14 @@ int gpio_stm32_configure(uint32_t *base_addr, int pin, int conf, int altf)
}
} else {
temp = conf & (STM32_CNF_OUT_1_MASK << STM32_CNF_OUT_1_SHIFT);
if (temp == STM32_CNF_GP_OUTPUT) {
LL_GPIO_SetPinMode(gpio, pin_ll, LL_GPIO_MODE_OUTPUT);
} else {
LL_GPIO_SetPinMode(gpio, pin_ll, LL_GPIO_MODE_ALTERNATE);
}
temp = conf & (STM32_CNF_OUT_0_MASK << STM32_CNF_OUT_0_SHIFT);
if (temp == STM32_CNF_PUSH_PULL) {
@ -155,14 +163,6 @@ int gpio_stm32_configure(uint32_t *base_addr, int pin, int conf, int altf)
} else {
LL_GPIO_SetPinSpeed(gpio, pin_ll, LL_GPIO_SPEED_FREQ_HIGH);
}
temp = conf & (STM32_CNF_OUT_1_MASK << STM32_CNF_OUT_1_SHIFT);
if (temp == STM32_CNF_GP_OUTPUT) {
LL_GPIO_SetPinMode(gpio, pin_ll, LL_GPIO_MODE_OUTPUT);
} else {
LL_GPIO_SetPinMode(gpio, pin_ll, LL_GPIO_MODE_ALTERNATE);
}
}
#else
unsigned int mode, otype, ospeed, pupd;