From 23cb7dd6600ae7851afaa188eff28d1d53e84364 Mon Sep 17 00:00:00 2001 From: Kiril Zyapkov Date: Thu, 11 Oct 2018 13:46:10 +0300 Subject: [PATCH] soc: st: add STM32L471xG This commit adds support for STM32L471xG. Since STM32L475 only adds USB, stm32l475.dtsi now includes stm32l471.dtsi Signed-off-by: Kiril Zyapkov --- dts/arm/st/l4/stm32l471.dtsi | 172 ++++++++++++++++++ dts/arm/st/l4/stm32l471Xg.dtsi | 21 +++ dts/arm/st/l4/stm32l475.dtsi | 163 +---------------- .../stm32l4/Kconfig.defconfig.stm32l471xx | 37 ++++ soc/arm/st_stm32/stm32l4/Kconfig.soc | 3 + 5 files changed, 234 insertions(+), 162 deletions(-) create mode 100644 dts/arm/st/l4/stm32l471.dtsi create mode 100644 dts/arm/st/l4/stm32l471Xg.dtsi create mode 100644 soc/arm/st_stm32/stm32l4/Kconfig.defconfig.stm32l471xx diff --git a/dts/arm/st/l4/stm32l471.dtsi b/dts/arm/st/l4/stm32l471.dtsi new file mode 100644 index 00000000000..7e09a793836 --- /dev/null +++ b/dts/arm/st/l4/stm32l471.dtsi @@ -0,0 +1,172 @@ +/* + * Copyright (c) 2017 Linaro Limited + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@48000000 { + + gpiod: gpio@48000c00 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48000c00 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000008>; + label = "GPIOD"; + }; + + gpioe: gpio@48001000 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48001000 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000010>; + label = "GPIOE"; + }; + + gpiof: gpio@48001400 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48001400 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000020>; + label = "GPIOF"; + }; + + gpiog: gpio@48001800 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48001800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000040>; + label = "GPIOG"; + }; + }; + + uart4: serial@40004c00 { + compatible = "st,stm32-uart"; + reg = <0x40004c00 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>; + interrupts = <52 0>; + status = "disabled"; + label = "UART_4"; + }; + + uart5: serial@40005000 { + compatible = "st,stm32-uart"; + reg = <0x40005000 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>; + interrupts = <53 0>; + status = "disabled"; + label = "UART_5"; + }; + + i2c2: i2c@40005800 { + compatible = "st,stm32-i2c-v2"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40005800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>; + interrupts = <33 0>, <34 0>; + interrupt-names = "event", "error"; + status = "disabled"; + label= "I2C_2"; + }; + + spi3: spi@40003c00 { + compatible = "st,stm32-spi-fifo"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40003c00 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>; + interrupts = <51 5>; + status = "disabled"; + label = "SPI_3"; + }; + + timers3: timers@40000400 { + compatible = "st,stm32-timers"; + reg = <0x40000400 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000002>; + status = "disabled"; + label = "TIMERS_3"; + + pwm { + compatible = "st,stm32-pwm"; + status = "disabled"; + st,prescaler = <10000>; + label = "PWM_3"; + #pwm-cells = <2>; + }; + }; + + timers4: timers@40000800 { + compatible = "st,stm32-timers"; + reg = <0x40000800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000004>; + status = "disabled"; + label = "TIMERS_4"; + + pwm { + compatible = "st,stm32-pwm"; + status = "disabled"; + st,prescaler = <10000>; + label = "PWM_4"; + #pwm-cells = <2>; + }; + }; + + timers5: timers@40000c00 { + compatible = "st,stm32-timers"; + reg = <0x40000c00 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000008>; + status = "disabled"; + label = "TIMERS_5"; + + pwm { + compatible = "st,stm32-pwm"; + status = "disabled"; + st,prescaler = <0>; + label = "PWM_5"; + #pwm-cells = <2>; + }; + }; + + timers8: timers@40013400 { + compatible = "st,stm32-timers"; + reg = <0x40013400 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00002000>; + status = "disabled"; + label = "TIMERS_8"; + + pwm { + compatible = "st,stm32-pwm"; + status = "disabled"; + st,prescaler = <10000>; + label = "PWM_8"; + #pwm-cells = <2>; + }; + }; + + timers17: timers@40014800 { + compatible = "st,stm32-timers"; + reg = <0x40014800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00040000>; + status = "disabled"; + label = "TIMERS_17"; + + pwm { + compatible = "st,stm32-pwm"; + status = "disabled"; + st,prescaler = <10000>; + label = "PWM_17"; + #pwm-cells = <2>; + }; + }; + }; +}; diff --git a/dts/arm/st/l4/stm32l471Xg.dtsi b/dts/arm/st/l4/stm32l471Xg.dtsi new file mode 100644 index 00000000000..d2c894eddb2 --- /dev/null +++ b/dts/arm/st/l4/stm32l471Xg.dtsi @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2018 Allterco Robotics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +/ { + sram0: memory@20000000 { + reg = <0x20000000 DT_SIZE_K(128)>; + }; + soc { + flash-controller@40022000 { + flash0: flash@8000000 { + reg = <0x08000000 DT_SIZE_K(1024)>; + }; + }; + }; +}; diff --git a/dts/arm/st/l4/stm32l475.dtsi b/dts/arm/st/l4/stm32l475.dtsi index fa7db495fec..3e14166573b 100644 --- a/dts/arm/st/l4/stm32l475.dtsi +++ b/dts/arm/st/l4/stm32l475.dtsi @@ -4,91 +4,10 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include +#include / { soc { - pinctrl: pin-controller@48000000 { - - gpiod: gpio@48000c00 { - compatible = "st,stm32-gpio"; - gpio-controller; - #gpio-cells = <2>; - reg = <0x48000c00 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000008>; - label = "GPIOD"; - }; - - gpioe: gpio@48001000 { - compatible = "st,stm32-gpio"; - gpio-controller; - #gpio-cells = <2>; - reg = <0x48001000 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000010>; - label = "GPIOE"; - }; - - gpiof: gpio@48001400 { - compatible = "st,stm32-gpio"; - gpio-controller; - #gpio-cells = <2>; - reg = <0x48001400 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000020>; - label = "GPIOF"; - }; - - gpiog: gpio@48001800 { - compatible = "st,stm32-gpio"; - gpio-controller; - #gpio-cells = <2>; - reg = <0x48001800 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000040>; - label = "GPIOG"; - }; - }; - - uart4: serial@40004c00 { - compatible = "st,stm32-uart"; - reg = <0x40004c00 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>; - interrupts = <52 0>; - status = "disabled"; - label = "UART_4"; - }; - - uart5: serial@40005000 { - compatible = "st,stm32-uart"; - reg = <0x40005000 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>; - interrupts = <53 0>; - status = "disabled"; - label = "UART_5"; - }; - - i2c2: i2c@40005800 { - compatible = "st,stm32-i2c-v2"; - clock-frequency = ; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x40005800 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>; - interrupts = <33 0>, <34 0>; - interrupt-names = "event", "error"; - status = "disabled"; - label= "I2C_2"; - }; - - spi3: spi@40003c00 { - compatible = "st,stm32-spi-fifo"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x40003c00 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>; - interrupts = <51 5>; - status = "disabled"; - label = "SPI_3"; - }; - otgfs_phy: otgfs_phy { compatible = "usb-nop-xceiv"; #phy-cells = <0>; @@ -107,85 +26,5 @@ status = "disabled"; label= "OTGFS"; }; - - timers3: timers@40000400 { - compatible = "st,stm32-timers"; - reg = <0x40000400 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000002>; - status = "disabled"; - label = "TIMERS_3"; - - pwm { - compatible = "st,stm32-pwm"; - status = "disabled"; - st,prescaler = <10000>; - label = "PWM_3"; - #pwm-cells = <2>; - }; - }; - - timers4: timers@40000800 { - compatible = "st,stm32-timers"; - reg = <0x40000800 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000004>; - status = "disabled"; - label = "TIMERS_4"; - - pwm { - compatible = "st,stm32-pwm"; - status = "disabled"; - st,prescaler = <10000>; - label = "PWM_4"; - #pwm-cells = <2>; - }; - }; - - timers5: timers@40000c00 { - compatible = "st,stm32-timers"; - reg = <0x40000c00 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000008>; - status = "disabled"; - label = "TIMERS_5"; - - pwm { - compatible = "st,stm32-pwm"; - status = "disabled"; - st,prescaler = <0>; - label = "PWM_5"; - #pwm-cells = <2>; - }; - }; - - timers8: timers@40013400 { - compatible = "st,stm32-timers"; - reg = <0x40013400 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00002000>; - status = "disabled"; - label = "TIMERS_8"; - - pwm { - compatible = "st,stm32-pwm"; - status = "disabled"; - st,prescaler = <10000>; - label = "PWM_8"; - #pwm-cells = <2>; - }; - }; - - timers17: timers@40014800 { - compatible = "st,stm32-timers"; - reg = <0x40014800 0x400>; - clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00040000>; - status = "disabled"; - label = "TIMERS_17"; - - pwm { - compatible = "st,stm32-pwm"; - status = "disabled"; - st,prescaler = <10000>; - label = "PWM_17"; - #pwm-cells = <2>; - }; - }; }; }; diff --git a/soc/arm/st_stm32/stm32l4/Kconfig.defconfig.stm32l471xx b/soc/arm/st_stm32/stm32l4/Kconfig.defconfig.stm32l471xx new file mode 100644 index 00000000000..364db8f9c56 --- /dev/null +++ b/soc/arm/st_stm32/stm32l4/Kconfig.defconfig.stm32l471xx @@ -0,0 +1,37 @@ +# Kconfig - ST Microelectronics STM32L476RG MCU +# +# Copyright (c) 2018 Allterco Robotics +# +# SPDX-License-Identifier: Apache-2.0 +# + +if SOC_STM32L471XX + +config SOC + string + default "stm32l471xx" + +config NUM_IRQS + int + default 82 + +if GPIO_STM32 + +config GPIO_STM32_PORTD + def_bool y + +config GPIO_STM32_PORTE + default y + +config GPIO_STM32_PORTF + default y + +config GPIO_STM32_PORTG + default y + +config GPIO_STM32_PORTH + default y + +endif # GPIO_STM32 + +endif # SOC_STM32L471XX diff --git a/soc/arm/st_stm32/stm32l4/Kconfig.soc b/soc/arm/st_stm32/stm32l4/Kconfig.soc index 5091347f5fa..abafe6b26a2 100644 --- a/soc/arm/st_stm32/stm32l4/Kconfig.soc +++ b/soc/arm/st_stm32/stm32l4/Kconfig.soc @@ -28,4 +28,7 @@ config SOC_STM32L475XG config SOC_STM32L4R5XI bool "STM32L4R5XI" +config SOC_STM32L471XX + bool "STM32L471XX" + endchoice