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intc: nxp_s32: use instance-based DT macros

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At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.

The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics.

Note that for some peripheral instances is needed to define the
HAL macros of the peripheral base address because there are gaps
in the instances or there are SoCs with a single instance.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This commit is contained in:
Manuel Argüelles 2023-11-04 08:54:51 +07:00 • committed by Anas Nashif
commit 237ec65ad3
3 changed files with 38 additions and 44 deletions
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5
soc/arm/nxp_s32/s32k/soc.h
View file

@ -18,4 +18,9 @@
#undef FALSE
#endif
/* Aliases for peripheral base addresses */
/* SIUL2 */
#define IP_SIUL2_0_BASE IP_SIUL2_BASE
#endif /* _NXP_S32_S32K_SOC_H_ */

7
soc/arm/nxp_s32/s32ze/soc.h
View file

@ -1,5 +1,5 @@
/*
* Copyright 2022 NXP
* Copyright 2022-2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -10,4 +10,9 @@
/* Do not let CMSIS to handle GIC */
#define __GIC_PRESENT 0
/* Aliases for peripheral base addresses */
/* SIUL2 */
#define IP_SIUL2_2_BASE 0U /* instance does not exist on this SoC */
#endif /* _NXP_S32_S32ZE_SOC_H_ */