diff --git a/samples/bluetooth/hci_uart/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay b/samples/bluetooth/hci_uart/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..362de531b25 --- /dev/null +++ b/samples/bluetooth/hci_uart/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,13 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&uart20 { + compatible = "nordic,nrf-uarte"; + current-speed = <1000000>; + status = "okay"; + hw-flow-control; +}; diff --git a/samples/bluetooth/hci_uart/boards/bl54l15_dvk_nrf54l15_cpuapp_df.overlay b/samples/bluetooth/hci_uart/boards/bl54l15_dvk_nrf54l15_cpuapp_df.overlay new file mode 100644 index 00000000000..4bdb11e70fd --- /dev/null +++ b/samples/bluetooth/hci_uart/boards/bl54l15_dvk_nrf54l15_cpuapp_df.overlay @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&uart20 { + compatible = "nordic,nrf-uarte"; + current-speed = <1000000>; + status = "okay"; + hw-flow-control; +}; + +&radio { + status = "okay"; + /* This is an example number of antennas that may be available + * on antenna matrix board. + */ + dfe-antenna-num = <10>; + /* This is an example switch pattern that will be used to set an + * antenna for Tx PDU (period before start of Tx CTE). + */ + dfe-pdu-antenna = <0x0>; + + /* These are example GPIO pin numbers that are provided to + * Radio peripheral. The pins will be acquired by Radio to + * drive antenna switching when AoD is enabled. + */ + dfegpio0-gpios = <&gpio1 4 0>; + dfegpio1-gpios = <&gpio1 5 0>; + dfegpio2-gpios = <&gpio1 6 0>; + dfegpio3-gpios = <&gpio1 7 0>; +}; diff --git a/samples/bluetooth/hci_uart/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay b/samples/bluetooth/hci_uart/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..362de531b25 --- /dev/null +++ b/samples/bluetooth/hci_uart/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,13 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&uart20 { + compatible = "nordic,nrf-uarte"; + current-speed = <1000000>; + status = "okay"; + hw-flow-control; +}; diff --git a/samples/bluetooth/hci_uart/boards/bl54l15u_dvk_nrf54l15_cpuapp_df.overlay b/samples/bluetooth/hci_uart/boards/bl54l15u_dvk_nrf54l15_cpuapp_df.overlay new file mode 100644 index 00000000000..4bdb11e70fd --- /dev/null +++ b/samples/bluetooth/hci_uart/boards/bl54l15u_dvk_nrf54l15_cpuapp_df.overlay @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&uart20 { + compatible = "nordic,nrf-uarte"; + current-speed = <1000000>; + status = "okay"; + hw-flow-control; +}; + +&radio { + status = "okay"; + /* This is an example number of antennas that may be available + * on antenna matrix board. + */ + dfe-antenna-num = <10>; + /* This is an example switch pattern that will be used to set an + * antenna for Tx PDU (period before start of Tx CTE). + */ + dfe-pdu-antenna = <0x0>; + + /* These are example GPIO pin numbers that are provided to + * Radio peripheral. The pins will be acquired by Radio to + * drive antenna switching when AoD is enabled. + */ + dfegpio0-gpios = <&gpio1 4 0>; + dfegpio1-gpios = <&gpio1 5 0>; + dfegpio2-gpios = <&gpio1 6 0>; + dfegpio3-gpios = <&gpio1 7 0>; +}; diff --git a/samples/drivers/adc/adc_dt/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay b/samples/drivers/adc/adc_dt/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..ea775bd1b1e --- /dev/null +++ b/samples/drivers/adc/adc_dt/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,56 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + */ + +/ { + zephyr,user { + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 7>; + }; +}; + +&adc { + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; /* P1.11 */ + zephyr,resolution = <10>; + }; + + channel@1 { + reg = <1>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; /* P1.06 */ + zephyr,resolution = <12>; + zephyr,oversampling = <8>; + }; + + channel@2 { + reg = <2>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; + zephyr,resolution = <12>; + zephyr,oversampling = <8>; + }; + + channel@7 { + reg = <7>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; /* P1.13 */ + zephyr,input-negative = ; /* P1.14 */ + zephyr,resolution = <12>; + }; +}; diff --git a/samples/drivers/adc/adc_dt/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay b/samples/drivers/adc/adc_dt/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..ea775bd1b1e --- /dev/null +++ b/samples/drivers/adc/adc_dt/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,56 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + */ + +/ { + zephyr,user { + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 7>; + }; +}; + +&adc { + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; /* P1.11 */ + zephyr,resolution = <10>; + }; + + channel@1 { + reg = <1>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; /* P1.06 */ + zephyr,resolution = <12>; + zephyr,oversampling = <8>; + }; + + channel@2 { + reg = <2>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; + zephyr,resolution = <12>; + zephyr,oversampling = <8>; + }; + + channel@7 { + reg = <7>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; /* P1.13 */ + zephyr,input-negative = ; /* P1.14 */ + zephyr,resolution = <12>; + }; +}; diff --git a/samples/drivers/adc/adc_sequence/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay b/samples/drivers/adc/adc_sequence/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..e798e92876a --- /dev/null +++ b/samples/drivers/adc/adc_sequence/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,62 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + */ + +/ { + zephyr,user { + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 7>; + }; +}; + +/ { + aliases { + adc0 = &adc; + }; +}; + +&adc { + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; /* P1.11 */ + zephyr,resolution = <10>; + }; + + channel@1 { + reg = <1>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; /* P1.06 */ + zephyr,resolution = <12>; + zephyr,oversampling = <8>; + }; + + channel@2 { + reg = <2>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; /* 0.9 V internal */ + zephyr,resolution = <12>; + zephyr,oversampling = <8>; + }; + + channel@7 { + reg = <7>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; /* P1.13 */ + zephyr,input-negative = ; /* P1.14 */ + zephyr,resolution = <12>; + }; +}; diff --git a/samples/drivers/adc/adc_sequence/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay b/samples/drivers/adc/adc_sequence/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..e798e92876a --- /dev/null +++ b/samples/drivers/adc/adc_sequence/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,62 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + */ + +/ { + zephyr,user { + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 7>; + }; +}; + +/ { + aliases { + adc0 = &adc; + }; +}; + +&adc { + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; /* P1.11 */ + zephyr,resolution = <10>; + }; + + channel@1 { + reg = <1>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; /* P1.06 */ + zephyr,resolution = <12>; + zephyr,oversampling = <8>; + }; + + channel@2 { + reg = <2>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; /* 0.9 V internal */ + zephyr,resolution = <12>; + zephyr,oversampling = <8>; + }; + + channel@7 { + reg = <7>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; /* P1.13 */ + zephyr,input-negative = ; /* P1.14 */ + zephyr,resolution = <12>; + }; +}; diff --git a/samples/drivers/audio/dmic/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay b/samples/drivers/audio/dmic/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..1e64758f5b5 --- /dev/null +++ b/samples/drivers/audio/dmic/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&pinctrl { + pdm20_default_alt: pdm20_default_alt { + group1 { + psels = , + ; + }; + }; +}; + +dmic_dev: &pdm20 { + status = "okay"; + pinctrl-0 = <&pdm20_default_alt>; + pinctrl-names = "default"; + clock-source = "PCLK32M"; +}; diff --git a/samples/drivers/audio/dmic/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay b/samples/drivers/audio/dmic/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..1e64758f5b5 --- /dev/null +++ b/samples/drivers/audio/dmic/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&pinctrl { + pdm20_default_alt: pdm20_default_alt { + group1 { + psels = , + ; + }; + }; +}; + +dmic_dev: &pdm20 { + status = "okay"; + pinctrl-0 = <&pdm20_default_alt>; + pinctrl-names = "default"; + clock-source = "PCLK32M"; +}; diff --git a/samples/drivers/i2c/rtio_loopback/boards/bl54l15_dvk_nrf54l15_cpuapp.conf b/samples/drivers/i2c/rtio_loopback/boards/bl54l15_dvk_nrf54l15_cpuapp.conf new file mode 100644 index 00000000000..16c07c2111f --- /dev/null +++ b/samples/drivers/i2c/rtio_loopback/boards/bl54l15_dvk_nrf54l15_cpuapp.conf @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# Copyright (c) 2025 Ezurio LLC +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_I2C_NRFX_TWIS_BUF_SIZE=256 diff --git a/samples/drivers/i2c/rtio_loopback/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay b/samples/drivers/i2c/rtio_loopback/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..b00332bd6b9 --- /dev/null +++ b/samples/drivers/i2c/rtio_loopback/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * SDA = P1.8 and P1.9 + * SCL = P1.10 and P1.11 + */ + +/ { + aliases { + i2c-controller = &i2c21; + i2c-controller-target = &i2c22; + }; +}; + +&pinctrl { + i2c21_default: i2c21_default { + group1 { + psels = , + ; + bias-pull-up; + }; + }; + + i2c21_sleep: i2c21_sleep { + group1 { + psels = , + ; + low-power-enable; + }; + }; + + i2c22_default: i2c22_default { + group1 { + psels = , + ; + bias-pull-up; + }; + }; + + i2c22_sleep: i2c22_sleep { + group1 { + psels = , + ; + low-power-enable; + }; + }; +}; + +&i2c21 { + pinctrl-0 = <&i2c21_default>; + pinctrl-1 = <&i2c21_sleep>; + pinctrl-names = "default", "sleep"; + zephyr,concat-buf-size = <256>; + status = "okay"; +}; + +&i2c22 { + compatible = "nordic,nrf-twis"; + pinctrl-0 = <&i2c22_default>; + pinctrl-1 = <&i2c22_sleep>; + pinctrl-names = "default", "sleep"; + status = "okay"; +}; diff --git a/samples/drivers/i2c/rtio_loopback/boards/bl54l15u_dvk_nrf54l15_cpuapp.conf b/samples/drivers/i2c/rtio_loopback/boards/bl54l15u_dvk_nrf54l15_cpuapp.conf new file mode 100644 index 00000000000..16c07c2111f --- /dev/null +++ b/samples/drivers/i2c/rtio_loopback/boards/bl54l15u_dvk_nrf54l15_cpuapp.conf @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# Copyright (c) 2025 Ezurio LLC +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_I2C_NRFX_TWIS_BUF_SIZE=256 diff --git a/samples/drivers/i2c/rtio_loopback/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay b/samples/drivers/i2c/rtio_loopback/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..b00332bd6b9 --- /dev/null +++ b/samples/drivers/i2c/rtio_loopback/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * SDA = P1.8 and P1.9 + * SCL = P1.10 and P1.11 + */ + +/ { + aliases { + i2c-controller = &i2c21; + i2c-controller-target = &i2c22; + }; +}; + +&pinctrl { + i2c21_default: i2c21_default { + group1 { + psels = , + ; + bias-pull-up; + }; + }; + + i2c21_sleep: i2c21_sleep { + group1 { + psels = , + ; + low-power-enable; + }; + }; + + i2c22_default: i2c22_default { + group1 { + psels = , + ; + bias-pull-up; + }; + }; + + i2c22_sleep: i2c22_sleep { + group1 { + psels = , + ; + low-power-enable; + }; + }; +}; + +&i2c21 { + pinctrl-0 = <&i2c21_default>; + pinctrl-1 = <&i2c21_sleep>; + pinctrl-names = "default", "sleep"; + zephyr,concat-buf-size = <256>; + status = "okay"; +}; + +&i2c22 { + compatible = "nordic,nrf-twis"; + pinctrl-0 = <&i2c22_default>; + pinctrl-1 = <&i2c22_sleep>; + pinctrl-names = "default", "sleep"; + status = "okay"; +}; diff --git a/samples/drivers/mbox/CMakeLists.txt b/samples/drivers/mbox/CMakeLists.txt index a33f7c0c472..2938f15423f 100644 --- a/samples/drivers/mbox/CMakeLists.txt +++ b/samples/drivers/mbox/CMakeLists.txt @@ -1,6 +1,7 @@ # # Copyright (c) 2021 Carlo Caione # Copyright 2023-2025 NXP +# Copyright 2025 Ezurio LLC # # SPDX-License-Identifier: Apache-2.0 # @@ -26,7 +27,9 @@ if(CONFIG_BOARD_NRF5340DK_NRF5340_CPUAPP OR CONFIG_BOARD_NRF54L09PDK_NRF54L09_CPUAPP OR CONFIG_BOARD_NRF54L15DK_NRF54L15_CPUAPP OR CONFIG_BOARD_NRF54L20PDK_NRF54L20_CPUAPP OR - CONFIG_BOARD_STM32H747I_DISCO_STM32H747XX_M7) + CONFIG_BOARD_STM32H747I_DISCO_STM32H747XX_M7 OR + CONFIG_BOARD_BL54L15_DVK_NRF54L15_CPUAPP OR + CONFIG_BOARD_BL54L15U_DVK_NRF54L15_CPUAPP) message(STATUS "${BOARD}${BOARD_QUALIFIERS} compile as Main in this sample") else() message(FATAL_ERROR "${BOARD}${BOARD_QUALIFIERS} is not supported for this sample") diff --git a/samples/drivers/mbox/Kconfig.sysbuild b/samples/drivers/mbox/Kconfig.sysbuild index 273912e8c0c..3390ded8379 100644 --- a/samples/drivers/mbox/Kconfig.sysbuild +++ b/samples/drivers/mbox/Kconfig.sysbuild @@ -1,5 +1,6 @@ # Copyright 2023 Nordic Semiconductor ASA # Copyright 2023-2025 NXP +# Copyright 2025 Ezurio LLC # # SPDX-License-Identifier: Apache-2.0 @@ -24,3 +25,5 @@ config REMOTE_BOARD default "stm32h747i_disco/stm32h747xx/m4" if $(BOARD) = "stm32h747i_disco" default "esp32_devkitc_wroom/esp32/appcpu" if "$(BOARD)${BOARD_QUALIFIERS}" = "esp32_devkitc_wroom/esp32/procpu" default "esp32s3_devkitm/esp32s3/appcpu" if "$(BOARD)${BOARD_QUALIFIERS}" = "esp32s3_devkitm/esp32s3/procpu" + default "bl54l15_dvk/nrf54l15/cpuflpr" if "$(BOARD)${BOARD_QUALIFIERS}" = "bl54l15_dvk/nrf54l15/cpuapp" + default "bl54l15u_dvk/nrf54l15/cpuflpr" if $(BOARD) = "bl54l15u_dvk" diff --git a/samples/drivers/mbox/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay b/samples/drivers/mbox/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..6d78003344c --- /dev/null +++ b/samples/drivers/mbox/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,21 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * Copyright 2025 Ezurio LLC + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + mbox-consumer { + compatible = "vnd,mbox-consumer"; + mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>; + mbox-names = "rx", "tx"; + }; +}; + +&cpuapp_vevif_rx { + status = "okay"; +}; + +&cpuapp_vevif_tx { + status = "okay"; +}; diff --git a/samples/drivers/mbox/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay b/samples/drivers/mbox/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..6d78003344c --- /dev/null +++ b/samples/drivers/mbox/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,21 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * Copyright 2025 Ezurio LLC + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + mbox-consumer { + compatible = "vnd,mbox-consumer"; + mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>; + mbox-names = "rx", "tx"; + }; +}; + +&cpuapp_vevif_rx { + status = "okay"; +}; + +&cpuapp_vevif_tx { + status = "okay"; +}; diff --git a/samples/drivers/mbox/remote/CMakeLists.txt b/samples/drivers/mbox/remote/CMakeLists.txt index d65bbb45234..0c7057c2088 100644 --- a/samples/drivers/mbox/remote/CMakeLists.txt +++ b/samples/drivers/mbox/remote/CMakeLists.txt @@ -1,6 +1,7 @@ # # Copyright (c) 2021 Carlo Caione # Copyright 2023-2025 NXP +# Copyright 2025 Ezurio LLC # # SPDX-License-Identifier: Apache-2.0 # @@ -25,7 +26,9 @@ if(CONFIG_BOARD_NRF5340DK_NRF5340_CPUNET OR CONFIG_BOARD_NRF54L09PDK_NRF54L09_CPUFLPR OR CONFIG_BOARD_NRF54L15DK_NRF54L15_CPUFLPR OR CONFIG_BOARD_NRF54L20PDK_NRF54L20_CPUFLPR OR - CONFIG_BOARD_STM32H747I_DISCO_STM32H747XX_M4) + CONFIG_BOARD_STM32H747I_DISCO_STM32H747XX_M4 OR + CONFIG_BOARD_BL54L15_DVK_NRF54L15_CPUFLPR OR + CONFIG_BOARD_BL54L15U_DVK_NRF54L15_CPUFLPR) message(STATUS "${BOARD}${BOARD_QUALIFIERS} compile as remote in this sample") else() message(FATAL_ERROR "${BOARD}${BOARD_QUALIFIERS} is not supported for this sample") diff --git a/samples/drivers/mbox/remote/boards/bl54l15_dvk_nrf54l15_cpuflpr.overlay b/samples/drivers/mbox/remote/boards/bl54l15_dvk_nrf54l15_cpuflpr.overlay new file mode 100644 index 00000000000..76030bd1825 --- /dev/null +++ b/samples/drivers/mbox/remote/boards/bl54l15_dvk_nrf54l15_cpuflpr.overlay @@ -0,0 +1,25 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * Copyright 2025 Ezurio LLC + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + mbox-consumer { + compatible = "vnd,mbox-consumer"; + mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>; + mbox-names = "rx", "tx"; + }; +}; + +&cpuflpr_vevif_rx { + status = "okay"; +}; + +&cpuflpr_vevif_tx { + status = "okay"; +}; + +&uart30 { + /delete-property/ hw-flow-control; +}; diff --git a/samples/drivers/mbox/remote/boards/bl54l15_dvk_nrf54l15_cpuflpr_xip.overlay b/samples/drivers/mbox/remote/boards/bl54l15_dvk_nrf54l15_cpuflpr_xip.overlay new file mode 100644 index 00000000000..76030bd1825 --- /dev/null +++ b/samples/drivers/mbox/remote/boards/bl54l15_dvk_nrf54l15_cpuflpr_xip.overlay @@ -0,0 +1,25 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * Copyright 2025 Ezurio LLC + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + mbox-consumer { + compatible = "vnd,mbox-consumer"; + mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>; + mbox-names = "rx", "tx"; + }; +}; + +&cpuflpr_vevif_rx { + status = "okay"; +}; + +&cpuflpr_vevif_tx { + status = "okay"; +}; + +&uart30 { + /delete-property/ hw-flow-control; +}; diff --git a/samples/drivers/mbox/remote/boards/bl54l15u_dvk_nrf54l15_cpuflpr.overlay b/samples/drivers/mbox/remote/boards/bl54l15u_dvk_nrf54l15_cpuflpr.overlay new file mode 100644 index 00000000000..76030bd1825 --- /dev/null +++ b/samples/drivers/mbox/remote/boards/bl54l15u_dvk_nrf54l15_cpuflpr.overlay @@ -0,0 +1,25 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * Copyright 2025 Ezurio LLC + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + mbox-consumer { + compatible = "vnd,mbox-consumer"; + mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>; + mbox-names = "rx", "tx"; + }; +}; + +&cpuflpr_vevif_rx { + status = "okay"; +}; + +&cpuflpr_vevif_tx { + status = "okay"; +}; + +&uart30 { + /delete-property/ hw-flow-control; +}; diff --git a/samples/drivers/mbox/remote/boards/bl54l15u_dvk_nrf54l15_cpuflpr_xip.overlay b/samples/drivers/mbox/remote/boards/bl54l15u_dvk_nrf54l15_cpuflpr_xip.overlay new file mode 100644 index 00000000000..76030bd1825 --- /dev/null +++ b/samples/drivers/mbox/remote/boards/bl54l15u_dvk_nrf54l15_cpuflpr_xip.overlay @@ -0,0 +1,25 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * Copyright 2025 Ezurio LLC + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + mbox-consumer { + compatible = "vnd,mbox-consumer"; + mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>; + mbox-names = "rx", "tx"; + }; +}; + +&cpuflpr_vevif_rx { + status = "okay"; +}; + +&cpuflpr_vevif_tx { + status = "okay"; +}; + +&uart30 { + /delete-property/ hw-flow-control; +}; diff --git a/samples/drivers/watchdog/boards/bl54l15_dvk_nrf54l10_cpuapp.overlay b/samples/drivers/watchdog/boards/bl54l15_dvk_nrf54l10_cpuapp.overlay new file mode 100644 index 00000000000..d1c11622866 --- /dev/null +++ b/samples/drivers/watchdog/boards/bl54l15_dvk_nrf54l10_cpuapp.overlay @@ -0,0 +1,9 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * Copyright 2025 Ezurio LLC + * SPDX-License-Identifier: Apache-2.0 + */ + +&wdt31 { + status = "okay"; +}; diff --git a/samples/drivers/watchdog/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay b/samples/drivers/watchdog/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..d1c11622866 --- /dev/null +++ b/samples/drivers/watchdog/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,9 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * Copyright 2025 Ezurio LLC + * SPDX-License-Identifier: Apache-2.0 + */ + +&wdt31 { + status = "okay"; +}; diff --git a/samples/drivers/watchdog/boards/bl54l15_dvk_nrf54l15_cpuflpr.overlay b/samples/drivers/watchdog/boards/bl54l15_dvk_nrf54l15_cpuflpr.overlay new file mode 100644 index 00000000000..d1c11622866 --- /dev/null +++ b/samples/drivers/watchdog/boards/bl54l15_dvk_nrf54l15_cpuflpr.overlay @@ -0,0 +1,9 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * Copyright 2025 Ezurio LLC + * SPDX-License-Identifier: Apache-2.0 + */ + +&wdt31 { + status = "okay"; +}; diff --git a/samples/drivers/watchdog/boards/bl54l15_dvk_nrf54l15_cpuflpr_xip.overlay b/samples/drivers/watchdog/boards/bl54l15_dvk_nrf54l15_cpuflpr_xip.overlay new file mode 100644 index 00000000000..d1c11622866 --- /dev/null +++ b/samples/drivers/watchdog/boards/bl54l15_dvk_nrf54l15_cpuflpr_xip.overlay @@ -0,0 +1,9 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * Copyright 2025 Ezurio LLC + * SPDX-License-Identifier: Apache-2.0 + */ + +&wdt31 { + status = "okay"; +}; diff --git a/samples/drivers/watchdog/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay b/samples/drivers/watchdog/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..d1c11622866 --- /dev/null +++ b/samples/drivers/watchdog/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,9 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * Copyright 2025 Ezurio LLC + * SPDX-License-Identifier: Apache-2.0 + */ + +&wdt31 { + status = "okay"; +}; diff --git a/samples/drivers/watchdog/boards/bl54l15u_dvk_nrf54l15_cpuflpr.overlay b/samples/drivers/watchdog/boards/bl54l15u_dvk_nrf54l15_cpuflpr.overlay new file mode 100644 index 00000000000..d1c11622866 --- /dev/null +++ b/samples/drivers/watchdog/boards/bl54l15u_dvk_nrf54l15_cpuflpr.overlay @@ -0,0 +1,9 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * Copyright 2025 Ezurio LLC + * SPDX-License-Identifier: Apache-2.0 + */ + +&wdt31 { + status = "okay"; +}; diff --git a/samples/drivers/watchdog/boards/bl54l15u_dvk_nrf54l15_cpuflpr_xip.overlay b/samples/drivers/watchdog/boards/bl54l15u_dvk_nrf54l15_cpuflpr_xip.overlay new file mode 100644 index 00000000000..d1c11622866 --- /dev/null +++ b/samples/drivers/watchdog/boards/bl54l15u_dvk_nrf54l15_cpuflpr_xip.overlay @@ -0,0 +1,9 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * Copyright 2025 Ezurio LLC + * SPDX-License-Identifier: Apache-2.0 + */ + +&wdt31 { + status = "okay"; +}; diff --git a/samples/drivers/watchdog/sample.yaml b/samples/drivers/watchdog/sample.yaml index 285727ae192..5360cd386a5 100644 --- a/samples/drivers/watchdog/sample.yaml +++ b/samples/drivers/watchdog/sample.yaml @@ -27,6 +27,9 @@ tests: - panb511evb/nrf54l15/cpuflpr/xip - nrf54l15dk/nrf54l15/cpuapp/ns - nrf54l15dk/nrf54l10/cpuapp/ns + - bl54l15_dvk/nrf54l10/cpuapp/ns + - bl54l15_dvk/nrf54l15/cpuapp/ns + - bl54l15u_dvk/nrf54l15/cpuapp/ns sample.drivers.watchdog.stm32_wwdg: extra_args: DTC_OVERLAY_FILE=boards/stm32_wwdg.overlay filter: dt_compat_enabled("st,stm32-window-watchdog") diff --git a/samples/sensor/qdec/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay b/samples/sensor/qdec/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..53ca74e6bfe --- /dev/null +++ b/samples/sensor/qdec/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,46 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * Copyright 2025 Ezurio LLC + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + aliases { + qdec0 = &qdec20; + qenca = &phase_a; + qencb = &phase_b; + }; + + encoder-emulate { + compatible = "gpio-leds"; + + phase_a: phase_a { + gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; + }; + + phase_b: phase_b { + gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&pinctrl { + qdec_pinctrl: qdec_pinctrl { + group1 { + psels = , + ; + }; + }; +}; + +&gpio1 { + status = "okay"; +}; + +&qdec20 { + status = "okay"; + pinctrl-0 = <&qdec_pinctrl>; + pinctrl-names = "default"; + steps = <120>; + led-pre = <500>; +}; diff --git a/samples/sensor/qdec/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay b/samples/sensor/qdec/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..53ca74e6bfe --- /dev/null +++ b/samples/sensor/qdec/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,46 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * Copyright 2025 Ezurio LLC + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + aliases { + qdec0 = &qdec20; + qenca = &phase_a; + qencb = &phase_b; + }; + + encoder-emulate { + compatible = "gpio-leds"; + + phase_a: phase_a { + gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; + }; + + phase_b: phase_b { + gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&pinctrl { + qdec_pinctrl: qdec_pinctrl { + group1 { + psels = , + ; + }; + }; +}; + +&gpio1 { + status = "okay"; +}; + +&qdec20 { + status = "okay"; + pinctrl-0 = <&qdec_pinctrl>; + pinctrl-names = "default"; + steps = <120>; + led-pre = <500>; +}; diff --git a/samples/subsys/fs/fs_sample/boards/bl54l15_dvk_nrf54l15_cpuapp.conf b/samples/subsys/fs/fs_sample/boards/bl54l15_dvk_nrf54l15_cpuapp.conf new file mode 100644 index 00000000000..56d24fc0618 --- /dev/null +++ b/samples/subsys/fs/fs_sample/boards/bl54l15_dvk_nrf54l15_cpuapp.conf @@ -0,0 +1,11 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# Copyright (c) 2025 Ezurio LLC +# +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_DISK_DRIVERS=y +CONFIG_DISK_DRIVER_FLASH=y +# There may be no files on internal SoC flash, so this Kconfig +# options has ben enabled to create some if listing does not +# find in the first place. +CONFIG_FS_SAMPLE_CREATE_SOME_ENTRIES=y diff --git a/samples/subsys/fs/fs_sample/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay b/samples/subsys/fs/fs_sample/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..2311a039702 --- /dev/null +++ b/samples/subsys/fs/fs_sample/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* Because FAT FS needs at least 64kiB partition and default + * storage_partition is 36kiB for this board, we need to reorganize + * partitions to get at least 64KiB. + */ +/delete-node/ &slot0_partition; +/delete-node/ &slot1_partition; +/delete-node/ &slot0_ns_partition; +/delete-node/ &slot1_ns_partition; +/delete-node/ &storage_partition; + +&cpuapp_rram { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + slot0_partition: parition@10000 { + reg = <0x00010000 DT_SIZE_K(300)>; + }; + + slot1_partition: partition@5b000 { + reg = <0x0005b000 DT_SIZE_K(300)>; + }; + + storage_partition: partition@a6000 { + label = "storage"; + reg = <0x000a6000 DT_SIZE_K(128)>; + }; + }; +}; + +/ { + msc_disk0 { + status="okay"; + compatible = "zephyr,flash-disk"; + partition = <&storage_partition>; + disk-name = "SD"; + cache-size = <512>; + }; +}; diff --git a/samples/subsys/fs/fs_sample/boards/bl54l15u_dvk_nrf54l15_cpuapp.conf b/samples/subsys/fs/fs_sample/boards/bl54l15u_dvk_nrf54l15_cpuapp.conf new file mode 100644 index 00000000000..56d24fc0618 --- /dev/null +++ b/samples/subsys/fs/fs_sample/boards/bl54l15u_dvk_nrf54l15_cpuapp.conf @@ -0,0 +1,11 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# Copyright (c) 2025 Ezurio LLC +# +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_DISK_DRIVERS=y +CONFIG_DISK_DRIVER_FLASH=y +# There may be no files on internal SoC flash, so this Kconfig +# options has ben enabled to create some if listing does not +# find in the first place. +CONFIG_FS_SAMPLE_CREATE_SOME_ENTRIES=y diff --git a/samples/subsys/fs/fs_sample/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay b/samples/subsys/fs/fs_sample/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..2311a039702 --- /dev/null +++ b/samples/subsys/fs/fs_sample/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* Because FAT FS needs at least 64kiB partition and default + * storage_partition is 36kiB for this board, we need to reorganize + * partitions to get at least 64KiB. + */ +/delete-node/ &slot0_partition; +/delete-node/ &slot1_partition; +/delete-node/ &slot0_ns_partition; +/delete-node/ &slot1_ns_partition; +/delete-node/ &storage_partition; + +&cpuapp_rram { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + slot0_partition: parition@10000 { + reg = <0x00010000 DT_SIZE_K(300)>; + }; + + slot1_partition: partition@5b000 { + reg = <0x0005b000 DT_SIZE_K(300)>; + }; + + storage_partition: partition@a6000 { + label = "storage"; + reg = <0x000a6000 DT_SIZE_K(128)>; + }; + }; +}; + +/ { + msc_disk0 { + status="okay"; + compatible = "zephyr,flash-disk"; + partition = <&storage_partition>; + disk-name = "SD"; + cache-size = <512>; + }; +}; diff --git a/samples/subsys/ipc/ipc_service/icmsg/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay b/samples/subsys/ipc/ipc_service/icmsg/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..089508044b5 --- /dev/null +++ b/samples/subsys/ipc/ipc_service/icmsg/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + soc { + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + sram_rx: memory@20018000 { + reg = <0x20018000 0x0800>; + }; + + sram_tx: memory@20020000 { + reg = <0x20020000 0x0800>; + }; + }; + }; + + ipc { + ipc0: ipc0 { + compatible = "zephyr,ipc-icmsg"; + dcache-alignment = <32>; + tx-region = <&sram_tx>; + rx-region = <&sram_rx>; + mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>; + mbox-names = "rx", "tx"; + status = "okay"; + }; + }; +}; + +&cpuapp_vevif_rx { + status = "okay"; +}; + +&cpuapp_vevif_tx { + status = "okay"; +}; diff --git a/samples/subsys/ipc/ipc_service/icmsg/boards/bl54l15_dvk_nrf54l15_cpuapp_icbmsg.overlay b/samples/subsys/ipc/ipc_service/icmsg/boards/bl54l15_dvk_nrf54l15_cpuapp_icbmsg.overlay new file mode 100644 index 00000000000..b1068f04069 --- /dev/null +++ b/samples/subsys/ipc/ipc_service/icmsg/boards/bl54l15_dvk_nrf54l15_cpuapp_icbmsg.overlay @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + soc { + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + sram_rx: memory@20018000 { + reg = <0x20018000 0x0800>; + }; + + sram_tx: memory@20020000 { + reg = <0x20020000 0x0800>; + }; + }; + }; + + ipc { + ipc0: ipc0 { + compatible = "zephyr,ipc-icbmsg"; + dcache-alignment = <32>; + tx-region = <&sram_tx>; + rx-region = <&sram_rx>; + tx-blocks = <16>; + rx-blocks = <18>; + mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>; + mbox-names = "rx", "tx"; + status = "okay"; + }; + }; +}; + +&cpuapp_vevif_rx { + status = "okay"; +}; + +&cpuapp_vevif_tx { + status = "okay"; +}; diff --git a/samples/subsys/ipc/ipc_service/icmsg/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay b/samples/subsys/ipc/ipc_service/icmsg/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay new file mode 100644 index 00000000000..089508044b5 --- /dev/null +++ b/samples/subsys/ipc/ipc_service/icmsg/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + soc { + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + sram_rx: memory@20018000 { + reg = <0x20018000 0x0800>; + }; + + sram_tx: memory@20020000 { + reg = <0x20020000 0x0800>; + }; + }; + }; + + ipc { + ipc0: ipc0 { + compatible = "zephyr,ipc-icmsg"; + dcache-alignment = <32>; + tx-region = <&sram_tx>; + rx-region = <&sram_rx>; + mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>; + mbox-names = "rx", "tx"; + status = "okay"; + }; + }; +}; + +&cpuapp_vevif_rx { + status = "okay"; +}; + +&cpuapp_vevif_tx { + status = "okay"; +}; diff --git a/samples/subsys/ipc/ipc_service/icmsg/boards/bl54l15u_dvk_nrf54l15_cpuapp_icbmsg.overlay b/samples/subsys/ipc/ipc_service/icmsg/boards/bl54l15u_dvk_nrf54l15_cpuapp_icbmsg.overlay new file mode 100644 index 00000000000..b1068f04069 --- /dev/null +++ b/samples/subsys/ipc/ipc_service/icmsg/boards/bl54l15u_dvk_nrf54l15_cpuapp_icbmsg.overlay @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + soc { + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + sram_rx: memory@20018000 { + reg = <0x20018000 0x0800>; + }; + + sram_tx: memory@20020000 { + reg = <0x20020000 0x0800>; + }; + }; + }; + + ipc { + ipc0: ipc0 { + compatible = "zephyr,ipc-icbmsg"; + dcache-alignment = <32>; + tx-region = <&sram_tx>; + rx-region = <&sram_rx>; + tx-blocks = <16>; + rx-blocks = <18>; + mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>; + mbox-names = "rx", "tx"; + status = "okay"; + }; + }; +}; + +&cpuapp_vevif_rx { + status = "okay"; +}; + +&cpuapp_vevif_tx { + status = "okay"; +}; diff --git a/samples/subsys/ipc/ipc_service/icmsg/remote/boards/bl54l15_dvk_nrf54l15_cpuflpr.overlay b/samples/subsys/ipc/ipc_service/icmsg/remote/boards/bl54l15_dvk_nrf54l15_cpuflpr.overlay new file mode 100644 index 00000000000..1638208917c --- /dev/null +++ b/samples/subsys/ipc/ipc_service/icmsg/remote/boards/bl54l15_dvk_nrf54l15_cpuflpr.overlay @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + soc { + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + sram_tx: memory@20018000 { + reg = <0x20018000 0x0800>; + }; + + sram_rx: memory@20020000 { + reg = <0x20020000 0x0800>; + }; + }; + }; + + ipc { + ipc0: ipc0 { + compatible = "zephyr,ipc-icmsg"; + dcache-alignment = <32>; + tx-region = <&sram_tx>; + rx-region = <&sram_rx>; + mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>; + mbox-names = "rx", "tx"; + status = "okay"; + }; + }; +}; + +&cpuflpr_vevif_rx { + status = "okay"; +}; + +&cpuflpr_vevif_tx { + status = "okay"; +}; + +&uart30 { + /delete-property/ hw-flow-control; +}; diff --git a/samples/subsys/ipc/ipc_service/icmsg/remote/boards/bl54l15_dvk_nrf54l15_cpuflpr_icbmsg.overlay b/samples/subsys/ipc/ipc_service/icmsg/remote/boards/bl54l15_dvk_nrf54l15_cpuflpr_icbmsg.overlay new file mode 100644 index 00000000000..af1fa7ba411 --- /dev/null +++ b/samples/subsys/ipc/ipc_service/icmsg/remote/boards/bl54l15_dvk_nrf54l15_cpuflpr_icbmsg.overlay @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + soc { + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + sram_tx: memory@20018000 { + reg = <0x20018000 0x0800>; + }; + + sram_rx: memory@20020000 { + reg = <0x20020000 0x0800>; + }; + }; + }; + + ipc { + ipc0: ipc0 { + compatible = "zephyr,ipc-icbmsg"; + dcache-alignment = <32>; + tx-region = <&sram_tx>; + rx-region = <&sram_rx>; + tx-blocks = <18>; + rx-blocks = <16>; + mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>; + mbox-names = "rx", "tx"; + status = "okay"; + }; + }; +}; + +&cpuflpr_vevif_rx { + status = "okay"; +}; + +&cpuflpr_vevif_tx { + status = "okay"; +}; + +&uart30 { + /delete-property/ hw-flow-control; +}; diff --git a/samples/subsys/ipc/ipc_service/icmsg/remote/boards/bl54l15u_dvk_nrf54l15_cpuflpr.overlay b/samples/subsys/ipc/ipc_service/icmsg/remote/boards/bl54l15u_dvk_nrf54l15_cpuflpr.overlay new file mode 100644 index 00000000000..1638208917c --- /dev/null +++ b/samples/subsys/ipc/ipc_service/icmsg/remote/boards/bl54l15u_dvk_nrf54l15_cpuflpr.overlay @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + soc { + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + sram_tx: memory@20018000 { + reg = <0x20018000 0x0800>; + }; + + sram_rx: memory@20020000 { + reg = <0x20020000 0x0800>; + }; + }; + }; + + ipc { + ipc0: ipc0 { + compatible = "zephyr,ipc-icmsg"; + dcache-alignment = <32>; + tx-region = <&sram_tx>; + rx-region = <&sram_rx>; + mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>; + mbox-names = "rx", "tx"; + status = "okay"; + }; + }; +}; + +&cpuflpr_vevif_rx { + status = "okay"; +}; + +&cpuflpr_vevif_tx { + status = "okay"; +}; + +&uart30 { + /delete-property/ hw-flow-control; +}; diff --git a/samples/subsys/ipc/ipc_service/icmsg/remote/boards/bl54l15u_dvk_nrf54l15_cpuflpr_icbmsg.overlay b/samples/subsys/ipc/ipc_service/icmsg/remote/boards/bl54l15u_dvk_nrf54l15_cpuflpr_icbmsg.overlay new file mode 100644 index 00000000000..af1fa7ba411 --- /dev/null +++ b/samples/subsys/ipc/ipc_service/icmsg/remote/boards/bl54l15u_dvk_nrf54l15_cpuflpr_icbmsg.overlay @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2025 Ezurio LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + soc { + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + + sram_tx: memory@20018000 { + reg = <0x20018000 0x0800>; + }; + + sram_rx: memory@20020000 { + reg = <0x20020000 0x0800>; + }; + }; + }; + + ipc { + ipc0: ipc0 { + compatible = "zephyr,ipc-icbmsg"; + dcache-alignment = <32>; + tx-region = <&sram_tx>; + rx-region = <&sram_rx>; + tx-blocks = <18>; + rx-blocks = <16>; + mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>; + mbox-names = "rx", "tx"; + status = "okay"; + }; + }; +}; + +&cpuflpr_vevif_rx { + status = "okay"; +}; + +&cpuflpr_vevif_tx { + status = "okay"; +}; + +&uart30 { + /delete-property/ hw-flow-control; +}; diff --git a/samples/sysbuild/hello_world/sample.yaml b/samples/sysbuild/hello_world/sample.yaml index 545f8a0b756..cbc58e2a336 100644 --- a/samples/sysbuild/hello_world/sample.yaml +++ b/samples/sysbuild/hello_world/sample.yaml @@ -73,3 +73,19 @@ tests: extra_args: - SB_CONF_FILE=sysbuild/nrf54h20dk_nrf54h20_cpuflpr_xip.conf - hello_world_SNIPPET=nordic-flpr-xip + sample.sysbuild.hello_world.bl54l15_dvk_nrf54l15_cpuflpr: + platform_allow: + - bl54l15_dvk/nrf54l15/cpuapp + integration_platforms: + - bl54l15_dvk/nrf54l15/cpuapp + extra_args: + - SB_CONF_FILE=sysbuild/bl54l15_dvk_nrf54l15_cpuflpr.conf + - hello_world_SNIPPET=nordic-flpr + sample.sysbuild.hello_world.bl54l15u_dvk_nrf54l15_cpuflpr: + platform_allow: + - bl54l15u_dvk/nrf54l15/cpuapp + integration_platforms: + - bl54l15u_dvk/nrf54l15/cpuapp + extra_args: + - SB_CONF_FILE=sysbuild/bl54l15u_dvk_nrf54l15_cpuflpr.conf + - hello_world_SNIPPET=nordic-flpr diff --git a/samples/sysbuild/hello_world/sysbuild/bl54l15_dvk_nrf54l15_cpuflpr.conf b/samples/sysbuild/hello_world/sysbuild/bl54l15_dvk_nrf54l15_cpuflpr.conf new file mode 100644 index 00000000000..e8014484067 --- /dev/null +++ b/samples/sysbuild/hello_world/sysbuild/bl54l15_dvk_nrf54l15_cpuflpr.conf @@ -0,0 +1,6 @@ +# Copyright (c) 2025 Nordic Semiconductor ASA +# Copyright (c) 2025 Ezurio LLC +# +# SPDX-License-Identifier: Apache-2.0 + +SB_CONFIG_REMOTE_BOARD="bl54l15_dvk/nrf54l15/cpuflpr" diff --git a/samples/sysbuild/hello_world/sysbuild/bl54l15u_dvk_nrf54l15_cpuflpr.conf b/samples/sysbuild/hello_world/sysbuild/bl54l15u_dvk_nrf54l15_cpuflpr.conf new file mode 100644 index 00000000000..927961f56e3 --- /dev/null +++ b/samples/sysbuild/hello_world/sysbuild/bl54l15u_dvk_nrf54l15_cpuflpr.conf @@ -0,0 +1,6 @@ +# Copyright (c) 2025 Nordic Semiconductor ASA +# Copyright (c) 2025 Ezurio LLC +# +# SPDX-License-Identifier: Apache-2.0 + +SB_CONFIG_REMOTE_BOARD="bl54l15u_dvk/nrf54l15/cpuflpr"