From 23197260a8d0693ad31e8508f031806554281fcc Mon Sep 17 00:00:00 2001
From: Hake Huang <hake.huang@oss.nxp.com>
Date: Mon, 15 Apr 2024 11:26:35 +0800
Subject: [PATCH] tests: driver: adc_api : update test overlay for hwv2

board overlay need align with board hwv2 naming

fixing: #71437

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
---
 .../lpcxpresso55s69_lpc55s69_cpu0_ns.overlay  | 60 +++++++++++++++++++
 .../boards/vmu_rt1170_mimxrt1176_cm7.overlay  | 34 +++++++++++
 2 files changed, 94 insertions(+)
 create mode 100644 tests/drivers/adc/adc_api/boards/lpcxpresso55s69_lpc55s69_cpu0_ns.overlay
 create mode 100644 tests/drivers/adc/adc_api/boards/vmu_rt1170_mimxrt1176_cm7.overlay

diff --git a/tests/drivers/adc/adc_api/boards/lpcxpresso55s69_lpc55s69_cpu0_ns.overlay b/tests/drivers/adc/adc_api/boards/lpcxpresso55s69_lpc55s69_cpu0_ns.overlay
new file mode 100644
index 00000000000..386e405b7bb
--- /dev/null
+++ b/tests/drivers/adc/adc_api/boards/lpcxpresso55s69_lpc55s69_cpu0_ns.overlay
@@ -0,0 +1,60 @@
+/*
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Copyright (c) 2023 Benjamin Björnsson <benjamin.bjornsson@gmail.com>
+ */
+
+#include <zephyr/dt-bindings/adc/mcux-lpadc.h>
+
+/ {
+	zephyr,user {
+		io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>;
+	};
+};
+
+&adc0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	/*
+	 * Channel 0 is used in single ended mode, with 12 bit resolution
+	 * CH0A is routed to P19 pin 4
+	 */
+	channel@0 {
+		reg = <0>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_EXTERNAL0";
+		zephyr,vref-mv = <3300>;
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <13>;
+		zephyr,input-positive = <MCUX_LPADC_CH0A>;
+	};
+
+	/*
+	 * Channel 1 is used in single ended mode, with 16 bit resolution
+	 * CH4A is routed to P17 pin 19
+	 */
+	channel@1 {
+		reg = <1>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_EXTERNAL0";
+		zephyr,vref-mv = <3300>;
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <16>;
+		zephyr,input-positive = <MCUX_LPADC_CH4A>;
+	};
+
+	/*
+	 * Channel 2 is used in single ended mode, with 12 bit resolution
+	 * CH4B is routed to P18 pin 1
+	 */
+	channel@2 {
+		reg = <2>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_EXTERNAL0";
+		zephyr,vref-mv = <3300>;
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <12>;
+		zephyr,input-positive = <MCUX_LPADC_CH4B>;
+	};
+};
diff --git a/tests/drivers/adc/adc_api/boards/vmu_rt1170_mimxrt1176_cm7.overlay b/tests/drivers/adc/adc_api/boards/vmu_rt1170_mimxrt1176_cm7.overlay
new file mode 100644
index 00000000000..2b310ca6f3f
--- /dev/null
+++ b/tests/drivers/adc/adc_api/boards/vmu_rt1170_mimxrt1176_cm7.overlay
@@ -0,0 +1,34 @@
+/*
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Copyright 2023 CogniPilot Foundation
+ */
+
+#include <zephyr/dt-bindings/adc/mcux-lpadc.h>
+
+/ {
+	zephyr,user {
+		io-channels = <&lpadc1 0>, <&lpadc1 1>;
+	};
+};
+
+&lpadc1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	channel@0 {
+		reg = <0>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_EXTERNAL0";
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <12>;
+	};
+
+	channel@1 {
+		reg = <1>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_EXTERNAL0";
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <12>;
+	};
+};