diff --git a/arch/xtensa/core/xt_zephyr.S b/arch/xtensa/core/xt_zephyr.S
index 228d443e1f8..316ed8e1dca 100644
--- a/arch/xtensa/core/xt_zephyr.S
+++ b/arch/xtensa/core/xt_zephyr.S
@@ -259,7 +259,7 @@ _zxt_timer_int:
 .L_xt_timer_int_catchup:
 #ifdef CONFIG_SYS_CLOCK_EXISTS
 
-#if CONFIG_XTENSA_INTERNAL_TIMER || (CONFIG_XTENSA_TIMER_IRQ < 0)
+#if USE_INTERNAL_TIMER || (EXTERNAL_TIMER_IRQ < 0)
 	/* Update the timer comparator for the next tick. */
 #ifdef XT_CLOCK_FREQ
 	movi a2, XT_TICK_DIVISOR  /* a2 = comparator increment          */
@@ -271,7 +271,7 @@ _zxt_timer_int:
 	add a4, a3, a2            /* a4 = new comparator value          */
 	wsr a4, XT_CCOMPARE       /* update comp. and clear interrupt   */
 	esync
-#endif /* CONFIG_XTENSA_INTERNAL_TIMER || (CONFIG_XTENSA_TIMER_IRQ < 0) */
+#endif /* USE_INTERNAL_TIMER || (EXTERNAL_TIMER_IRQ < 0) */
 
 
 #ifdef __XTENSA_CALL0_ABI__
@@ -292,13 +292,13 @@ _zxt_timer_int:
 	callx4   a7
 #endif
 
-#if CONFIG_XTENSA_INTERNAL_TIMER || (CONFIG_XTENSA_TIMER_IRQ < 0)
+#if USE_INTERNAL_TIMER || (EXTERNAL_TIMER_IRQ < 0)
 	/* Check if we need to process more ticks to catch up. */
 	esync          /* ensure comparator update complete  */
 	rsr a4, CCOUNT /* a4 = cycle count                   */
 	sub a4, a4, a3 /* diff = ccount - old comparator     */
 	blt a2, a4, .L_xt_timer_int_catchup  /* repeat while diff > divisor */
-#endif /* CONFIG_XTENSA_INTERNAL_TIMER || (CONFIG_XTENSA_TIMER_IRQ < 0) */
+#endif /* USE_INTERNAL_TIMER || (EXTERNAL_TIMER_IRQ < 0) */
 
 #endif
 
@@ -320,7 +320,7 @@ _zxt_tick_timer_init:
 
 	ENTRY(48)
 #ifdef CONFIG_SYS_CLOCK_EXISTS
-#if CONFIG_XTENSA_INTERNAL_TIMER || (CONFIG_XTENSA_TIMER_IRQ < 0)
+#if USE_INTERNAL_TIMER || (EXTERNAL_TIMER_IRQ < 0)
 
 	/* Set up the periodic tick timer (assume enough time to complete
 	 * init).
@@ -348,7 +348,7 @@ _zxt_tick_timer_init:
 #endif
 
 #endif
-#endif /* CONFIG_XTENSA_INTERNAL_TIMER || (CONFIG_XTENSA_TIMER_IRQ < 0) */
+#endif /* USE_INTERNAL_TIMER || (EXTERNAL_TIMER_IRQ < 0) */
 	RET(48)
 
 /*
diff --git a/arch/xtensa/include/xtensa_timer.h b/arch/xtensa/include/xtensa_timer.h
index c89ffcb0e73..4ad8f554b29 100644
--- a/arch/xtensa/include/xtensa_timer.h
+++ b/arch/xtensa/include/xtensa_timer.h
@@ -31,7 +31,10 @@
 
 #include    "xtensa_rtos.h"     /* in case this wasn't included directly */
 
-#if CONFIG_XTENSA_INTERNAL_TIMER || (CONFIG_XTENSA_TIMER_IRQ < 0)
+#define USE_INTERNAL_TIMER 1
+#define EXTERNAL_TIMER_IRQ -1
+
+#if USE_INTERNAL_TIMER || (EXTERNAL_TIMER_IRQ < 0)
 /*
  * Select timer to use for periodic tick, and determine its interrupt number
  * and priority. User may specify a timer by defining XT_TIMER_INDEX with -D,
@@ -79,14 +82,14 @@
 #error "The timer selected by XT_TIMER_INDEX does not exist in this core."
 #endif
 #else /* Case of an external timer which is not emulated by internal timer */
-#define XT_TIMER_INTNUM         CONFIG_XTENSA_TIMER_IRQ
-#endif /* CONFIG_XTENSA_INTERNAL_TIMER || (CONFIG_XTENSA_TIMER_IRQ < 0) */
+#define XT_TIMER_INTNUM         EXTERNAL_TIMER_IRQ
+#endif /* USE_INTERNAL_TIMER || (EXTERNAL_TIMER_IRQ < 0) */
 
-#if CONFIG_XTENSA_INTERNAL_TIMER
+#if USE_INTERNAL_TIMER
 #define XT_TIMER_INTPRI         XCHAL_INT_LEVEL(XT_TIMER_INTNUM)
 #else
-#define XT_TIMER_INTPRI         CONFIG_XTENSA_TIMER_IRQ_PRIORITY
-#endif /* CONFIG_XTENSA_INTERNAL_TIMER */
+#define XT_TIMER_INTPRI         EXTERNAL_TIMER_IRQ_PRIORITY
+#endif /* USE_INTERNAL_TIMER */
 
 #if XT_TIMER_INTPRI > XCHAL_EXCM_LEVEL
 #error "The timer interrupt cannot be high priority (use medium or low)."
@@ -141,7 +144,7 @@
 #define XT_TICK_DIVISOR     (XT_CLOCK_FREQ / XT_TICK_PER_SEC)
 #endif
 
-#if CONFIG_XTENSA_INTERNAL_TIMER || (CONFIG_XTENSA_TIMER_IRQ < 0)
+#if USE_INTERNAL_TIMER || (EXTERNAL_TIMER_IRQ < 0)
 #ifndef __ASSEMBLER__
 extern unsigned int _xt_tick_divisor;
 extern void _xt_tick_divisor_init(void);