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i2c: qmsi_shim: change some i2c config parameters to SoC specific

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Change the signal ramp up/down config parameters in i2c driver
module to SoC specific.

Jira: ZEP-753

Change-Id: Ie01f1d890a7133d30ea53eee07f60354734a8571
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
This commit is contained in:
Baohong Liu 2016-08-31 16:12:41 -07:00 • committed by Anas Nashif
commit 20d85fefe9
5 changed files with 26 additions and 14 deletions
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5
arch/arc/soc/quark_se_ss/Kconfig.defconfig
View file

@ -133,6 +133,11 @@ config I2C_1_IRQ_PRI
endif # I2C_1
config I2C_SDA_SETUP
default 2
config I2C_SS_SDA_HOLD
default 10
endif # I2C

10
arch/x86/soc/quark_d2000/Kconfig.defconfig
View file

@ -131,6 +131,16 @@ config I2C_0_IRQ_PRI
config I2C_0_DEFAULT_CFG
default 0x12
endif # I2C_QMSI
config I2C_SDA_SETUP
default 2
config I2C_SDA_TX_HOLD
default 16
config I2C_SDA_RX_HOLD
default 24
endif # I2C

9
arch/x86/soc/quark_se/Kconfig.defconfig
View file

@ -99,6 +99,15 @@ config I2C_1_DEFAULT_CFG
endif # I2C_1
config I2C_SDA_SETUP
default 2
config I2C_SDA_TX_HOLD
default 16
config I2C_SDA_RX_HOLD
default 24
endif # I2C

14
drivers/i2c/Kconfig
View file

@ -201,26 +201,16 @@ config I2C_1_IRQ_PRI
help
IRQ priority.
config I2C_SS_SDA_SETUP
int
depends on I2C_QMSI_SS
default 2
help
The delay time of clock rising edge relative to i2c data signal change.
The unit is i2c module base clock.
config I2C_SS_SDA_HOLD
int
depends on I2C_QMSI_SS
default 10
help
The hold time on the data signal after a negative edge of i2c clock.
The unit is i2c module base clock.
config I2C_SDA_SETUP
int
depends on I2C_QMSI
default 2
depends on I2C_QMSI || I2C_QMSI_SS
help
The delay time of clock rising edge relative to i2c data signal change.
The unit is i2c module base clock.
@ -228,7 +218,6 @@ config I2C_SDA_SETUP
config I2C_SDA_TX_HOLD
int
depends on I2C_QMSI
default 16
help
The hold time on the data signal after a negative edge of i2c clock
while i2c acts as transmitter.
@ -237,7 +226,6 @@ config I2C_SDA_TX_HOLD
config I2C_SDA_RX_HOLD
int
depends on I2C_QMSI
default 24
help
The hold time on the data signal after a negative edge of i2c clock
while i2c acts as receiver.

2
drivers/i2c/i2c_qmsi_ss.c
View file

@ -207,7 +207,7 @@ static int i2c_qmsi_ss_configure(struct device *dev, uint32_t config)
i2c_base = QM_SS_I2C_1_BASE;
}
__builtin_arc_sr(((CONFIG_I2C_SS_SDA_SETUP << 16) +
__builtin_arc_sr(((CONFIG_I2C_SDA_SETUP << 16) +
CONFIG_I2C_SS_SDA_HOLD),
(i2c_base + QM_SS_I2C_SDA_CONFIG));