samples: ipc: openamp: Enable openamp sample for iMX.RT1160 EVK

Enable the openamp sample for RT1160EVK. CM4 core has a custom DTS
overlay to use LPUART2 for console information, and use a secondary GPT
timer for the system tick.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2022-11-15 15:11:27 -06:00 committed by Carles Cufí
commit 1ff8fb927f
5 changed files with 76 additions and 0 deletions

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@ -11,3 +11,4 @@ string
default "mps2_an521_remote" if $(BOARD) = "mps2_an521"
default "v2m_musca_b1_ns" if $(BOARD) = "v2m_musca_b1"
default "mimxrt1170_evk_cm4" if $(BOARD) = "mimxrt1170_evk_cm7"
default "mimxrt1160_evk_cm4" if $(BOARD) = "mimxrt1160_evk_cm7"

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@ -0,0 +1,2 @@
CONFIG_INCLUDE_REMOTE_DIR=y
CONFIG_SECOND_CORE_MCUX=y

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@ -0,0 +1,22 @@
/*
* Copyright (c) 2022 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
chosen {
zephyr,ipc_shm = &ocram2_overlay;
};
/* OpenAMP fails with full 512K OCRAM2 memory region as shared memory.
* Define a subset of the OCRAM2 region for demo to use
* Note that shared memory must have specific MPU attributes set.
*/
ocram2_overlay: memory@202c0000{
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x202c0000 DT_SIZE_K(16)>;
zephyr,memory-region="OCRAM2_OVERLAY";
zephyr,memory-region-mpu = "IO";
};
};

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@ -0,0 +1,3 @@
CONFIG_BUILD_OUTPUT_INFO_HEADER=y
CONFIG_BUILD_OUTPUT_HEX=y
CONFIG_SECOND_CORE_MCUX=y

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@ -0,0 +1,48 @@
/*
* Copyright (c) 2022 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
/* Switch to lpuart2, since primary core uses lpuart1 */
chosen {
zephyr,console = &lpuart2;
zephyr,shell-uart = &lpuart2;
zephyr,ipc_shm = &ocram2_overlay;
};
soc {
/delete-node/ gpt@400f0000;
/* Replace GPT2 with another GPT kernel timer */
gpt2_hw_timer:gpt@400f0000 {
compatible = "nxp,gpt-hw-timer";
reg = <0x400f0000 0x4000>;
interrupts = <120 0>;
status = "okay";
};
};
/* OpenAMP fails with full 512K OCRAM2 memory region as shared memory.
* Define a subset of the OCRAM2 region for demo to use
* Note that shared memory must have specific MPU attributes set
*/
ocram2_overlay: memory@202c0000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x202c0000 DT_SIZE_K(16)>;
zephyr,memory-region="OCRAM2_OVERLAY";
zephyr,memory-region-mpu = "IO";
};
};
/* Enable secondary LPUART */
&lpuart2 {
status = "okay";
current-speed = <115200>;
};
/* Disable primary GPT timer */
&gpt_hw_timer {
status = "disabled";
};