diff --git a/drivers/gpio/gpio_cc13xx_cc26xx.c b/drivers/gpio/gpio_cc13xx_cc26xx.c index 57deac52ed3..477d0405d56 100644 --- a/drivers/gpio/gpio_cc13xx_cc26xx.c +++ b/drivers/gpio/gpio_cc13xx_cc26xx.c @@ -104,52 +104,6 @@ static int gpio_cc13xx_cc26xx_config(struct device *port, int access_op, return 0; } -static int gpio_cc13xx_cc26xx_write(struct device *port, int access_op, - u32_t pin, u32_t value) -{ - switch (access_op) { - case GPIO_ACCESS_BY_PIN: - __ASSERT_NO_MSG(pin < NUM_IO_MAX); - if (value) { - GPIO_setDio(pin); - } else { - GPIO_clearDio(pin); - } - break; - case GPIO_ACCESS_BY_PORT: - if (value) { - GPIO_setMultiDio(GPIO_DIO_ALL_MASK); - } else { - GPIO_clearMultiDio(GPIO_DIO_ALL_MASK); - } - break; - default: - return -EINVAL; - } - - return 0; -} - -static int gpio_cc13xx_cc26xx_read(struct device *port, int access_op, - u32_t pin, u32_t *value) -{ - __ASSERT_NO_MSG(value != NULL); - - switch (access_op) { - case GPIO_ACCESS_BY_PIN: - __ASSERT_NO_MSG(pin < NUM_IO_MAX); - *value = GPIO_readDio(pin); - break; - case GPIO_ACCESS_BY_PORT: - *value = GPIO_readMultiDio(GPIO_DIO_ALL_MASK); - break; - default: - return -EINVAL; - } - - return 0; -} - static int gpio_cc13xx_cc26xx_port_get_raw(struct device *port, u32_t *value) { __ASSERT_NO_MSG(value != NULL); @@ -311,8 +265,6 @@ static int gpio_cc13xx_cc26xx_init(struct device *dev) static const struct gpio_driver_api gpio_cc13xx_cc26xx_driver_api = { .config = gpio_cc13xx_cc26xx_config, - .write = gpio_cc13xx_cc26xx_write, - .read = gpio_cc13xx_cc26xx_read, .port_get_raw = gpio_cc13xx_cc26xx_port_get_raw, .port_set_masked_raw = gpio_cc13xx_cc26xx_port_set_masked_raw, .port_set_bits_raw = gpio_cc13xx_cc26xx_port_set_bits_raw, diff --git a/drivers/gpio/gpio_cc32xx.c b/drivers/gpio/gpio_cc32xx.c index e3d2321e823..e37c9cfa87c 100644 --- a/drivers/gpio/gpio_cc32xx.c +++ b/drivers/gpio/gpio_cc32xx.c @@ -107,50 +107,6 @@ static inline int gpio_cc32xx_config(struct device *port, return 0; } -static inline int gpio_cc32xx_write(struct device *port, - int access_op, u32_t pin, u32_t value) -{ - const struct gpio_cc32xx_config *gpio_config = DEV_CFG(port); - unsigned long port_base = gpio_config->port_base; - - __ASSERT(pin < 8, "Invalid pin number - only 8 pins per port"); - - if (access_op == GPIO_ACCESS_BY_PIN) { - value = value << pin; - /* Bitpack external GPIO pin number for GPIOPinWrite API: */ - pin = 1 << pin; - - MAP_GPIOPinWrite(port_base, (unsigned char)pin, - (unsigned char)value); - } else { - return -ENOTSUP; - } - - return 0; -} - -static inline int gpio_cc32xx_read(struct device *port, - int access_op, u32_t pin, u32_t *value) -{ - const struct gpio_cc32xx_config *gpio_config = DEV_CFG(port); - unsigned long port_base = gpio_config->port_base; - long status; - unsigned char pin_packed; - - __ASSERT(pin < 8, "Invalid pin number - only 8 pins per port"); - - if (access_op == GPIO_ACCESS_BY_PIN) { - /* Bitpack external GPIO pin number for GPIOPinRead API: */ - pin_packed = 1 << pin; - status = MAP_GPIOPinRead(port_base, pin_packed); - *value = status >> pin; - } else { - return -ENOTSUP; - } - - return 0; -} - static int gpio_cc32xx_port_get_raw(struct device *port, u32_t *value) { const struct gpio_cc32xx_config *gpio_config = DEV_CFG(port); @@ -307,8 +263,6 @@ static void gpio_cc32xx_port_isr(void *arg) static const struct gpio_driver_api api_funcs = { .config = gpio_cc32xx_config, - .write = gpio_cc32xx_write, - .read = gpio_cc32xx_read, .port_get_raw = gpio_cc32xx_port_get_raw, .port_set_masked_raw = gpio_cc32xx_port_set_masked_raw, .port_set_bits_raw = gpio_cc32xx_port_set_bits_raw, diff --git a/drivers/gpio/gpio_cmsdk_ahb.c b/drivers/gpio/gpio_cmsdk_ahb.c index c326fc47124..55cd1ac05e9 100644 --- a/drivers/gpio/gpio_cmsdk_ahb.c +++ b/drivers/gpio/gpio_cmsdk_ahb.c @@ -155,90 +155,6 @@ static int gpio_cmsdk_ahb_config(struct device *dev, int access_op, return ret; } -/** - * @brief Set the pin or port output - * - * @param dev Device struct - * @param access_op Access operation (pin or port) - * @param pin The pin number - * @param value Value to set (0 or 1) - * - * @return 0 if successful, failed otherwise - */ -static int gpio_cmsdk_ahb_write(struct device *dev, int access_op, - u32_t pin, u32_t value) -{ - const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info; - u32_t key; - - switch (access_op) { - case GPIO_ACCESS_BY_PIN: - if (value) { - /* - * The irq_lock() here is required to prevent concurrent - * callers to corrupt the pin states. - */ - key = irq_lock(); - /* set the pin */ - cfg->port->dataout |= BIT(pin); - irq_unlock(key); - } else { - /* - * The irq_lock() here is required to prevent concurrent - * callers to corrupt the pin states. - */ - key = irq_lock(); - /* clear the pin */ - cfg->port->dataout &= ~(BIT(pin)); - irq_unlock(key); - } - break; - case GPIO_ACCESS_BY_PORT: - if (value) { - /* set all pins */ - cfg->port->dataout = 0xFFFF; - } else { - /* clear all pins */ - cfg->port->dataout = 0x0; - } - break; - default: - return -ENOTSUP; - } - - return 0; -} - -/** - * @brief Read the pin or port status - * - * @param dev Device struct - * @param access_op Access operation (pin or port) - * @param pin The pin number - * @param value Value of input pin(s) - * - * @return 0 if successful, failed otherwise - */ -static int gpio_cmsdk_ahb_read(struct device *dev, int access_op, - u32_t pin, u32_t *value) -{ - const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info; - - *value = cfg->port->data; - - switch (access_op) { - case GPIO_ACCESS_BY_PIN: - *value = (*value >> pin) & 0x1; - break; - case GPIO_ACCESS_BY_PORT: - break; - default: - return -ENOTSUP; - } - - return 0; -} - static int gpio_cmsdk_ahb_pin_interrupt_configure(struct device *dev, unsigned int pin, enum gpio_int_mode mode, enum gpio_int_trig trig) @@ -326,8 +242,6 @@ static int gpio_cmsdk_ahb_disable_callback(struct device *dev, static const struct gpio_driver_api gpio_cmsdk_ahb_drv_api_funcs = { .config = gpio_cmsdk_ahb_config, - .write = gpio_cmsdk_ahb_write, - .read = gpio_cmsdk_ahb_read, .port_get_raw = gpio_cmsdk_ahb_port_get_raw, .port_set_masked_raw = gpio_cmsdk_ahb_port_set_masked_raw, .port_set_bits_raw = gpio_cmsdk_ahb_port_set_bits_raw, diff --git a/drivers/gpio/gpio_dw.c b/drivers/gpio/gpio_dw.c index b2607a5ed0c..68263d90602 100644 --- a/drivers/gpio/gpio_dw.c +++ b/drivers/gpio/gpio_dw.c @@ -350,39 +350,6 @@ static inline int gpio_dw_config(struct device *port, int access_op, return 0; } -static inline int gpio_dw_write(struct device *port, int access_op, - u32_t pin, u32_t value) -{ - struct gpio_dw_runtime *context = port->driver_data; - u32_t base_addr = dw_base_to_block_base(context->base_addr); - u32_t port_base_addr = context->base_addr; - u32_t data_port = dw_get_data_port(port_base_addr); - - if (GPIO_ACCESS_BY_PIN == access_op) { - dw_set_bit(base_addr, data_port, pin, value); - } else { - dw_write(base_addr, data_port, value); - } - - return 0; -} - -static inline int gpio_dw_read(struct device *port, int access_op, - u32_t pin, u32_t *value) -{ - struct gpio_dw_runtime *context = port->driver_data; - u32_t base_addr = dw_base_to_block_base(context->base_addr); - u32_t port_base_addr = context->base_addr; - u32_t ext_port = dw_get_ext_port(port_base_addr); - - *value = dw_read(base_addr, ext_port); - - if (GPIO_ACCESS_BY_PIN == access_op) { - *value = !!(*value & BIT(pin)); - } - return 0; -} - static int gpio_dw_port_get_raw(struct device *port, u32_t *value) { struct gpio_dw_runtime *context = port->driver_data; @@ -585,8 +552,6 @@ static void gpio_dw_isr(void *arg) static const struct gpio_driver_api api_funcs = { .config = gpio_dw_config, - .write = gpio_dw_write, - .read = gpio_dw_read, .port_get_raw = gpio_dw_port_get_raw, .port_set_masked_raw = gpio_dw_port_set_masked_raw, .port_set_bits_raw = gpio_dw_port_set_bits_raw, diff --git a/drivers/gpio/gpio_esp32.c b/drivers/gpio/gpio_esp32.c index bb341884543..06160589c18 100644 --- a/drivers/gpio/gpio_esp32.c +++ b/drivers/gpio/gpio_esp32.c @@ -117,42 +117,6 @@ static int gpio_esp32_config(struct device *dev, int access_op, return 0; } -static int gpio_esp32_write(struct device *dev, int access_op, - u32_t pin, u32_t value) -{ - struct gpio_esp32_data *data = dev->driver_data; - u32_t v; - - if (access_op != GPIO_ACCESS_BY_PIN) { - return -ENOTSUP; - } - - v = BIT(pin - data->port.pin_offset); - if (value) { - *data->port.set_reg = v; - } else { - *data->port.clear_reg = v; - } - - return 0; -} - -static int gpio_esp32_read(struct device *dev, int access_op, - u32_t pin, u32_t *value) -{ - struct gpio_esp32_data *data = dev->driver_data; - u32_t v; - - if (access_op != GPIO_ACCESS_BY_PIN) { - return -ENOTSUP; - } - - v = *data->port.input_reg; - *value = !!(v & BIT(pin - data->port.pin_offset)); - - return 0; -} - static int gpio_esp32_port_get_raw(struct device *port, u32_t *value) { struct gpio_esp32_data *data = port->driver_data; @@ -359,8 +323,6 @@ static int gpio_esp32_init(struct device *device) static const struct gpio_driver_api gpio_esp32_driver = { .config = gpio_esp32_config, - .write = gpio_esp32_write, - .read = gpio_esp32_read, .port_get_raw = gpio_esp32_port_get_raw, .port_set_masked_raw = gpio_esp32_port_set_masked_raw, .port_set_bits_raw = gpio_esp32_port_set_bits_raw, diff --git a/drivers/gpio/gpio_gecko.c b/drivers/gpio/gpio_gecko.c index c51621b0e51..18fb2365f80 100644 --- a/drivers/gpio/gpio_gecko.c +++ b/drivers/gpio/gpio_gecko.c @@ -145,51 +145,6 @@ static int gpio_gecko_configure(struct device *dev, return 0; } -static int gpio_gecko_write(struct device *dev, - int access_op, u32_t pin, u32_t value) -{ - const struct gpio_gecko_config *config = dev->config->config_info; - GPIO_P_TypeDef *gpio_base = config->gpio_base; - - if (access_op == GPIO_ACCESS_BY_PIN) { - if (value) { - /* Set the data output for the corresponding pin. - * Writing zeros to the other bits leaves the data - * output unchanged for the other pins. - */ - GPIO_PinOutSet(config->gpio_index, pin); - } else { - /* Clear the data output for the corresponding pin. - * Writing zeros to the other bits leaves the data - * output unchanged for the other pins. - */ - GPIO_PinOutClear(config->gpio_index, pin); - } - } else { /* GPIO_ACCESS_BY_PORT */ - /* Write the data output for all the pins */ - gpio_base->DOUT = value; - } - - return 0; -} - -static int gpio_gecko_read(struct device *dev, - int access_op, u32_t pin, u32_t *value) -{ - const struct gpio_gecko_config *config = dev->config->config_info; - GPIO_P_TypeDef *gpio_base = config->gpio_base; - - *value = gpio_base->DIN; - - if (access_op == GPIO_ACCESS_BY_PIN) { - *value = (*value & BIT(pin)) >> pin; - } - - /* nothing more to do for GPIO_ACCESS_BY_PORT */ - - return 0; -} - static int gpio_gecko_port_get_raw(struct device *dev, u32_t *value) { const struct gpio_gecko_config *config = dev->config->config_info; @@ -351,8 +306,6 @@ static void gpio_gecko_common_isr(void *arg) static const struct gpio_driver_api gpio_gecko_driver_api = { .config = gpio_gecko_configure, - .write = gpio_gecko_write, - .read = gpio_gecko_read, .port_get_raw = gpio_gecko_port_get_raw, .port_set_masked_raw = gpio_gecko_port_set_masked_raw, .port_set_bits_raw = gpio_gecko_port_set_bits_raw, diff --git a/drivers/gpio/gpio_ht16k33.c b/drivers/gpio/gpio_ht16k33.c index b69e7d42bb3..9b1d10ad0dc 100644 --- a/drivers/gpio/gpio_ht16k33.c +++ b/drivers/gpio/gpio_ht16k33.c @@ -53,30 +53,6 @@ static int gpio_ht16k33_cfg(struct device *dev, int access_op, return 0; } -static int gpio_ht16k33_write(struct device *dev, int access_op, - u32_t pin, u32_t value) -{ - ARG_UNUSED(dev); - ARG_UNUSED(access_op); - ARG_UNUSED(pin); - ARG_UNUSED(value); - - /* Keyscan is input-only */ - return -ENOTSUP; -} - -static int gpio_ht16k33_read(struct device *dev, int access_op, - u32_t pin, u32_t *value) -{ - ARG_UNUSED(dev); - ARG_UNUSED(access_op); - ARG_UNUSED(pin); - ARG_UNUSED(value); - - /* Keyscan only supports interrupt mode */ - return -ENOTSUP; -} - static int gpio_ht16k33_port_get_raw(struct device *port, gpio_port_value_t *value) { @@ -206,8 +182,6 @@ static int gpio_ht16k33_init(struct device *dev) static const struct gpio_driver_api gpio_ht16k33_api = { .config = gpio_ht16k33_cfg, - .write = gpio_ht16k33_write, - .read = gpio_ht16k33_read, .port_get_raw = gpio_ht16k33_port_get_raw, .port_set_masked_raw = gpio_ht16k33_port_set_masked_raw, .port_set_bits_raw = gpio_ht16k33_port_set_bits_raw, diff --git a/drivers/gpio/gpio_imx.c b/drivers/gpio/gpio_imx.c index 2d7b5029178..2b565b40c84 100644 --- a/drivers/gpio/gpio_imx.c +++ b/drivers/gpio/gpio_imx.c @@ -70,35 +70,6 @@ static int imx_gpio_configure(struct device *port, int access_op, u32_t pin, return 0; } -static int imx_gpio_write(struct device *port, - int access_op, u32_t pin, u32_t value) -{ - const struct imx_gpio_config *config = port->config->config_info; - - if (access_op == GPIO_ACCESS_BY_PIN) { - GPIO_WritePinOutput(config->base, pin, - (gpio_pin_action_t)value); - } else { /* GPIO_ACCESS_BY_PORT */ - GPIO_WritePortOutput(config->base, value); - } - - return 0; -} - -static int imx_gpio_read(struct device *port, - int access_op, u32_t pin, u32_t *value) -{ - const struct imx_gpio_config *config = port->config->config_info; - - if (access_op == GPIO_ACCESS_BY_PIN) { - *value = GPIO_ReadPinInput(config->base, pin); - } else { /* GPIO_ACCESS_BY_PORT */ - *value = GPIO_ReadPortInput(config->base); - } - - return 0; -} - static int imx_gpio_port_get_raw(struct device *port, u32_t *value) { const struct imx_gpio_config *config = port->config->config_info; @@ -257,8 +228,6 @@ static void imx_gpio_port_isr(void *arg) static const struct gpio_driver_api imx_gpio_driver_api = { .config = imx_gpio_configure, - .write = imx_gpio_write, - .read = imx_gpio_read, .port_get_raw = imx_gpio_port_get_raw, .port_set_masked_raw = imx_gpio_port_set_masked_raw, .port_set_bits_raw = imx_gpio_port_set_bits_raw, diff --git a/drivers/gpio/gpio_intel_apl.c b/drivers/gpio/gpio_intel_apl.c index 14c97a5808d..9c912ede118 100644 --- a/drivers/gpio/gpio_intel_apl.c +++ b/drivers/gpio/gpio_intel_apl.c @@ -363,66 +363,6 @@ static int gpio_intel_apl_pin_interrupt_configure(struct device *dev, return 0; } -static int gpio_intel_apl_write(struct device *dev, int access_op, - u32_t pin, u32_t value) -{ - const struct gpio_intel_apl_config *cfg = dev->config->config_info; - struct gpio_intel_apl_data *data = dev->driver_data; - u32_t raw_pin, reg, val; - - if (access_op != GPIO_ACCESS_BY_PIN) { - return -ENOTSUP; - } - - pin = k_array_index_sanitize(pin, cfg->num_pins + 1); - - raw_pin = cfg->pin_offset + pin; - - if (!check_perm(dev, raw_pin)) { - return -EINVAL; - } - - reg = cfg->reg_base + data->pad_base + (raw_pin * 8U); - val = sys_read32(reg); - - if (value) { - val |= PAD_CFG0_TXSTATE; - } else { - val &= ~PAD_CFG0_TXSTATE; - } - - sys_write32(val, reg); - - return 0; -} - -static int gpio_intel_apl_read(struct device *dev, int access_op, - u32_t pin, u32_t *value) -{ - const struct gpio_intel_apl_config *cfg = dev->config->config_info; - struct gpio_intel_apl_data *data = dev->driver_data; - u32_t raw_pin, reg, val; - - if (access_op != GPIO_ACCESS_BY_PIN) { - return -ENOTSUP; - } - - pin = k_array_index_sanitize(pin, cfg->num_pins + 1); - - raw_pin = cfg->pin_offset + pin; - - if (!check_perm(dev, raw_pin)) { - return -EINVAL; - } - - reg = cfg->reg_base + data->pad_base + (raw_pin * 8U); - val = sys_read32(reg); - - *value = (val & PAD_CFG0_RXSTATE) >> PAD_CFG0_RXSTATE_POS; - - return 0; -} - static int gpio_intel_apl_manage_callback(struct device *dev, struct gpio_callback *callback, bool set) @@ -598,8 +538,6 @@ static int gpio_intel_apl_port_get_raw(struct device *dev, u32_t *value) static const struct gpio_driver_api gpio_intel_apl_api = { .config = gpio_intel_apl_config, - .write = gpio_intel_apl_write, - .read = gpio_intel_apl_read, .manage_callback = gpio_intel_apl_manage_callback, .enable_callback = gpio_intel_apl_enable_callback, .disable_callback = gpio_intel_apl_disable_callback, diff --git a/drivers/gpio/gpio_litex.c b/drivers/gpio/gpio_litex.c index 113647f74fb..9f4c7fa56df 100644 --- a/drivers/gpio/gpio_litex.c +++ b/drivers/gpio/gpio_litex.c @@ -24,8 +24,6 @@ LOG_MODULE_REGISTER(gpio_litex); static const char *LITEX_LOG_REG_SIZE_NGPIOS_MISMATCH = "Cannot handle all of the gpios with the register of given size\n"; -static const char *LITEX_LOG_WRONG_DIR = - "Direction chosen in device tree do not match with the operation\n"; static const char *LITEX_LOG_CANNOT_CHANGE_DIR = "Cannot change port direction selected in device tree\n"; @@ -133,39 +131,6 @@ static int gpio_litex_configure(struct device *dev, int access_op, return 0; } -static int gpio_litex_write(struct device *dev, int access_op, - u32_t pin, u32_t value) -{ - const struct gpio_litex_cfg *gpio_config = DEV_GPIO_CFG(dev); - - if (!gpio_config->port_is_output) { - LOG_ERR("%s", LITEX_LOG_WRONG_DIR); - return -EINVAL; - } - - if (access_op != GPIO_ACCESS_BY_PIN) { - return -ENOTSUP; - } - - set_bit(gpio_config, pin, value); - - return 0; -} - -static int gpio_litex_read(struct device *dev, int access_op, - u32_t pin, u32_t *value) -{ - const struct gpio_litex_cfg *gpio_config = DEV_GPIO_CFG(dev); - - if (access_op != GPIO_ACCESS_BY_PIN) { - return -ENOTSUP; - } - - *value = get_bit(gpio_config, pin); - - return 0; -} - static int gpio_litex_port_get_raw(struct device *dev, gpio_port_value_t *value) { const struct gpio_litex_cfg *gpio_config = DEV_GPIO_CFG(dev); @@ -242,8 +207,6 @@ static int gpio_litex_pin_interrupt_configure(struct device *dev, static const struct gpio_driver_api gpio_litex_driver_api = { .config = gpio_litex_configure, - .write = gpio_litex_write, - .read = gpio_litex_read, .port_get_raw = gpio_litex_port_get_raw, .port_set_masked_raw = gpio_litex_port_set_masked_raw, .port_set_bits_raw = gpio_litex_port_set_bits_raw, diff --git a/drivers/gpio/gpio_lmp90xxx.c b/drivers/gpio/gpio_lmp90xxx.c index 0f9d38b3010..f3e2f394c8e 100644 --- a/drivers/gpio/gpio_lmp90xxx.c +++ b/drivers/gpio/gpio_lmp90xxx.c @@ -84,46 +84,6 @@ static int gpio_lmp90xxx_config(struct device *dev, int access_op, return err; } -static int gpio_lmp90xxx_write(struct device *dev, int access_op, - u32_t pin, u32_t value) -{ - struct gpio_lmp90xxx_data *data = dev->driver_data; - - if (access_op != GPIO_ACCESS_BY_PIN) { - return -ENOTSUP; - } - - if (pin > LMP90XXX_GPIO_MAX) { - return -EINVAL; - } - - return lmp90xxx_gpio_set_pin_value(data->parent, pin, - value ? true : false); -} - -static int gpio_lmp90xxx_read(struct device *dev, int access_op, - u32_t pin, u32_t *value) -{ - struct gpio_lmp90xxx_data *data = dev->driver_data; - bool set; - int err; - - if (access_op != GPIO_ACCESS_BY_PIN) { - return -ENOTSUP; - } - - if (pin > LMP90XXX_GPIO_MAX) { - return -EINVAL; - } - - err = lmp90xxx_gpio_get_pin_value(data->parent, pin, &set); - if (!err) { - *value = set ? 1 : 0; - } - - return err; -} - static int gpio_lmp90xxx_port_get_raw(struct device *dev, gpio_port_value_t *value) { @@ -195,8 +155,6 @@ static int gpio_lmp90xxx_init(struct device *dev) static const struct gpio_driver_api gpio_lmp90xxx_api = { .config = gpio_lmp90xxx_config, - .write = gpio_lmp90xxx_write, - .read = gpio_lmp90xxx_read, .port_set_masked_raw = gpio_lmp90xxx_port_set_masked_raw, .port_set_bits_raw = gpio_lmp90xxx_port_set_bits_raw, .port_clear_bits_raw = gpio_lmp90xxx_port_clear_bits_raw, diff --git a/drivers/gpio/gpio_mchp_xec.c b/drivers/gpio/gpio_mchp_xec.c index 793e4ebde72..817df321fd5 100644 --- a/drivers/gpio/gpio_mchp_xec.c +++ b/drivers/gpio/gpio_mchp_xec.c @@ -209,36 +209,6 @@ static int gpio_xec_pin_interrupt_configure(struct device *dev, return 0; } -static int gpio_xec_write(struct device *dev, - int access_op, u32_t pin, u32_t value) -{ - const struct gpio_xec_config *config = dev->config->config_info; - - /* GPIO output registers are used for writing */ - __IO u32_t *gpio_base = GPIO_OUT_BASE(config); - - if (access_op == GPIO_ACCESS_BY_PIN) { - if (value) { - /* Set the data output for the corresponding pin. - * Writing zeros to the other bits leaves the data - * output unchanged for the other pins - */ - *gpio_base |= BIT(pin); - } else { - /* Clear the data output for the corresponding pin. - * Writing zeros to the other bits leaves the data - * output unchanged for the other pins - */ - *gpio_base &= ~BIT(pin); - } - } else { /* GPIO_ACCESS_BY_PORT not supported */ - return -EINVAL; - } - - return 0; - -} - static int gpio_xec_port_set_masked_raw(struct device *dev, u32_t mask, u32_t value) { @@ -300,18 +270,6 @@ static int gpio_xec_port_get_raw(struct device *dev, u32_t *value) return 0; } -static int gpio_xec_read(struct device *dev, - int access_op, u32_t pin, u32_t *value) -{ - gpio_xec_port_get_raw(dev, value); - - if (access_op == GPIO_ACCESS_BY_PIN) { - *value = (*value & BIT(pin)) >> pin; - } - - return 0; -} - static int gpio_xec_manage_callback(struct device *dev, struct gpio_callback *callback, bool set) { @@ -364,8 +322,6 @@ static void gpio_gpio_xec_port_isr(void *arg) static const struct gpio_driver_api gpio_xec_driver_api = { .config = gpio_xec_configure, - .write = gpio_xec_write, - .read = gpio_xec_read, .port_get_raw = gpio_xec_port_get_raw, .port_set_masked_raw = gpio_xec_port_set_masked_raw, .port_set_bits_raw = gpio_xec_port_set_bits_raw, diff --git a/drivers/gpio/gpio_mcux.c b/drivers/gpio/gpio_mcux.c index 3282a7d1283..807b716b374 100644 --- a/drivers/gpio/gpio_mcux.c +++ b/drivers/gpio/gpio_mcux.c @@ -116,51 +116,6 @@ static int gpio_mcux_configure(struct device *dev, return 0; } -static int gpio_mcux_write(struct device *dev, - int access_op, u32_t pin, u32_t value) -{ - const struct gpio_mcux_config *config = dev->config->config_info; - GPIO_Type *gpio_base = config->gpio_base; - - if (access_op == GPIO_ACCESS_BY_PIN) { - if (value) { - /* Set the data output for the corresponding pin. - * Writing zeros to the other bits leaves the data - * output unchanged for the other pins. - */ - gpio_base->PSOR = BIT(pin); - } else { - /* Clear the data output for the corresponding pin. - * Writing zeros to the other bits leaves the data - * output unchanged for the other pins. - */ - gpio_base->PCOR = BIT(pin); - } - } else { /* GPIO_ACCESS_BY_PORT */ - /* Write the data output for all the pins */ - gpio_base->PDOR = value; - } - - return 0; -} - -static int gpio_mcux_read(struct device *dev, - int access_op, u32_t pin, u32_t *value) -{ - const struct gpio_mcux_config *config = dev->config->config_info; - GPIO_Type *gpio_base = config->gpio_base; - - *value = gpio_base->PDIR; - - if (access_op == GPIO_ACCESS_BY_PIN) { - *value = (*value & BIT(pin)) >> pin; - } - - /* nothing more to do for GPIO_ACCESS_BY_PORT */ - - return 0; -} - static int gpio_mcux_port_get_raw(struct device *dev, u32_t *value) { const struct gpio_mcux_config *config = dev->config->config_info; @@ -327,8 +282,6 @@ static void gpio_mcux_port_isr(void *arg) static const struct gpio_driver_api gpio_mcux_driver_api = { .config = gpio_mcux_configure, - .write = gpio_mcux_write, - .read = gpio_mcux_read, .port_get_raw = gpio_mcux_port_get_raw, .port_set_masked_raw = gpio_mcux_port_set_masked_raw, .port_set_bits_raw = gpio_mcux_port_set_bits_raw, diff --git a/drivers/gpio/gpio_mcux_igpio.c b/drivers/gpio/gpio_mcux_igpio.c index b508e0614f6..666d764cd1e 100644 --- a/drivers/gpio/gpio_mcux_igpio.c +++ b/drivers/gpio/gpio_mcux_igpio.c @@ -63,34 +63,6 @@ static int mcux_igpio_configure(struct device *dev, return 0; } -static int mcux_igpio_write(struct device *dev, - int access_op, u32_t pin, u32_t value) -{ - const struct mcux_igpio_config *config = dev->config->config_info; - - if (access_op == GPIO_ACCESS_BY_PIN) { - GPIO_PinWrite(config->base, pin, value); - } else { /* GPIO_ACCESS_BY_PORT */ - config->base->DR = value; - } - - return 0; -} - -static int mcux_igpio_read(struct device *dev, - int access_op, u32_t pin, u32_t *value) -{ - const struct mcux_igpio_config *config = dev->config->config_info; - - if (access_op == GPIO_ACCESS_BY_PIN) { - *value = GPIO_PinRead(config->base, pin); - } else { /* GPIO_ACCESS_BY_PORT */ - *value = config->base->DR; - } - - return 0; -} - static int mcux_igpio_port_get_raw(struct device *dev, u32_t *value) { const struct mcux_igpio_config *config = dev->config->config_info; @@ -233,8 +205,6 @@ static void mcux_igpio_port_isr(void *arg) static const struct gpio_driver_api mcux_igpio_driver_api = { .config = mcux_igpio_configure, - .write = mcux_igpio_write, - .read = mcux_igpio_read, .port_get_raw = mcux_igpio_port_get_raw, .port_set_masked_raw = mcux_igpio_port_set_masked_raw, .port_set_bits_raw = mcux_igpio_port_set_bits_raw, diff --git a/drivers/gpio/gpio_mcux_lpc.c b/drivers/gpio/gpio_mcux_lpc.c index 8a75571dc29..836ae200fed 100644 --- a/drivers/gpio/gpio_mcux_lpc.c +++ b/drivers/gpio/gpio_mcux_lpc.c @@ -102,45 +102,6 @@ static int gpio_mcux_lpc_configure(struct device *dev, int access_op, u32_t pin, return 0; } -static int gpio_mcux_lpc_write(struct device *dev, int access_op, u32_t pin, - u32_t value) -{ - const struct gpio_mcux_lpc_config *config = dev->config->config_info; - GPIO_Type *gpio_base = config->gpio_base; - u32_t port = config->port_no; - - /* Check for an invalid pin number */ - if (pin >= ARRAY_SIZE(gpio_base->B[port])) { - return -EINVAL; - } - - if (access_op == GPIO_ACCESS_BY_PIN) { - /* Set/Clear the data output for the respective pin */ - gpio_base->B[port][pin] = value; - } else { /* return an error for all other options */ - return -EINVAL; - } - - return 0; -} - -static int gpio_mcux_lpc_read(struct device *dev, int access_op, u32_t pin, - u32_t *value) -{ - const struct gpio_mcux_lpc_config *config = dev->config->config_info; - GPIO_Type *gpio_base = config->gpio_base; - - *value = gpio_base->PIN[config->port_no]; - - if (access_op == GPIO_ACCESS_BY_PIN) { - *value = (*value & BIT(pin)) >> pin; - } else { /* return an error for all other options */ - return -EINVAL; - } - - return 0; -} - static int gpio_mcux_lpc_port_get_raw(struct device *dev, u32_t *value) { const struct gpio_mcux_lpc_config *config = dev->config->config_info; @@ -380,8 +341,6 @@ static int gpio_mcux_lpc_init(struct device *dev) static const struct gpio_driver_api gpio_mcux_lpc_driver_api = { .config = gpio_mcux_lpc_configure, - .write = gpio_mcux_lpc_write, - .read = gpio_mcux_lpc_read, .port_get_raw = gpio_mcux_lpc_port_get_raw, .port_set_masked_raw = gpio_mcux_lpc_port_set_masked_raw, .port_set_bits_raw = gpio_mcux_lpc_port_set_bits_raw, diff --git a/drivers/gpio/gpio_mmio32.c b/drivers/gpio/gpio_mmio32.c index 507e56117ba..b1442658c36 100644 --- a/drivers/gpio/gpio_mmio32.c +++ b/drivers/gpio/gpio_mmio32.c @@ -62,54 +62,6 @@ static int gpio_mmio32_config(struct device *dev, int access_op, return 0; } -static int gpio_mmio32_write(struct device *dev, int access_op, - u32_t pin, u32_t value) -{ - struct gpio_mmio32_context *context = dev->driver_data; - const struct gpio_mmio32_config *config = context->config; - volatile u32_t *reg = config->reg; - u32_t mask = config->mask; - u32_t invert = context->common.invert; - unsigned int key; - - if (access_op == GPIO_ACCESS_BY_PIN) { - mask &= 1 << pin; - if (!mask) { - return -EINVAL; /* Pin not in our validity mask */ - } - value = value ? mask : 0; - } - - value = (value ^ invert) & mask; - - /* Update pin state atomically */ - key = irq_lock(); - *reg = (*reg & ~mask) | value; - irq_unlock(key); - - return 0; -} - -static int gpio_mmio32_read(struct device *dev, int access_op, - u32_t pin, u32_t *value) -{ - struct gpio_mmio32_context *context = dev->driver_data; - const struct gpio_mmio32_config *config = context->config; - u32_t bits; - - bits = (*config->reg ^ context->common.invert) & config->mask; - if (access_op == GPIO_ACCESS_BY_PIN) { - *value = (bits >> pin) & 1; - if ((config->mask & (1 << pin)) == 0) { - return -EINVAL; /* Pin not in our validity mask */ - } - } else { - *value = bits; - } - - return 0; -} - static int gpio_mmio32_port_get_raw(struct device *dev, u32_t *value) { struct gpio_mmio32_context *context = dev->driver_data; @@ -203,8 +155,6 @@ static int gpio_mmio32_pin_interrupt_configure(struct device *dev, static const struct gpio_driver_api gpio_mmio32_api = { .config = gpio_mmio32_config, - .write = gpio_mmio32_write, - .read = gpio_mmio32_read, .port_get_raw = gpio_mmio32_port_get_raw, .port_set_masked_raw = gpio_mmio32_port_set_masked_raw, .port_set_bits_raw = gpio_mmio32_port_set_bits_raw, diff --git a/drivers/gpio/gpio_nrfx.c b/drivers/gpio/gpio_nrfx.c index d7769af1420..cd66595292f 100644 --- a/drivers/gpio/gpio_nrfx.c +++ b/drivers/gpio/gpio_nrfx.c @@ -212,45 +212,6 @@ static int gpio_nrfx_config(struct device *port, int access_op, return 0; } -static int gpio_nrfx_write(struct device *port, int access_op, - u32_t pin, u32_t value) -{ - NRF_GPIO_Type *reg = get_port_cfg(port)->port; - struct gpio_nrfx_data *data = get_port_data(port); - - if (access_op == GPIO_ACCESS_BY_PORT) { - nrf_gpio_port_out_write(reg, value ^ data->common.invert); - } else { - if ((value > 0) ^ ((BIT(pin) & data->common.invert) != 0)) { - nrf_gpio_port_out_set(reg, BIT(pin)); - } else { - nrf_gpio_port_out_clear(reg, BIT(pin)); - } - } - - return 0; -} - -static int gpio_nrfx_read(struct device *port, int access_op, - u32_t pin, u32_t *value) -{ - NRF_GPIO_Type *reg = get_port_cfg(port)->port; - struct gpio_nrfx_data *data = get_port_data(port); - - u32_t dir = nrf_gpio_port_dir_read(reg); - u32_t port_in = nrf_gpio_port_in_read(reg) & ~dir; - u32_t port_out = nrf_gpio_port_out_read(reg) & dir; - u32_t port_val = (port_in | port_out) ^ data->common.invert; - - if (access_op == GPIO_ACCESS_BY_PORT) { - *value = port_val; - } else { - *value = (port_val & BIT(pin)) ? 1 : 0; - } - - return 0; -} - static int gpio_nrfx_port_get_raw(struct device *port, u32_t *value) { NRF_GPIO_Type *reg = get_port_cfg(port)->port; @@ -361,8 +322,6 @@ static inline int gpio_nrfx_pin_disable_callback(struct device *port, static const struct gpio_driver_api gpio_nrfx_drv_api_funcs = { .config = gpio_nrfx_config, - .write = gpio_nrfx_write, - .read = gpio_nrfx_read, .port_get_raw = gpio_nrfx_port_get_raw, .port_set_masked_raw = gpio_nrfx_port_set_masked_raw, .port_set_bits_raw = gpio_nrfx_port_set_bits_raw, diff --git a/drivers/gpio/gpio_pca95xx.c b/drivers/gpio/gpio_pca95xx.c index ebee8438802..ca080a659a9 100644 --- a/drivers/gpio/gpio_pca95xx.c +++ b/drivers/gpio/gpio_pca95xx.c @@ -361,104 +361,6 @@ done: return ret; } -/** - * @brief Set the pin or port output - * - * @param dev Device struct of the PCA95XX - * @param access_op Access operation (pin or port) - * @param pin The pin number - * @param value Value to set (0 or 1) - * - * @return 0 if successful, failed otherwise - */ -static int gpio_pca95xx_write(struct device *dev, int access_op, - u32_t pin, u32_t value) -{ - struct gpio_pca95xx_drv_data * const drv_data = - (struct gpio_pca95xx_drv_data * const)dev->driver_data; - u16_t reg_out; - int ret; - - /* Can't do I2C bus operations from an ISR */ - if (k_is_in_isr()) { - return -EWOULDBLOCK; - } - - k_sem_take(&drv_data->lock, K_FOREVER); - - reg_out = drv_data->reg_cache.output; - - /* Invert input value for pins configurated as active low. */ - switch (access_op) { - case GPIO_ACCESS_BY_PIN: - if (value) { - reg_out |= BIT(pin); - } else { - reg_out &= ~BIT(pin); - } - break; - case GPIO_ACCESS_BY_PORT: - reg_out = value; - break; - default: - ret = -ENOTSUP; - goto done; - } - - ret = update_output_regs(dev, reg_out); - -done: - k_sem_give(&drv_data->lock); - return ret; -} - -/** - * @brief Read the pin or port status - * - * @param dev Device struct of the PCA95XX - * @param access_op Access operation (pin or port) - * @param pin The pin number - * @param value Value of input pin(s) - * - * @return 0 if successful, failed otherwise - */ -static int gpio_pca95xx_read(struct device *dev, int access_op, - u32_t pin, u32_t *value) -{ - struct gpio_pca95xx_drv_data * const drv_data = - (struct gpio_pca95xx_drv_data * const)dev->driver_data; - u16_t buf; - int ret; - - /* Can't do I2C bus operations from an ISR */ - if (k_is_in_isr()) { - return -EWOULDBLOCK; - } - - k_sem_take(&drv_data->lock, K_FOREVER); - - ret = read_port_regs(dev, REG_INPUT_PORT0, &buf); - if (ret != 0) { - goto done; - } - - switch (access_op) { - case GPIO_ACCESS_BY_PIN: - *value = (buf >> pin) & 0x01; - break; - case GPIO_ACCESS_BY_PORT: - *value = buf; - break; - default: - ret = -ENOTSUP; - break; - } - -done: - k_sem_give(&drv_data->lock); - return ret; -} - static int gpio_pca95xx_port_get_raw(struct device *dev, u32_t *value) { struct gpio_pca95xx_drv_data * const drv_data = @@ -554,8 +456,6 @@ static int gpio_pca95xx_pin_interrupt_configure(struct device *dev, static const struct gpio_driver_api gpio_pca95xx_drv_api_funcs = { .config = gpio_pca95xx_config, - .write = gpio_pca95xx_write, - .read = gpio_pca95xx_read, .port_get_raw = gpio_pca95xx_port_get_raw, .port_set_masked_raw = gpio_pca95xx_port_set_masked_raw, .port_set_bits_raw = gpio_pca95xx_port_set_bits_raw, diff --git a/drivers/gpio/gpio_rv32m1.c b/drivers/gpio/gpio_rv32m1.c index 219398175f7..d456cdf4ee6 100644 --- a/drivers/gpio/gpio_rv32m1.c +++ b/drivers/gpio/gpio_rv32m1.c @@ -177,51 +177,6 @@ static int gpio_rv32m1_configure(struct device *dev, return 0; } -static int gpio_rv32m1_write(struct device *dev, - int access_op, u32_t pin, u32_t value) -{ - const struct gpio_rv32m1_config *config = dev->config->config_info; - GPIO_Type *gpio_base = config->gpio_base; - - if (access_op == GPIO_ACCESS_BY_PIN) { - if (value) { - /* Set the data output for the corresponding pin. - * Writing zeros to the other bits leaves the data - * output unchanged for the other pins. - */ - gpio_base->PSOR = BIT(pin); - } else { - /* Clear the data output for the corresponding pin. - * Writing zeros to the other bits leaves the data - * output unchanged for the other pins. - */ - gpio_base->PCOR = BIT(pin); - } - } else { /* GPIO_ACCESS_BY_PORT */ - /* Write the data output for all the pins */ - gpio_base->PDOR = value; - } - - return 0; -} - -static int gpio_rv32m1_read(struct device *dev, - int access_op, u32_t pin, u32_t *value) -{ - const struct gpio_rv32m1_config *config = dev->config->config_info; - GPIO_Type *gpio_base = config->gpio_base; - - *value = gpio_base->PDIR; - - if (access_op == GPIO_ACCESS_BY_PIN) { - *value = (*value & BIT(pin)) >> pin; - } - - /* nothing more to do for GPIO_ACCESS_BY_PORT */ - - return 0; -} - static int gpio_rv32m1_port_get_raw(struct device *dev, u32_t *value) { const struct gpio_rv32m1_config *config = dev->config->config_info; @@ -373,8 +328,6 @@ static int gpio_rv32m1_init(struct device *dev) static const struct gpio_driver_api gpio_rv32m1_driver_api = { .config = gpio_rv32m1_configure, - .write = gpio_rv32m1_write, - .read = gpio_rv32m1_read, .port_get_raw = gpio_rv32m1_port_get_raw, .port_set_masked_raw = gpio_rv32m1_port_set_masked_raw, .port_set_bits_raw = gpio_rv32m1_port_set_bits_raw, diff --git a/drivers/gpio/gpio_sam.c b/drivers/gpio/gpio_sam.c index cde81f77ec5..19cf5f95226 100644 --- a/drivers/gpio/gpio_sam.c +++ b/drivers/gpio/gpio_sam.c @@ -151,54 +151,6 @@ static int gpio_sam_config(struct device *dev, int access_op, u32_t pin, return ret; } -static int gpio_sam_write(struct device *dev, int access_op, u32_t pin, - u32_t value) -{ - const struct gpio_sam_config * const cfg = DEV_CFG(dev); - Pio * const pio = cfg->regs; - u32_t mask = 1 << pin; - - switch (access_op) { - case GPIO_ACCESS_BY_PIN: - if (value) { - /* Set the pin. */ - pio->PIO_SODR = mask; - } else { - /* Clear the pin. */ - pio->PIO_CODR = mask; - } - break; - case GPIO_ACCESS_BY_PORT: - pio->PIO_ODSR = value; - break; - default: - return -ENOTSUP; - } - - return 0; -} - -static int gpio_sam_read(struct device *dev, int access_op, u32_t pin, - u32_t *value) -{ - const struct gpio_sam_config * const cfg = DEV_CFG(dev); - Pio * const pio = cfg->regs; - - *value = pio->PIO_PDSR; - - switch (access_op) { - case GPIO_ACCESS_BY_PIN: - *value = (*value >> pin) & 1; - break; - case GPIO_ACCESS_BY_PORT: - break; - default: - return -ENOTSUP; - } - - return 0; -} - static int gpio_sam_port_get_raw(struct device *dev, u32_t *value) { const struct gpio_sam_config * const cfg = DEV_CFG(dev); @@ -354,8 +306,6 @@ static int gpio_sam_disable_callback(struct device *port, static const struct gpio_driver_api gpio_sam_api = { .config = gpio_sam_config, - .write = gpio_sam_write, - .read = gpio_sam_read, .port_get_raw = gpio_sam_port_get_raw, .port_set_masked_raw = gpio_sam_port_set_masked_raw, .port_set_bits_raw = gpio_sam_port_set_bits_raw, diff --git a/drivers/gpio/gpio_sam0.c b/drivers/gpio/gpio_sam0.c index dabbeb2e717..6212d1ea478 100644 --- a/drivers/gpio/gpio_sam0.c +++ b/drivers/gpio/gpio_sam0.c @@ -105,30 +105,6 @@ static int gpio_sam0_config(struct device *dev, int access_op, u32_t pin, return 0; } -static int gpio_sam0_write(struct device *dev, int access_op, u32_t pin, - u32_t value) -{ - const struct gpio_sam0_config *config = DEV_CFG(dev); - - if (value != 0U) { - config->regs->OUTSET.reg = BIT(pin); - } else { - config->regs->OUTCLR.reg = BIT(pin); - } - - return 0; -} - -static int gpio_sam0_read(struct device *dev, int access_op, u32_t pin, - u32_t *value) -{ - const struct gpio_sam0_config *config = DEV_CFG(dev); - - *value = (config->regs->IN.reg & BIT(pin)) != 0; - - return 0; -} - static int gpio_sam0_port_get_raw(struct device *dev, gpio_port_value_t *value) { @@ -307,8 +283,6 @@ static u32_t gpio_sam0_get_pending_int(struct device *dev) static const struct gpio_driver_api gpio_sam0_api = { .config = gpio_sam0_config, - .write = gpio_sam0_write, - .read = gpio_sam0_read, .port_get_raw = gpio_sam0_port_get_raw, .port_set_masked_raw = gpio_sam0_port_set_masked_raw, .port_set_bits_raw = gpio_sam0_port_set_bits_raw, diff --git a/drivers/gpio/gpio_sifive.c b/drivers/gpio/gpio_sifive.c index c42140ecede..1aca934fe7a 100644 --- a/drivers/gpio/gpio_sifive.c +++ b/drivers/gpio/gpio_sifive.c @@ -198,83 +198,6 @@ static int gpio_sifive_config(struct device *dev, return 0; } -/** - * @brief Set the pin - * - * @param dev Device struct - * @param access_op Access operation - * @param pin The pin number - * @param value Value to set (0 or 1) - * - * @return 0 if successful, failed otherwise - */ -static int gpio_sifive_write(struct device *dev, - int access_op, - u32_t pin, - u32_t value) -{ - volatile struct gpio_sifive_t *gpio = DEV_GPIO(dev); - - if (access_op != GPIO_ACCESS_BY_PIN) { - return -ENOTSUP; - } - - if (pin >= SIFIVE_PINMUX_PINS) - return -EINVAL; - - /* If pin is configured as input return with error */ - if (gpio->in_en & BIT(pin)) { - return -EINVAL; - } - - if (value) { - gpio->out_val |= BIT(pin); - } else { - gpio->out_val &= ~BIT(pin); - } - - return 0; -} - -/** - * @brief Read the pin - * - * @param dev Device struct - * @param access_op Access operation - * @param pin The pin number - * @param value Value of input pin(s) - * - * @return 0 if successful, failed otherwise - */ -static int gpio_sifive_read(struct device *dev, - int access_op, - u32_t pin, - u32_t *value) -{ - volatile struct gpio_sifive_t *gpio = DEV_GPIO(dev); - - if (access_op != GPIO_ACCESS_BY_PIN) { - return -ENOTSUP; - } - - if (pin >= SIFIVE_PINMUX_PINS) { - return -EINVAL; - } - - /* - * If gpio is configured as output, - * read gpio value from out_val register, - * otherwise read gpio value from in_val register - */ - if (gpio->out_en & BIT(pin)) { - *value = !!(gpio->out_val & BIT(pin)); - } else { - *value = !!(gpio->in_val & BIT(pin)); - } - - return 0; -} - static int gpio_sifive_port_get_raw(struct device *dev, gpio_port_value_t *value) { @@ -439,8 +362,6 @@ static int gpio_sifive_disable_callback(struct device *dev, static const struct gpio_driver_api gpio_sifive_driver = { .config = gpio_sifive_config, - .write = gpio_sifive_write, - .read = gpio_sifive_read, .port_get_raw = gpio_sifive_port_get_raw, .port_set_masked_raw = gpio_sifive_port_set_masked_raw, .port_set_bits_raw = gpio_sifive_port_set_bits_raw, diff --git a/drivers/gpio/gpio_stellaris.c b/drivers/gpio/gpio_stellaris.c index 205849a84a2..590e3897461 100644 --- a/drivers/gpio/gpio_stellaris.c +++ b/drivers/gpio/gpio_stellaris.c @@ -127,44 +127,6 @@ static int gpio_stellaris_configure(struct device *dev, int access_op, return 0; } -static int gpio_stellaris_write(struct device *dev, - int access_op, u32_t pin, u32_t value) -{ - const struct gpio_stellaris_config *cfg = DEV_CFG(dev); - u32_t base = cfg->base; - - if (access_op != GPIO_ACCESS_BY_PIN) { - return -EINVAL; - } - - /* Set/Clear the data output for the respective pin */ - if (value) { - sys_set_bit(GPIO_RW_ADDR(base, GPIO_DATA_OFFSET, pin), - pin); - } else { - sys_clear_bit(GPIO_RW_ADDR(base, GPIO_DATA_OFFSET, pin), - pin); - } - - return 0; -} - -static int gpio_stellaris_read(struct device *dev, - int access_op, u32_t pin, u32_t *value) -{ - const struct gpio_stellaris_config *cfg = DEV_CFG(dev); - u32_t base = cfg->base; - - if (access_op != GPIO_ACCESS_BY_PIN) { - return -EINVAL; - } - - *value = sys_test_bit(GPIO_RW_ADDR(base, GPIO_DATA_OFFSET, pin), - pin); - - return 0; -} - static int gpio_stellaris_port_get_raw(struct device *dev, u32_t *value) { const struct gpio_stellaris_config *cfg = DEV_CFG(dev); @@ -295,8 +257,6 @@ static int gpio_stellaris_manage_callback(struct device *dev, static const struct gpio_driver_api gpio_stellaris_driver_api = { .config = gpio_stellaris_configure, - .write = gpio_stellaris_write, - .read = gpio_stellaris_read, .port_get_raw = gpio_stellaris_port_get_raw, .port_set_masked_raw = gpio_stellaris_port_set_masked_raw, .port_set_bits_raw = gpio_stellaris_port_set_bits_raw, diff --git a/drivers/gpio/gpio_stm32.c b/drivers/gpio/gpio_stm32.c index 0129aa0327b..783d2d07f67 100644 --- a/drivers/gpio/gpio_stm32.c +++ b/drivers/gpio/gpio_stm32.c @@ -423,47 +423,6 @@ release_lock: return err; } -/** - * @brief Set the pin or port output - */ -static int gpio_stm32_write(struct device *dev, int access_op, - u32_t pin, u32_t value) -{ - const struct gpio_stm32_config *cfg = dev->config->config_info; - GPIO_TypeDef *gpio = (GPIO_TypeDef *)cfg->base; - - if (access_op != GPIO_ACCESS_BY_PIN) { - return -ENOTSUP; - } - - pin = stm32_pinval_get(pin); - if (value != 0U) { - LL_GPIO_SetOutputPin(gpio, pin); - } else { - LL_GPIO_ResetOutputPin(gpio, pin); - } - - return 0; -} - -/** - * @brief Read the pin or port status - */ -static int gpio_stm32_read(struct device *dev, int access_op, - u32_t pin, u32_t *value) -{ - const struct gpio_stm32_config *cfg = dev->config->config_info; - GPIO_TypeDef *gpio = (GPIO_TypeDef *)cfg->base; - - if (access_op != GPIO_ACCESS_BY_PIN) { - return -ENOTSUP; - } - - *value = (LL_GPIO_ReadInputPort(gpio) >> pin) & 0x1; - - return 0; -} - static int gpio_stm32_pin_interrupt_configure(struct device *dev, unsigned int pin, enum gpio_int_mode mode, enum gpio_int_trig trig) @@ -559,8 +518,6 @@ static int gpio_stm32_disable_callback(struct device *dev, static const struct gpio_driver_api gpio_stm32_driver = { .config = gpio_stm32_config, - .write = gpio_stm32_write, - .read = gpio_stm32_read, .port_get_raw = gpio_stm32_port_get_raw, .port_set_masked_raw = gpio_stm32_port_set_masked_raw, .port_set_bits_raw = gpio_stm32_port_set_bits_raw, diff --git a/drivers/gpio/gpio_sx1509b.c b/drivers/gpio/gpio_sx1509b.c index 0e96bed612e..c3d462c556d 100644 --- a/drivers/gpio/gpio_sx1509b.c +++ b/drivers/gpio/gpio_sx1509b.c @@ -325,74 +325,6 @@ static int pin_interrupt_configure(struct device *dev, return ret; } -static int sx1509b_write(struct device *dev, int access_op, u32_t pin, - u32_t value) -{ - const struct sx1509b_config *cfg = dev->config->config_info; - struct sx1509b_drv_data *drv_data = dev->driver_data; - u16_t *pin_data = &drv_data->pin_state.data; - int ret = 0; - - k_sem_take(&drv_data->lock, K_FOREVER); - - switch (access_op) { - case GPIO_ACCESS_BY_PIN: - if (value) { - *pin_data |= BIT(pin); - } else { - *pin_data &= ~BIT(pin); - } - break; - case GPIO_ACCESS_BY_PORT: - *pin_data = value; - break; - default: - ret = -ENOTSUP; - goto out; - } - - ret = i2c_reg_write_word_be(drv_data->i2c_master, cfg->i2c_slave_addr, - SX1509B_REG_DATA, *pin_data); -out: - k_sem_give(&drv_data->lock); - return ret; -} - -static int sx1509b_read(struct device *dev, int access_op, u32_t pin, - u32_t *value) -{ - const struct sx1509b_config *cfg = dev->config->config_info; - struct sx1509b_drv_data *drv_data = dev->driver_data; - u16_t pin_data; - int ret; - - k_sem_take(&drv_data->lock, K_FOREVER); - - ret = i2c_burst_read(drv_data->i2c_master, cfg->i2c_slave_addr, - SX1509B_REG_DATA, (u8_t *)&pin_data, - sizeof(pin_data)); - if (ret) { - goto out; - } - - pin_data = sys_be16_to_cpu(pin_data); - - switch (access_op) { - case GPIO_ACCESS_BY_PIN: - *value = !!(pin_data & (BIT(pin))); - break; - case GPIO_ACCESS_BY_PORT: - *value = pin_data; - break; - default: - ret = -ENOTSUP; - } - -out: - k_sem_give(&drv_data->lock); - return ret; -} - /** * @brief Initialization function of SX1509B * @@ -467,8 +399,6 @@ out: static const struct gpio_driver_api api_table = { .config = sx1509b_config, - .write = sx1509b_write, - .read = sx1509b_read, .port_get_raw = port_get, .port_set_masked_raw = port_set_masked, .port_set_bits_raw = port_set_bits, diff --git a/include/drivers/gpio.h b/include/drivers/gpio.h index e8d34d9f42e..94c1ac2b872 100644 --- a/include/drivers/gpio.h +++ b/include/drivers/gpio.h @@ -552,10 +552,6 @@ enum gpio_int_trig { struct gpio_driver_api { int (*config)(struct device *port, int access_op, u32_t pin, int flags); - int (*write)(struct device *port, int access_op, u32_t pin, - u32_t value); - int (*read)(struct device *port, int access_op, u32_t pin, - u32_t *value); int (*port_get_raw)(struct device *port, gpio_port_value_t *value); int (*port_set_masked_raw)(struct device *port, gpio_port_pins_t mask, gpio_port_value_t value);