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driver: clock: stm32 clock control supports ahb_prescaler

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This constraint on the AHB prescaler is removed.
The ahb-prescaler is allow from 1-512.
For stm32 common and stm32U5 devices.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is contained in:
Francois Ramu 2021-09-10 15:51:49 +02:00 • committed by Christopher Friedt
commit 1ebd6b579e
2 changed files with 0 additions and 23 deletions
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11
drivers/clock_control/clock_stm32_ll_common.c
View file

@ -64,17 +64,6 @@
#define STM32WL_DUAL_CORE
#endif
#if STM32_AHB_PRESCALER > 1
/*
* AHB prescaler allows to set a HCLK frequency (feeding cortex systick)
* lower than SYSCLK frequency (actual core frequency).
* Though, zephyr doesn't make a difference today between these two clocks.
* So, changing this prescaler is not allowed until it is made possible to
* use them independently in zephyr clock subsystem.
*/
#error "AHB prescaler can't be higher than 1"
#endif
/**
* @brief fill in AHB/APB buses configuration structure
*/

12
drivers/clock_control/clock_stm32_ll_u5.c
View file

@ -30,18 +30,6 @@
#define z_apb3_prescaler(v) LL_RCC_APB3_DIV_ ## v
#define apb3_prescaler(v) z_apb3_prescaler(v)
#if STM32_AHB_PRESCALER > 1
/*
* AHB prescaler allows to set a HCLK frequency (feeding cortex systick)
* lower than SYSCLK frequency (actual core frequency).
* Though, zephyr doesn't make a difference today between these two clocks.
* So, changing this prescaler is not allowed until it is made possible to
* use them independently in zephyr clock subsystem.
*/
#error "AHB prescaler can't be higher than 1"
#endif
#if STM32_SYSCLK_SRC_PLL
/**