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drivers: hwinfo: sam: Introduce RSTC driver

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Add a new hwinfo driver to get the reset cause on
SAM4S/SAME70/SAMV71 SoC series.

The user-nrst dts property has been added to enable external user
resets.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
This commit is contained in:
Pieter De Gendt 2022-02-17 15:00:25 +01:00 • committed by Carles Cufí
commit 1e747eca0d
6 changed files with 129 additions and 1 deletions
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1
drivers/hwinfo/CMakeLists.txt
View file

@ -16,6 +16,7 @@ zephyr_library_sources_ifdef(CONFIG_HWINFO_MCUX_SRC hwinfo_mcux_src.c)
zephyr_library_sources_ifdef(CONFIG_HWINFO_MCUX_SYSCON hwinfo_mcux_syscon.c)
zephyr_library_sources_ifdef(CONFIG_HWINFO_NRF hwinfo_nrf.c)
zephyr_library_sources_ifdef(CONFIG_HWINFO_PSOC6 hwinfo_psoc6.c)
zephyr_library_sources_ifdef(CONFIG_HWINFO_SAM_RSTC hwinfo_sam_rstc.c)
zephyr_library_sources_ifdef(CONFIG_HWINFO_SAM hwinfo_sam.c)
zephyr_library_sources_ifdef(CONFIG_HWINFO_SAM0 hwinfo_sam0.c)
zephyr_library_sources_ifdef(CONFIG_HWINFO_SAM4L hwinfo_sam4l.c)

10
drivers/hwinfo/Kconfig
View file

@ -70,12 +70,20 @@ config HWINFO_IMXRT
help
Enable NXP i.mx RT hwinfo driver.
config HWINFO_SAM_RSTC
bool "Atmel SAM reset cause"
default y
depends on SOC_SERIES_SAM4S || SOC_SERIES_SAME70 || \
SOC_SERIES_SAMV71
help
Enable Atmel SAM reset cause hwinfo driver.
config HWINFO_SAM
bool "Atmel SAM device ID"
default y
depends on SOC_FAMILY_SAM && !SOC_SERIES_SAM4L
help
Enable Atmel SAM hwinfo driver.
Enable Atmel SAM device ID hwinfo driver.
config HWINFO_SAM4L
bool "Atmel SAM4L device ID"

84
drivers/hwinfo/hwinfo_sam_rstc.c Normal file
View file

@ -0,0 +1,84 @@
/*
* Copyright (c) 2022 Basalte bv
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam_rstc
#include <device.h>
#include <drivers/hwinfo.h>
#include <init.h>
#include <soc.h>
BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1,
"No atmel,sam-rstc compatible device found");
int z_impl_hwinfo_get_reset_cause(uint32_t *cause)
{
/* Get reason from Status Register */
uint32_t reason = ((Rstc *)DT_INST_REG_ADDR(0))->RSTC_SR & RSTC_SR_RSTTYP_Msk;
switch (reason) {
case RSTC_SR_RSTTYP_GENERAL_RST:
*cause = RESET_POR;
break;
case RSTC_SR_RSTTYP_BACKUP_RST:
*cause = RESET_LOW_POWER_WAKE;
break;
case RSTC_SR_RSTTYP_WDT_RST:
*cause = RESET_WATCHDOG;
break;
case RSTC_SR_RSTTYP_SOFT_RST:
*cause = RESET_SOFTWARE;
break;
case RSTC_SR_RSTTYP_USER_RST:
*cause = RESET_USER;
break;
default:
break;
}
return 0;
}
int z_impl_hwinfo_get_supported_reset_cause(uint32_t *supported)
{
*supported = RESET_POR
| RESET_LOW_POWER_WAKE
| RESET_WATCHDOG
| RESET_SOFTWARE
| RESET_USER;
return 0;
}
static int hwinfo_rstc_init(const struct device *dev)
{
Rstc *regs = (Rstc *)DT_INST_REG_ADDR(0);
uint32_t mode;
ARG_UNUSED(dev);
/* Enable RSTC in PMC */
soc_pmc_peripheral_enable(DT_INST_PROP(0, peripheral_id));
/* Get current Mode Register value */
mode = regs->RSTC_MR;
/* Enable/disable user reset on NRST */
#if DT_INST_PROP(0, user_nrst)
mode &= ~RSTC_MR_KEY_Msk;
mode |= (RSTC_MR_URSTEN | RSTC_MR_KEY_PASSWD);
#else
mode &= ~(RSTC_MR_URSTEN | RSTC_MR_KEY_Msk);
mode |= RSTC_MR_KEY_PASSWD;
#endif
/* Set Mode Register value */
regs->RSTC_MR = mode;
return 0;
}
SYS_INIT(hwinfo_rstc_init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);