diff --git a/arch/arm/soc/st_stm32/stm32l0/dts.fixup b/arch/arm/soc/st_stm32/stm32l0/dts.fixup
index dc2a5a37aa1..e5ba04361f2 100644
--- a/arch/arm/soc/st_stm32/stm32l0/dts.fixup
+++ b/arch/arm/soc/st_stm32/stm32l0/dts.fixup
@@ -14,6 +14,12 @@
 #define CONFIG_UART_STM32_USART_2_NAME		ST_STM32_USART_40004400_LABEL
 #define USART_2_IRQ				ST_STM32_USART_40004400_IRQ_0
 
+#define CONFIG_UART_STM32_LPUART_1_BASE_ADDRESS	ST_STM32_LPUART_40004800_BASE_ADDRESS
+#define CONFIG_UART_STM32_LPUART_1_BAUD_RATE	ST_STM32_LPUART_40004800_CURRENT_SPEED
+#define CONFIG_UART_STM32_LPUART_1_IRQ_PRI	ST_STM32_LPUART_40004800_IRQ_0_PRIORITY
+#define CONFIG_UART_STM32_LPUART_1_NAME		ST_STM32_LPUART_40004800_LABEL
+#define LPUART_1_IRQ				ST_STM32_LPUART_40004800_IRQ_0
+
 #define CONFIG_I2C_1_BASE_ADDRESS		ST_STM32_I2C_V2_40005400_BASE_ADDRESS
 #define CONFIG_I2C_1_COMBINED_IRQ_PRI		ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
 #define CONFIG_I2C_1_NAME			ST_STM32_I2C_V2_40005400_LABEL
diff --git a/arch/arm/soc/st_stm32/stm32l0/soc.h b/arch/arm/soc/st_stm32/stm32l0/soc.h
index 6bcb4e6eabc..6e8be073454 100644
--- a/arch/arm/soc/st_stm32/stm32l0/soc.h
+++ b/arch/arm/soc/st_stm32/stm32l0/soc.h
@@ -35,6 +35,7 @@
 
 #ifdef CONFIG_SERIAL_HAS_DRIVER
 #include <stm32l0xx_ll_usart.h>
+#include <stm32l0xx_ll_lpuart.h>
 #endif
 
 #ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
diff --git a/arch/arm/soc/st_stm32/stm32l4/dts.fixup b/arch/arm/soc/st_stm32/stm32l4/dts.fixup
index c274769bdc9..d76ddd7c85c 100644
--- a/arch/arm/soc/st_stm32/stm32l4/dts.fixup
+++ b/arch/arm/soc/st_stm32/stm32l4/dts.fixup
@@ -32,6 +32,12 @@
 #define CONFIG_UART_STM32_UART_5_NAME           ST_STM32_UART_40005000_LABEL
 #define UART_5_IRQ                              ST_STM32_UART_40005000_IRQ_0
 
+#define CONFIG_UART_STM32_LPUART_1_BASE_ADDRESS ST_STM32_LPUART_40008000_BASE_ADDRESS
+#define CONFIG_UART_STM32_LPUART_1_BAUD_RATE    ST_STM32_LPUART_40008000_CURRENT_SPEED
+#define CONFIG_UART_STM32_LPUART_1_IRQ_PRI      ST_STM32_LPUART_40008000_IRQ_0_PRIORITY
+#define CONFIG_UART_STM32_LPUART_1_NAME         ST_STM32_LPUART_40008000_LABEL
+#define LPUART_1_IRQ                            ST_STM32_LPUART_40008000_IRQ_0
+
 #define CONFIG_I2C_1_BASE_ADDRESS               ST_STM32_I2C_V2_40005400_BASE_ADDRESS
 #define CONFIG_I2C_1_EVENT_IRQ_PRI              ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
 #define CONFIG_I2C_1_ERROR_IRQ_PRI              ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
diff --git a/arch/arm/soc/st_stm32/stm32l4/soc.h b/arch/arm/soc/st_stm32/stm32l4/soc.h
index 2397331bb32..e3041a946dd 100644
--- a/arch/arm/soc/st_stm32/stm32l4/soc.h
+++ b/arch/arm/soc/st_stm32/stm32l4/soc.h
@@ -33,6 +33,7 @@
 
 #ifdef CONFIG_SERIAL_HAS_DRIVER
 #include <stm32l4xx_ll_usart.h>
+#include <stm32l4xx_ll_lpuart.h>
 #endif
 
 #ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
diff --git a/drivers/serial/Kconfig.stm32 b/drivers/serial/Kconfig.stm32
index c5b6ec82a50..e1010c7bc2b 100644
--- a/drivers/serial/Kconfig.stm32
+++ b/drivers/serial/Kconfig.stm32
@@ -118,4 +118,18 @@ config UART_STM32_PORT_10
 	  Enable support for UART10 port in the driver.
 	  Say y here if you want to use UART10 device.
 
+if SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X
+
+# --- low power port 1 ---
+
+config UART_STM32_LPUART_1
+	bool "Enable STM32 LPUART1 Port"
+	default n
+	depends on UART_STM32
+	help
+	  Enable support for LPUART1 port in the driver.
+	  Say y here if you want to use LPUART1 device.
+
+endif # SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X
+
 endif # UART_STM32
diff --git a/drivers/serial/uart_stm32.c b/drivers/serial/uart_stm32.c
index b5b563c63f5..50dd45ac0ec 100644
--- a/drivers/serial/uart_stm32.c
+++ b/drivers/serial/uart_stm32.c
@@ -247,6 +247,37 @@ static const struct uart_driver_api uart_stm32_driver_api = {
 #endif	/* CONFIG_UART_INTERRUPT_DRIVEN */
 };
 
+static void uart_stm32_usart_set_baud_rate(struct device *dev,
+					   u32_t clock_rate, u32_t baud_rate)
+{
+	USART_TypeDef *UartInstance = UART_STRUCT(dev);
+
+	LL_USART_SetBaudRate(UartInstance,
+			     clock_rate,
+#ifdef USART_PRESC_PRESCALER
+			     LL_USART_PRESCALER_DIV1,
+#endif
+#ifdef USART_CR1_OVER8
+			     LL_USART_OVERSAMPLING_16,
+#endif
+			     baud_rate);
+}
+
+#if defined(CONFIG_SOC_SERIES_STM32L0X) || defined(CONFIG_SOC_SERIES_STM32L4X)
+static void uart_stm32_lpuart_set_baud_rate(struct device *dev,
+					    u32_t clock_rate, u32_t baud_rate)
+{
+	USART_TypeDef *UartInstance = UART_STRUCT(dev);
+
+	LL_LPUART_SetBaudRate(UartInstance,
+			      clock_rate,
+#ifdef USART_PRESC_PRESCALER
+			      LL_USART_PRESCALER_DIV1,
+#endif
+			      baud_rate);
+}
+#endif
+
 /**
  * @brief Initialize UART channel
  *
@@ -263,6 +294,7 @@ static int uart_stm32_init(struct device *dev)
 	struct uart_stm32_data *data = DEV_DATA(dev);
 	USART_TypeDef *UartInstance = UART_STRUCT(dev);
 
+	u32_t baud_rate = config->baud_rate;
 	u32_t clock_rate;
 
 	__uart_stm32_get_clock(dev);
@@ -287,15 +319,15 @@ static int uart_stm32_init(struct device *dev)
 			       (clock_control_subsys_t *)&config->pclken,
 			       &clock_rate);
 
-	LL_USART_SetBaudRate(UartInstance,
-			     clock_rate,
-#ifdef USART_PRESC_PRESCALER
-			     LL_USART_PRESCALER_DIV1,
+#if defined(CONFIG_SOC_SERIES_STM32L0X) || defined(CONFIG_SOC_SERIES_STM32L4X)
+	if (IS_LPUART_INSTANCE(UartInstance)) {
+		uart_stm32_lpuart_set_baud_rate(dev, clock_rate, baud_rate);
+	} else {
+		uart_stm32_usart_set_baud_rate(dev, clock_rate, baud_rate);
+	}
+#else
+	uart_stm32_usart_set_baud_rate(dev, clock_rate, baud_rate);
 #endif
-#ifdef USART_CR1_OVER8
-			     LL_USART_OVERSAMPLING_16,
-#endif
-			     config->baud_rate);
 
 	LL_USART_Enable(UartInstance);
 
@@ -417,6 +449,10 @@ STM32_UART_INIT(USART_4, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_USART4)
 STM32_UART_INIT(USART_5, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_USART5)
 #endif /* CONFIG_UART_STM32_PORT_5 */
 
+#ifdef CONFIG_UART_STM32_LPUART_1
+STM32_UART_INIT(LPUART_1, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_LPUART1)
+#endif /* CONFIG_UART_STM32_LPUART_1 */
+
 #else
 
 #ifdef CONFIG_UART_STM32_PORT_1
@@ -459,4 +495,10 @@ STM32_UART_INIT(UART_9, STM32_CLOCK_BUS_APB2, LL_APB2_GRP1_PERIPH_UART9)
 STM32_UART_INIT(UART_10, STM32_CLOCK_BUS_APB2, LL_APB2_GRP1_PERIPH_UART10)
 #endif /* CONFIG_UART_STM32_PORT_10 */
 
+#ifdef CONFIG_SOC_SERIES_STM32L4X
+#ifdef CONFIG_UART_STM32_LPUART_1
+STM32_UART_INIT(LPUART_1, STM32_CLOCK_BUS_APB1_2, LL_APB1_GRP2_PERIPH_LPUART1)
+#endif /* CONFIG_UART_STM32_LPUART_1 */
+#endif /* CONFIG_SOC_SERIES_STM32L4X */
+
 #endif
diff --git a/dts/arm/st/stm32l0.dtsi b/dts/arm/st/stm32l0.dtsi
index f03a3125145..a63011d432e 100644
--- a/dts/arm/st/stm32l0.dtsi
+++ b/dts/arm/st/stm32l0.dtsi
@@ -126,6 +126,15 @@
 			label = "UART_2";
 		};
 
+		lpuart1: serial@40004800 {
+			compatible = "st,stm32-lpuart", "st,stm32-uart";
+			reg = <0x40004800 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
+			interrupts = <29 0>;
+			status = "disabled";
+			label = "LPUART_1";
+		};
+
 		i2c1: i2c@40005400 {
 			compatible = "st,stm32-i2c-v2";
 			clock-frequency = <I2C_BITRATE_STANDARD>;
diff --git a/dts/arm/st/stm32l4.dtsi b/dts/arm/st/stm32l4.dtsi
index 1cf6c33c0e9..63e35d42796 100644
--- a/dts/arm/st/stm32l4.dtsi
+++ b/dts/arm/st/stm32l4.dtsi
@@ -127,6 +127,15 @@
 			label = "UART_3";
 		};
 
+		lpuart1: serial@40008000 {
+			compatible = "st,stm32-lpuart", "st,stm32-uart";
+			reg = <0x40008000 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000001>;
+			interrupts = <70 0>;
+			status = "disabled";
+			label = "LPUART_1";
+		};
+
 		i2c1: i2c@40005400 {
 			compatible = "st,stm32-i2c-v2";
 			clock-frequency = <I2C_BITRATE_STANDARD>;
diff --git a/dts/bindings/serial/st,stm32-lpuart.yaml b/dts/bindings/serial/st,stm32-lpuart.yaml
new file mode 100644
index 00000000000..444246a299e
--- /dev/null
+++ b/dts/bindings/serial/st,stm32-lpuart.yaml
@@ -0,0 +1,36 @@
+---
+title: STM32 LPUART
+id: st,stm32-lpuart
+version: 0.1
+
+description: >
+    This binding gives a base representation of the STM32 LPUART
+
+inherits:
+    !include uart.yaml
+
+properties:
+    compatible:
+      type: string
+      category: required
+      description: compatible strings
+      constraint: "st,stm32-lpuart"
+
+    reg:
+      type: array
+      description: mmio register space
+      generation: define
+      category: required
+
+    interrupts:
+      type: array
+      category: required
+      description: required interrupts
+      generation: define
+
+    clocks:
+      type: array
+      category: required
+      description: Clock gate control information
+      generation: define
+...