drivers: uart_ns16550: remove soc specific codes and bug fixes
* remove soc specific codes * optimize the caculation of baudrate. Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
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3 changed files with 17 additions and 13 deletions
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@ -193,10 +193,8 @@
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#ifdef UART_NS16550_ACCESS_IOPORT
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#ifdef UART_NS16550_ACCESS_IOPORT
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#define INBYTE(x) sys_in8(x)
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#define INBYTE(x) sys_in8(x)
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#define OUTBYTE(x, d) sys_out8(d, x)
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#define OUTBYTE(x, d) sys_out8(d, x)
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#ifdef CONFIG_SOC_ARC_IOT
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#ifndef UART_REG_ADDR_INTERVAL
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#define UART_REG_ADDR_INTERVAL 4 /* address diff of adjacent regs. */
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#define UART_REG_ADDR_INTERVAL 1 /* address diff of adjacent regs. */
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#else
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#define UART_REG_ADDR_INTERVAL 1
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#endif
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#endif
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#else
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#else
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#define INBYTE(x) sys_read8(x)
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#define INBYTE(x) sys_read8(x)
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@ -254,8 +252,12 @@ static void set_baud_rate(struct device *dev, u32_t baud_rate)
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u8_t lcr_cache;
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u8_t lcr_cache;
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if ((baud_rate != 0) && (dev_cfg->sys_clk_freq != 0)) {
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if ((baud_rate != 0) && (dev_cfg->sys_clk_freq != 0)) {
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/* calculate baud rate divisor */
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/*
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divisor = ((dev_cfg->sys_clk_freq / baud_rate) >> 4) + 1;
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* calculate baud rate divisor. a variant of
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* (u32_t)(dev_cfg->sys_clk_freq / (16.0 * baud_rate) + 0.5)
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*/
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divisor = ((dev_cfg->sys_clk_freq + (baud_rate << 3))
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/ baud_rate) >> 4;
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/* set the DLAB to access the baud rate divisor registers */
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/* set the DLAB to access the baud rate divisor registers */
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lcr_cache = INBYTE(LCR(dev));
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lcr_cache = INBYTE(LCR(dev));
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@ -327,17 +329,12 @@ static int uart_ns16550_init(struct device *dev)
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old_level = irq_lock();
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old_level = irq_lock();
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#ifdef CONFIG_SOC_ARC_IOT
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/* enbale clk for uart before write any regs */
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OUTBYTE(DLF(dev), 1);
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#endif
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set_baud_rate(dev, dev_data->baud_rate);
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#ifdef CONFIG_UART_NS16550_DLF
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#ifdef CONFIG_UART_NS16550_DLF
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set_dlf(dev, dev_data->dlf);
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set_dlf(dev, dev_data->dlf);
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#endif
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#endif
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set_baud_rate(dev, dev_data->baud_rate);
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/* 8 data bits, 1 stop bit, no parity, clear DLAB */
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/* 8 data bits, 1 stop bit, no parity, clear DLAB */
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OUTBYTE(LCR(dev), LCR_CS8 | LCR_1_STB | LCR_PDIS);
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OUTBYTE(LCR(dev), LCR_CS8 | LCR_1_STB | LCR_PDIS);
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@ -37,6 +37,9 @@ if SERIAL
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config UART_NS16550
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config UART_NS16550
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def_bool y
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def_bool y
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config UART_NS16550_DLF
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def_bool y
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endif # SERIAL
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endif # SERIAL
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if UART_CONSOLE
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if UART_CONSOLE
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@ -44,6 +47,9 @@ if UART_CONSOLE
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config UART_NS16550_PORT_0
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config UART_NS16550_PORT_0
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def_bool y
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def_bool y
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config UART_NS16550_PORT_0_DLF
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default 1
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endif # UART_CONSOLE
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endif # UART_CONSOLE
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endif #ARC_IOT
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endif #ARC_IOT
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@ -23,6 +23,7 @@
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* UART: use lr and sr to access subsystem uart IP
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* UART: use lr and sr to access subsystem uart IP
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*/
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*/
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#define UART_NS16550_ACCESS_IOPORT
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#define UART_NS16550_ACCESS_IOPORT
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#define UART_REG_ADDR_INTERVAL 4
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/* ARC EM Core IRQs */
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/* ARC EM Core IRQs */
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