drivers: uart_ns16550: remove soc specific codes and bug fixes

* remove soc specific codes
* optimize the caculation of baudrate.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
This commit is contained in:
Wayne Ren 2019-01-29 14:25:56 +08:00 committed by Anas Nashif
commit 1e392fbd0a
3 changed files with 17 additions and 13 deletions

View file

@ -193,10 +193,8 @@
#ifdef UART_NS16550_ACCESS_IOPORT #ifdef UART_NS16550_ACCESS_IOPORT
#define INBYTE(x) sys_in8(x) #define INBYTE(x) sys_in8(x)
#define OUTBYTE(x, d) sys_out8(d, x) #define OUTBYTE(x, d) sys_out8(d, x)
#ifdef CONFIG_SOC_ARC_IOT #ifndef UART_REG_ADDR_INTERVAL
#define UART_REG_ADDR_INTERVAL 4 /* address diff of adjacent regs. */ #define UART_REG_ADDR_INTERVAL 1 /* address diff of adjacent regs. */
#else
#define UART_REG_ADDR_INTERVAL 1
#endif #endif
#else #else
#define INBYTE(x) sys_read8(x) #define INBYTE(x) sys_read8(x)
@ -254,8 +252,12 @@ static void set_baud_rate(struct device *dev, u32_t baud_rate)
u8_t lcr_cache; u8_t lcr_cache;
if ((baud_rate != 0) && (dev_cfg->sys_clk_freq != 0)) { if ((baud_rate != 0) && (dev_cfg->sys_clk_freq != 0)) {
/* calculate baud rate divisor */ /*
divisor = ((dev_cfg->sys_clk_freq / baud_rate) >> 4) + 1; * calculate baud rate divisor. a variant of
* (u32_t)(dev_cfg->sys_clk_freq / (16.0 * baud_rate) + 0.5)
*/
divisor = ((dev_cfg->sys_clk_freq + (baud_rate << 3))
/ baud_rate) >> 4;
/* set the DLAB to access the baud rate divisor registers */ /* set the DLAB to access the baud rate divisor registers */
lcr_cache = INBYTE(LCR(dev)); lcr_cache = INBYTE(LCR(dev));
@ -327,17 +329,12 @@ static int uart_ns16550_init(struct device *dev)
old_level = irq_lock(); old_level = irq_lock();
#ifdef CONFIG_SOC_ARC_IOT
/* enbale clk for uart before write any regs */
OUTBYTE(DLF(dev), 1);
#endif
set_baud_rate(dev, dev_data->baud_rate);
#ifdef CONFIG_UART_NS16550_DLF #ifdef CONFIG_UART_NS16550_DLF
set_dlf(dev, dev_data->dlf); set_dlf(dev, dev_data->dlf);
#endif #endif
set_baud_rate(dev, dev_data->baud_rate);
/* 8 data bits, 1 stop bit, no parity, clear DLAB */ /* 8 data bits, 1 stop bit, no parity, clear DLAB */
OUTBYTE(LCR(dev), LCR_CS8 | LCR_1_STB | LCR_PDIS); OUTBYTE(LCR(dev), LCR_CS8 | LCR_1_STB | LCR_PDIS);

View file

@ -37,6 +37,9 @@ if SERIAL
config UART_NS16550 config UART_NS16550
def_bool y def_bool y
config UART_NS16550_DLF
def_bool y
endif # SERIAL endif # SERIAL
if UART_CONSOLE if UART_CONSOLE
@ -44,6 +47,9 @@ if UART_CONSOLE
config UART_NS16550_PORT_0 config UART_NS16550_PORT_0
def_bool y def_bool y
config UART_NS16550_PORT_0_DLF
default 1
endif # UART_CONSOLE endif # UART_CONSOLE
endif #ARC_IOT endif #ARC_IOT

View file

@ -23,6 +23,7 @@
* UART: use lr and sr to access subsystem uart IP * UART: use lr and sr to access subsystem uart IP
*/ */
#define UART_NS16550_ACCESS_IOPORT #define UART_NS16550_ACCESS_IOPORT
#define UART_REG_ADDR_INTERVAL 4
/* ARC EM Core IRQs */ /* ARC EM Core IRQs */