Xtensa port: Started port to for Xtensa cores family.

Added arch sub folder, make files and Kconfig files for a set of standard SoCs.

Change-Id: I4ee9cba966860072e55c95795d87356b665e4d49
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>

arch/Kconfig

@@ -3,6 +3,7 @@
 #
 # Copyright (c) 2014-2015 Wind River Systems, Inc.
 # Copyright (c) 2015 Intel Corporation
+# Copyright (c) 2016 Cadence Design Systems, Inc.
 #
 # SPDX-License-Identifier: Apache-2.0
 #
@@ -29,6 +30,9 @@ config NIOS2
 config RISCV32
 	bool "RISCV32 architecture"
 
+config XTENSA
+	bool "Xtensa architecture"
+
 endchoice
 
 #

arch/xtensa/Kconfig

@@ -0,0 +1,94 @@
+# Kconfig - XTENSA architecture configuration options
+
+#
+# Copyright (c) 2016 Cadence Design Systems, Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+choice
+	prompt "XTENSA core Selection"
+	default hifi3_bd5
+	depends on XTENSA
+
+source "arch/xtensa/soc/Kconfig.cores"
+endchoice
+
+menu "XTENSA Options"
+	depends on XTENSA
+
+config ARCH
+	default "xtensa"
+
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	int
+	prompt "Hardware clock cycles per second, 2000000 for ISS"
+	default 2000000
+	range 1000000 1000000000
+	help
+	This option specifies hardware clock.
+
+config XTENSA_NO_IPC
+	bool "Core has no IPC support"
+	select ATOMIC_OPERATIONS_C
+	default n
+	help
+	Uncheck this if you core does not implment "SCOMPARE1" register and "s32c1i"
+	isntruction.
+
+config SW_ISR_TABLE
+	bool
+	prompt "Enable software interrupt handler table"
+	default y
+	help
+	Enable an interrupt handler table implemented in software. This
+	table, unlike ISRs connected directly in the vector table, allow
+	a parameter to be passed to the interrupt handlers. Also, invoking
+	the exeception/interrupt exit stub is automatically done.
+	This has to be enabled for dynamically connecting interrupt handlers
+	at runtime (SW_ISR_TABLE_DYNAMIC).
+
+config IRQ_OFFLOAD
+	bool "Enable IRQ offload"
+	default n
+	help
+	Enable irq_offload() API which allows functions to be synchronously
+	run in interrupt context. Uses one entry in the IDT.  Mainly useful
+	for test cases.
+
+config SW_ISR_TABLE_DYNAMIC
+	bool
+	prompt "Allow installing interrupt handlers at runtime"
+	depends on SW_ISR_TABLE
+	default n
+	help
+	This option enables irq_connect_dynamic(). It moves the ISR table to
+	SRAM so that it is writable. This has the side-effect of removing
+	write-protection on the ISR table.
+
+menu "Specific core configuration"
+
+config IRQ_OFFLOAD_INTNUM
+	int
+	prompt "IRQ offload SW interrupt index"
+	help
+	 The index of the software interrupt to be used for IRQ offload.
+
+	 Please note that in order for IRQ offload to work correctly the selected
+	 interrupt shall have its priority shall not exceed XCHAL_EXCM_LEVEL.
+
+source "arch/xtensa/soc/*/Kconfig"
+
+endmenu
+
+endmenu

arch/xtensa/Makefile

@@ -0,0 +1,43 @@
+SOC_PATH=${XTENSA_CORE}
+export SOC_PATH
+
+# Include XCC standard libraries so that users used ot Xplorer IDE can port
+# their code easily
+XT_LIB_PATH=-L${XTENSA_BUILD}/xtensa-elf/lib/xcc \
+            -L${XTENSA_BUILD}/xtensa-elf/lib \
+            -L${XTENSA_BUILD}/xtensa-elf/arch/lib
+export XT_LIB_PATH
+
+XTENSA_INCLUDE=-I$(XTENSA_TOOLS_PATH)/lib/xcc/include \
+               -I$(XTENSA_TOOLS_PATH)/xtensa-elf/include \
+               -I${XTENSA_BUILD}/xtensa-elf/arch/include \
+               -I${XTENSA_BUILD}/xtensa-elf/include
+
+flagBoardType=
+ifeq ($(CONFIG_BOARD_XTENSA),y)
+flagBoardType= -DXT_BOARD
+endif
+ifeq ($(CONFIG_SIMULATOR_XTENSA),y)
+flagBoardType= -DXT_SIMULATOR
+endif
+
+flagLongCall=
+flagALongCall=
+ifeq ($(CONFIG_LONG_CALL),y)
+flagLongCall=-mlongcalls
+flagALongCall=--longcalls
+endif
+
+# Remove compilation flags added by top makefile and which are not supported by xcc and enable.
+KBUILD_CFLAGS := $(filter-out -fno-asynchronous-unwind-tables -fno-omit-frame-pointer,${KBUILD_CFLAGS})
+# Add Xtensa pecific flags
+KBUILD_AFLAGS += -c -xassembler-with-cpp $(XTENSA_INCLUDE) $(flagBoardType) $(flagALongCall)
+KBUILD_CFLAGS += $(XTENSA_INCLUDE) -DPROC_$(XTENSA_CORE) -DCONFIG_$(XTENSA_CORE) -c $(flagLongCall) -nostdinc $(flagBoardType) $(call cc-option,-ffunction-sections,) $(call cc-option,-fdata-sections,) $(call cc-option,-fms-extensions,)
+
+include $(srctree)/arch/$(ARCH)/core/Makefile
+include $(srctree)/arch/$(ARCH)/soc/$(SOC_PATH)/Makefile
+
+cflags-$(CONFIG_LTO) += $(call cc-option,-flto,)
+
+KBUILD_CFLAGS += $(cflags-y)
+KBUILD_CXXFLAGS += $(cflags-y)

arch/xtensa/core/Makefile

@@ -0,0 +1,18 @@
+ccflags-y += -I$(srctree)/kernel/unified/include
+asflags-y += -I$(srctree)/kernel/unified/include
+
+ifdef CONFIG_ATOMIC_OPERATIONS_C
+# Use C routines from kernel/nanokernel/atomic.c
+obj-atomic=
+else
+# Use our own routines implmented in assembly
+obj-atomic=atomic.o
+endif
+obj-y = ${obj-atomic} cpu_idle.o fatal.o \
+	swap.o thread.o xt_zephyr.o	xtensa_context.o xtensa_intr_asm.o \
+	xtensa_intr.o xtensa_overlay_os_hook.o xtensa_vectors.o irq_manage.o
+obj-$(CONFIG_IRQ_OFFLOAD) += irq_offload.o
+obj-$(CONFIG_SIMULATOR_XTENSA) += crt1-sim.o
+obj-$(CONFIG_BOARD_XTENSA) += crt1-boards.o
+# Keep this last so that vague linking works
+obj-y += sw_isr_table.o

arch/xtensa/core/offsets/Makefile

@@ -0,0 +1 @@
+obj-y = offsets.o

arch/xtensa/core/startup/Makefile

@@ -0,0 +1,2 @@
+asflags-y := -c -xassembler-with-cpp $(XTENSA_INCLUDE) $(flagBoardType) $(flagALongCall) -mtext-section-literals
+obj-y = reset-vector.o

arch/xtensa/soc/D_108mini/Kconfig

@@ -0,0 +1,24 @@
+# Kconfig - XTENSA board configuration
+#
+# Copyright (c) 2016 Open-RnD Sp. z o.o.
+# Copyright (c) 2016 Cadence Design Systems, Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if D_108mini
+
+config IRQ_OFFLOAD_INTNUM
+	default 7
+
+endif

arch/xtensa/soc/D_108mini/Makefile

@@ -0,0 +1 @@
+obj-y = soc.o

arch/xtensa/soc/D_212GP/Kconfig

@@ -0,0 +1,24 @@
+# Kconfig - XTENSA board configuration
+#
+# Copyright (c) 2016 Open-RnD Sp. z o.o.
+# Copyright (c) 2016 Cadence Design Systems, Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if D_212GP
+
+config IRQ_OFFLOAD_INTNUM
+	default 7
+
+endif

arch/xtensa/soc/D_212GP/Makefile

@@ -0,0 +1 @@
+obj-y = soc.o

arch/xtensa/soc/D_233L/Kconfig

@@ -0,0 +1,24 @@
+# Kconfig - XTENSA board configuration
+#
+# Copyright (c) 2016 Open-RnD Sp. z o.o.
+# Copyright (c) 2016 Cadence Design Systems, Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if D_233L
+
+config IRQ_OFFLOAD_INTNUM
+	default 7
+
+endif

arch/xtensa/soc/D_233L/Makefile

@@ -0,0 +1 @@
+obj-y = soc.o

arch/xtensa/soc/Kconfig.cores

@@ -0,0 +1,75 @@
+# Kconfig - XTENSA supported cores
+
+#
+# Copyright (c) 2016 Cadence Design Systems, Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+config cpsw4irq
+	bool "cpsw4irq core"
+
+config sample_controller
+	bool "sample_controller core"
+
+config sample_flix
+	bool "sample_flix core"
+
+config hifi3_bd5
+	bool "hifi3_bd5 core"
+
+config hifi3_bd5_call0
+	bool "hifi3_bd5_call0 (hifi3_bd5 core with call0 ABI and 3 additional SW IRQs)"
+
+config tie_dev2
+	bool "tie_dev2 core"
+
+config XRC_FUSION_AON_ALL_LM
+	bool "XRC_FUSION_AON_ALL_LM core"
+
+config tie_dev1
+	bool "tie_dev1 core"
+
+config sample_config
+	bool "sample_config core"
+
+config hifiep_bd5
+	bool "hifiep_bd5 core"
+
+config D_108mini
+	bool "D_108mini core"
+
+config D_212GP
+	bool "D_212GP core"
+
+config D_233L
+	bool "D_233L core"
+
+config hifi_mini
+	bool "hifi_mini core"
+
+config hifi_mini_4swIrq
+	bool "hifi_mini_4swIrq (hifi_mini core with 4 additional SW IRQs)"
+
+config hifi2_std
+	bool "hifi2_std core"
+
+config XRC_D2PM
+	bool "XRC_D2PM core"
+
+config XRC_D2PM_5swIrq
+	bool "XRC_D2PM_5swIrq (XRC_D2PM core with 4 additional SW IRQs)"
+
+config hifi4_bd7
+	bool "hifi4_bd7 core"
+

arch/xtensa/soc/XRC_D2PM/Kconfig

@@ -0,0 +1,24 @@
+# Kconfig - XTENSA board configuration
+#
+# Copyright (c) 2016 Open-RnD Sp. z o.o.
+# Copyright (c) 2016 Cadence Design Systems, Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if XRC_D2PM
+
+config IRQ_OFFLOAD_INTNUM
+	default 11
+
+endif

arch/xtensa/soc/XRC_D2PM/Makefile

@@ -0,0 +1 @@
+obj-y = soc.o

arch/xtensa/soc/XRC_D2PM_5swIrq/Kconfig

@@ -0,0 +1,24 @@
+# Kconfig - XTENSA board configuration
+#
+# Copyright (c) 2016 Open-RnD Sp. z o.o.
+# Copyright (c) 2016 Cadence Design Systems, Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if XRC_D2PM_5swIrq
+
+config IRQ_OFFLOAD_INTNUM
+	default 22
+
+endif

arch/xtensa/soc/XRC_D2PM_5swIrq/Makefile

@@ -0,0 +1 @@
+obj-y = soc.o

arch/xtensa/soc/XRC_FUSION_AON_ALL_LM/Kconfig

@@ -0,0 +1,24 @@
+# Kconfig - XTENSA board configuration
+#
+# Copyright (c) 2016 Open-RnD Sp. z o.o.
+# Copyright (c) 2016 Cadence Design Systems, Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if XRC_FUSION_AON_ALL_LM
+
+config IRQ_OFFLOAD_INTNUM
+	default 13
+
+endif

arch/xtensa/soc/XRC_FUSION_AON_ALL_LM/Makefile

@@ -0,0 +1 @@
+obj-y = soc.o

arch/xtensa/soc/hifi2_std/Kconfig

@@ -0,0 +1,24 @@
+# Kconfig - XTENSA board configuration
+#
+# Copyright (c) 2016 Open-RnD Sp. z o.o.
+# Copyright (c) 2016 Cadence Design Systems, Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if hifi2_std
+
+config IRQ_OFFLOAD_INTNUM
+	default 7
+
+endif

arch/xtensa/soc/hifi2_std/Makefile

@@ -0,0 +1 @@
+obj-y = soc.o

arch/xtensa/soc/hifi3_bd5/Kconfig

@@ -0,0 +1,24 @@
+# Kconfig - XTENSA board configuration
+#
+# Copyright (c) 2016 Open-RnD Sp. z o.o.
+# Copyright (c) 2016 Cadence Design Systems, Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if hifi3_bd5
+
+config IRQ_OFFLOAD_INTNUM
+	default 13
+
+endif

arch/xtensa/soc/hifi3_bd5/Makefile

@@ -0,0 +1 @@
+obj-y = soc.o

arch/xtensa/soc/hifi3_bd5_call0/Kconfig

@@ -0,0 +1,24 @@
+# Kconfig - XTENSA board configuration
+#
+# Copyright (c) 2016 Open-RnD Sp. z o.o.
+# Copyright (c) 2016 Cadence Design Systems, Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if hifi3_bd5_call0
+
+config IRQ_OFFLOAD_INTNUM
+	default 13
+
+endif

arch/xtensa/soc/hifi3_bd5_call0/Makefile

@@ -0,0 +1 @@
+obj-y = soc.o

arch/xtensa/soc/hifi4_bd7/Kconfig

@@ -0,0 +1,24 @@
+# Kconfig - XTENSA board configuration
+#
+# Copyright (c) 2016 Open-RnD Sp. z o.o.
+# Copyright (c) 2016 Cadence Design Systems, Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if hifi4_bd7
+
+config IRQ_OFFLOAD_INTNUM
+	default 4
+
+endif

arch/xtensa/soc/hifi4_bd7/Makefile

@@ -0,0 +1 @@
+obj-y = soc.o

arch/xtensa/soc/hifi_mini/Kconfig

@@ -0,0 +1,24 @@
+# Kconfig - XTENSA board configuration
+#
+# Copyright (c) 2016 Open-RnD Sp. z o.o.
+# Copyright (c) 2016 Cadence Design Systems, Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if hifi_mini
+
+config IRQ_OFFLOAD_INTNUM
+	default 13
+
+endif

arch/xtensa/soc/hifi_mini/Makefile

@@ -0,0 +1 @@
+obj-y = soc.o

arch/xtensa/soc/hifi_mini_4swIrq/Kconfig

@@ -0,0 +1,24 @@
+# Kconfig - XTENSA board configuration
+#
+# Copyright (c) 2016 Open-RnD Sp. z o.o.
+# Copyright (c) 2016 Cadence Design Systems, Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if hifi_mini_4swIrq
+
+config IRQ_OFFLOAD_INTNUM
+	default 1
+
+endif

arch/xtensa/soc/hifi_mini_4swIrq/Makefile

@@ -0,0 +1 @@
+obj-y = soc.o