boards: nxp: frdm_ke15z: Add board support for ke15z
Added initial board support for the frdm_ke15z board. Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com> Signed-off-by: Pavel Krenek <pavel.krenek@nxp.com>
This commit is contained in:
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10 changed files with 357 additions and 0 deletions
6
boards/nxp/frdm_ke15z/Kconfig.frdm_ke15z
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6
boards/nxp/frdm_ke15z/Kconfig.frdm_ke15z
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# Copyright 2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_FRDM_KE15Z
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select SOC_MKE15Z7
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select SOC_PART_NUMBER_MKE15Z256VLL7
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11
boards/nxp/frdm_ke15z/board.cmake
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boards/nxp/frdm_ke15z/board.cmake
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#
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# Copyright 2024 NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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board_runner_args(linkserver "--device=MKE15Z256xxx7:FRDM-KE15Z")
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board_runner_args(jlink "--device=MKE15Z256xxx7" "--reset-after-load")
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include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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5
boards/nxp/frdm_ke15z/board.yml
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boards/nxp/frdm_ke15z/board.yml
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board:
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name: frdm_ke15z
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vendor: nxp
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socs:
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- name: mke15z7
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BIN
boards/nxp/frdm_ke15z/doc/frdm_ke15z.webp
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BIN
boards/nxp/frdm_ke15z/doc/frdm_ke15z.webp
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Binary file not shown.
After Width: | Height: | Size: 10 KiB |
187
boards/nxp/frdm_ke15z/doc/index.rst
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187
boards/nxp/frdm_ke15z/doc/index.rst
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.. _frdm_ke15z:
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NXP FRDM-KE15Z
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##############
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Overview
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********
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The FRDM-KE15Z is a development board for NXP Kinetis KE1xZ 32-bit
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MCU-based platforms. The FRDM-KE15Z contains a robust TSI module
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with up to 50 channels which makes this board highly flexible
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for touch keys. Offers options for serial
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communication, flash programming, and run-control debugging.
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.. figure:: frdm_ke15z.webp
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:align: center
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:alt: FRDM-KE15Z
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Hardware
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********
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- MKE15Z256VLL7 MCU (up to 72 MHz, 256 KB flash memory, 32 KB RAM)
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- OpenSDA Debug Circuit with a virtual serial port
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- Touch electrodes in the self-capacitive mode
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- Compatible with FRDM-TOUCH, FRDM-MC-LVBLDC, and Arduino® boards
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- User Components such as Reset; RGB LED and two user buttons
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- 6-axis FXOS8700CQ digital accelerometer and magnetometer
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For more information about the KE1xZ SoC and the FRDM-KE15Z board, see
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these NXP reference documents:
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- `KE1XZ SOC Website`_
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- `FRDM-KE15Z Datasheet`_
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- `FRDM-KE15Z Reference Manual`_
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- `FRDM-KE15Z Website`_
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- `FRDM-KE15Z User Guide`_
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- `FRDM-KE15Z Schematics`_
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Supported Features
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==================
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The frdm_ke15z board configuration supports the following hardware
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features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | uart polling; |
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| | | uart interrupt |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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:zephyr_file:`boards/nxp/frdm_ke15z/frdm_ke15z_defconfig`.
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Other hardware features are not currently supported by the port.
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System Clock
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============
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The KE15 SoC is configured to run at 48 MHz using the FIRC.
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Serial Port
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===========
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The KE15 SoC has three UARTs. UART1 is configured for the console.
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Programming and Debugging
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*************************
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Build and flash applications as usual (see :ref:`build_an_application` and
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:ref:`application_run` for more details).
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Configuring a Debug Probe
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=========================
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A debug probe is used for both flashing and debugging the board. This board is
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configured by default to use Linkserver.
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Early versions of this board have an outdated version of the OpenSDA bootloader
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and require an update. Please see the `DAPLink Bootloader Update`_ page for
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instructions to update from the CMSIS-DAP bootloader to the DAPLink bootloader.
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Option 1: Linkserver
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-------------------------------------------------------
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Install the :ref:`linkserver-debug-host-tools` and make sure they are in your
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search path. LinkServer works with the default CMSIS-DAP firmware included in
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the on-board debugger.
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Linkserver is the default for this board, ``west flash`` and ``west debug`` will
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call the linkserver runner.
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Option 2: :ref:`opensda-jlink-onboard-debug-probe`
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--------------------------------------------------
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Install the :ref:`jlink-debug-host-tools` and make sure they are in your search
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path.
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Follow the instructions in :ref:`opensda-jlink-onboard-debug-probe` to program
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the `OpenSDA J-Link Firmware for FRDM-KE15Z`_.
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Use the ``-r jlink`` option with west to use the jlink runner.
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.. code-block:: console
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west flash -r jlink
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Configuring a Console
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=====================
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Regardless of your choice in debug probe, we will use the OpenSDA
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microcontroller as a usb-to-serial adapter for the serial console.
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Connect a USB cable from your PC to J5.
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Use the following settings with your serial terminal of choice (minicom, putty,
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etc.):
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- Speed: 115200
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- Data: 8 bits
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- Parity: None
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- Stop bits: 1
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Flashing
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========
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Here is an example for the :ref:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: frdm_ke15z
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:goals: flash
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Open a serial terminal, reset the board (press the SW1 button), and you should
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see the following message in the terminal:
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.. code-block:: console
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*** Booting Zephyr OS build v3.6.0-3478-gb923667860b1 ***
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Hello World! frdm_ke15z/mke15z7
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Debugging
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=========
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Here is an example for the :ref:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: frdm_ke15z
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:goals: debug
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Open a serial terminal, step through the application in your debugger, and you
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should see the following message in the terminal:
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.. code-block:: console
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***** Booting Zephyr OS v3.6.0-xxx-gxxxxxxxxxxxx *****
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Hello World! frdm_ke15z
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.. _KE1XZ SoC Website:
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https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/ke-series-arm-cortex-m4-m0-plus/ke1xz-arm-cortex-m0-plus-5v-main-stream-mcu-with-nxp-touch-and-can-control:KE1xZ
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.. _FRDM-KE15Z Datasheet:
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https://www.nxp.com/docs/en/data-sheet/KE1xZP100M72SF0.pdf
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.. _FRDM-KE15Z Reference Manual:
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https://www.nxp.com/webapp/Download?colCode=KE1XZP100M72SF0RM
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.. _FRDM-KE15Z Website:
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https://www.nxp.com/design/design-center/development-boards-and-designs/general-purpose-mcus/freedom-development-platform-for-kinetis-ke1xmcus:FRDM-KE15Z
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.. _FRDM-KE15Z User Guide:
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https://www.nxp.com/document/guide/get-started-with-the-frdm-ke15z:NGS-FRDM-KE15Z
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.. _FRDM-KE15Z Schematics:
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https://www.nxp.com/webapp/Download?colCode=FRDM-KE15Z-SCH-DESIGNFILES
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.. _DAPLink Bootloader Update:
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https://os.mbed.com/blog/entry/DAPLink-bootloader-update/
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.. _OpenSDA J-Link Firmware for FRDM-KE15Z:
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https://www.segger.com/downloads/jlink/OpenSDA_FRDM-KE15Z
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17
boards/nxp/frdm_ke15z/frdm_ke15z-pinctrl.dtsi
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boards/nxp/frdm_ke15z/frdm_ke15z-pinctrl.dtsi
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/*
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* Copyright 2024 NXP
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <nxp/kinetis/MKE15Z256VLL7-pinctrl.h>
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&pinctrl {
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lpuart1_default: lpuart1_default {
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group0 {
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pinmux = <LPUART1_RX_PTC6>,
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<LPUART1_TX_PTC7>;
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drive-strength = "low";
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slew-rate = "slow";
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};
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};
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};
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76
boards/nxp/frdm_ke15z/frdm_ke15z.dts
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boards/nxp/frdm_ke15z/frdm_ke15z.dts
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/*
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nxp/nxp_ke1xz.dtsi>
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#include "frdm_ke15z-pinctrl.dtsi"
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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model = "NXP Freedom KE15Z board";
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compatible = "nxp,ke15z", "nxp,mke15z7";
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aliases {
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led0 = &green_led;
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led1 = &blue_led;
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led2 = &red_led;
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sw0 = &user_button_0;
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sw1 = &user_button_1;
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};
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chosen {
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zephyr,sram = &sram_u;
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zephyr,flash = &flash0;
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zephyr,console = &lpuart1;
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zephyr,shell-uart = &lpuart1;
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};
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leds {
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compatible = "gpio-leds";
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red_led: led_0 {
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gpios = <&gpiod 0 GPIO_ACTIVE_LOW>;
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label = "RED LED";
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};
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green_led: led_1 {
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gpios = <&gpiod 16 GPIO_ACTIVE_LOW>;
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label = "GREEN LED";
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};
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blue_led: led_2 {
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gpios = <&gpiod 15 GPIO_ACTIVE_LOW>;
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label = "BLUE LED";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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user_button_0: button_0 {
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label = "User SW3";
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gpios = <&gpiod 3 GPIO_ACTIVE_LOW>;
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zephyr,code = <INPUT_KEY_0>;
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};
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user_button_1: button_1 {
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label = "User SW2";
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gpios = <&gpiob 11 GPIO_ACTIVE_LOW>;
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zephyr,code = <INPUT_KEY_1>;
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};
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};
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};
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&lpuart1 {
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&lpuart1_default>;
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pinctrl-names = "default";
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};
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&gpiob {
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status = "okay";
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};
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&gpiod {
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status = "okay";
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};
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13
boards/nxp/frdm_ke15z/frdm_ke15z.yaml
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13
boards/nxp/frdm_ke15z/frdm_ke15z.yaml
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identifier: frdm_ke15z
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name: NXP FRDM-KE15Z
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type: mcu
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arch: arm
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toolchain:
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- zephyr
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- gnuarmemb
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- xtools
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flash: 256
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ram: 24
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supported:
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- gpio
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- uart
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17
boards/nxp/frdm_ke15z/frdm_ke15z_defconfig
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17
boards/nxp/frdm_ke15z/frdm_ke15z_defconfig
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SERIAL=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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# Enable console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# GPIO Controller
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CONFIG_GPIO=y
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# Clock Control
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CONFIG_CLOCK_CONTROL=y
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# Enable pin controller
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CONFIG_PINCTRL=y
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@ -1,5 +1,6 @@
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/*
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/*
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* Copyright (c) 2019-2021 Vestas Wind Systems A/S
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* Copyright (c) 2019-2021 Vestas Wind Systems A/S
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* Copyright 2024 NXP
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*
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*
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* Based on clock_control_mcux_sim.c, which is:
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* Based on clock_control_mcux_sim.c, which is:
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* Copyright (c) 2017, NXP
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* Copyright (c) 2017, NXP
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@ -60,33 +61,57 @@ static int mcux_scg_get_rate(const struct device *dev,
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case KINETIS_SCG_FIRC_CLK:
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case KINETIS_SCG_FIRC_CLK:
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clock_name = kCLOCK_ScgFircClk;
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clock_name = kCLOCK_ScgFircClk;
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break;
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break;
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#if (defined(FSL_FEATURE_SCG_HAS_SPLL) && FSL_FEATURE_SCG_HAS_SPLL)
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case KINETIS_SCG_SPLL_CLK:
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case KINETIS_SCG_SPLL_CLK:
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clock_name = kCLOCK_ScgSysPllClk;
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clock_name = kCLOCK_ScgSysPllClk;
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break;
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break;
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#endif /* (defined(FSL_FEATURE_SCG_HAS_SPLL) && FSL_FEATURE_SCG_HAS_SPLL) */
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#if (defined(FSL_FEATURE_SCG_HAS_LPFLL) && FSL_FEATURE_SCG_HAS_LPFLL)
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case KINETIS_SCG_SPLL_CLK:
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clock_name = kCLOCK_ScgLpFllClk;
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||||||
|
break;
|
||||||
|
#endif /* (defined(FSL_FEATURE_SCG_HAS_LPFLL) && FSL_FEATURE_SCG_HAS_LPFLL) */
|
||||||
|
#if (defined(FSL_FEATURE_SCG_HAS_SOSCDIV1) && FSL_FEATURE_SCG_HAS_SOSCDIV1)
|
||||||
case KINETIS_SCG_SOSC_ASYNC_DIV1_CLK:
|
case KINETIS_SCG_SOSC_ASYNC_DIV1_CLK:
|
||||||
clock_name = kCLOCK_ScgSysOscAsyncDiv1Clk;
|
clock_name = kCLOCK_ScgSysOscAsyncDiv1Clk;
|
||||||
break;
|
break;
|
||||||
|
#endif /* (defined(FSL_FEATURE_SCG_HAS_SOSCDIV1) && FSL_FEATURE_SCG_HAS_SOSCDIV1) */
|
||||||
case KINETIS_SCG_SOSC_ASYNC_DIV2_CLK:
|
case KINETIS_SCG_SOSC_ASYNC_DIV2_CLK:
|
||||||
clock_name = kCLOCK_ScgSysOscAsyncDiv2Clk;
|
clock_name = kCLOCK_ScgSysOscAsyncDiv2Clk;
|
||||||
break;
|
break;
|
||||||
|
#if (defined(FSL_FEATURE_SCG_HAS_SIRCDIV1) && FSL_FEATURE_SCG_HAS_SIRCDIV1)
|
||||||
case KINETIS_SCG_SIRC_ASYNC_DIV1_CLK:
|
case KINETIS_SCG_SIRC_ASYNC_DIV1_CLK:
|
||||||
clock_name = kCLOCK_ScgSircAsyncDiv1Clk;
|
clock_name = kCLOCK_ScgSircAsyncDiv1Clk;
|
||||||
break;
|
break;
|
||||||
|
#endif /* (defined(FSL_FEATURE_SCG_HAS_SIRCDIV1) && FSL_FEATURE_SCG_HAS_SIRCDIV1) */
|
||||||
case KINETIS_SCG_SIRC_ASYNC_DIV2_CLK:
|
case KINETIS_SCG_SIRC_ASYNC_DIV2_CLK:
|
||||||
clock_name = kCLOCK_ScgSircAsyncDiv2Clk;
|
clock_name = kCLOCK_ScgSircAsyncDiv2Clk;
|
||||||
break;
|
break;
|
||||||
|
#if (defined(FSL_FEATURE_FSL_FEATURE_SCG_HAS_FIRCDIV1) && FSL_FEATURE_SCG_HAS_FIRCDIV1)
|
||||||
case KINETIS_SCG_FIRC_ASYNC_DIV1_CLK:
|
case KINETIS_SCG_FIRC_ASYNC_DIV1_CLK:
|
||||||
clock_name = kCLOCK_ScgFircAsyncDiv1Clk;
|
clock_name = kCLOCK_ScgFircAsyncDiv1Clk;
|
||||||
break;
|
break;
|
||||||
|
#endif /* (defined(FSL_FEATURE_FSL_FEATURE_SCG_HAS_FIRCDIV1) && FSL_FEATURE_SCG_HAS_FIRCDIV1) */
|
||||||
case KINETIS_SCG_FIRC_ASYNC_DIV2_CLK:
|
case KINETIS_SCG_FIRC_ASYNC_DIV2_CLK:
|
||||||
clock_name = kCLOCK_ScgFircAsyncDiv2Clk;
|
clock_name = kCLOCK_ScgFircAsyncDiv2Clk;
|
||||||
break;
|
break;
|
||||||
|
#if (defined(FSL_FEATURE_SCG_HAS_SPLLDIV1) && FSL_FEATURE_SCG_HAS_SPLLDIV1)
|
||||||
case KINETIS_SCG_SPLL_ASYNC_DIV1_CLK:
|
case KINETIS_SCG_SPLL_ASYNC_DIV1_CLK:
|
||||||
clock_name = kCLOCK_ScgSysPllAsyncDiv1Clk;
|
clock_name = kCLOCK_ScgSysPllAsyncDiv1Clk;
|
||||||
break;
|
break;
|
||||||
|
#endif /* (defined(FSL_FEATURE_SCG_HAS_SPLLDIV1) && FSL_FEATURE_SCG_HAS_SPLLDIV1) */
|
||||||
|
#if (defined(FSL_FEATURE_SCG_HAS_SPLL) && FSL_FEATURE_SCG_HAS_SPLL)
|
||||||
case KINETIS_SCG_SPLL_ASYNC_DIV2_CLK:
|
case KINETIS_SCG_SPLL_ASYNC_DIV2_CLK:
|
||||||
clock_name = kCLOCK_ScgSysPllAsyncDiv2Clk;
|
clock_name = kCLOCK_ScgSysPllAsyncDiv2Clk;
|
||||||
break;
|
break;
|
||||||
|
#endif /* (defined(FSL_FEATURE_SCG_HAS_SPLL) && FSL_FEATURE_SCG_HAS_SPLL) */
|
||||||
|
#if (defined(FSL_FEATURE_SCG_HAS_FLLDIV1) && FSL_FEATURE_SCG_HAS_FLLDIV1)
|
||||||
|
case KINETIS_SCG_LPFLL_ASYNC_DIV2_CLK:
|
||||||
|
clock_name = kCLOCK_ScgSysLPFllAsyncDiv2Clk;
|
||||||
|
break;
|
||||||
|
#endif /* (defined(FSL_FEATURE_SCG_HAS_FLLDIV1) && FSL_FEATURE_SCG_HAS_FLLDIV1) */
|
||||||
|
|
||||||
|
|
||||||
default:
|
default:
|
||||||
LOG_ERR("Unsupported clock name");
|
LOG_ERR("Unsupported clock name");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue