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st_stm32/stm32f1: introduce STM32F1x SoC family

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The patch introduces a new family of SoCs based on STMicroelectronics'
STM32 MCU line. The patch introduces a basic arch/arm/soc layout along
with configuration of 2 MCUs from STM32F1 series: STM32F103VE and
STM32F103RB.

The patch assumes that other MCUs from STM32 family will be included
under arch/arm/soc/st_stm32 tree, to achieve the following layout:

arch/
  arm/
    soc/
      st_stm32/
        stm32f0/
        stm32f1/
        stm32f2/
        ...
        stm32l0/

Most of the configuration within a single MCU family (ex. STM32F1) is
shared, however individual MCUs differ with respect to SRAM size, flash
size or the number of available peripherals. The patch assumes that per
MCU line Kconfig.soc.family file should introduce basic setup for given
series. This can be further tuned by per MCU files, with
Kconfig.soc.stm32f103rb and Kconfig.soc.stm32f103ve as examples.

Each family defines a configuration option, ex. CONFIG_STM32F10X, while
individual MCUs define a corresponding per MCU config options,
ex. CONFIG_STM32F103VE.

From the menuconfig perspective, the user is presented with a family
selection under General Platform Configuration/SoC Selection.  A
specific MCU model can be selected by accessing General Platform
Configuration/STM32F1x MCU Selection, with the default entry being
selected by the board configuration.

Change-Id: I22e4defd4a08ed1b2e2cad0e214b34f565e08831
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
This commit is contained in:
Maciek Borzecki 2016-03-03 15:32:21 +01:00 • committed by Gerrit Code Review
commit 1c78f3d39b
11 changed files with 354 additions and 0 deletions
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66
arch/arm/soc/st_stm32/stm32f1/soc.c Normal file
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/*
* Copyright (c) 2016 Open-RnD Sp. z o.o.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file
* @brief System/hardware module for STM32F1 processor
*/
#include <nanokernel.h>
#include <device.h>
#include <init.h>
#include <soc.h>
#include <arch/cpu.h>
/**
* @brief Perform basic hardware initialization at boot.
*
* This needs to be run from the very beginning.
* So the init priority has to be 0 (zero).
*
* @return 0
*/
static int stm32f1_init(struct device *arg)
{
uint32_t key;
ARG_UNUSED(arg);
key = irq_lock();
/* Setup the vector table offset register (VTOR),
* which is located at the beginning of flash area.
*/
_scs_relocate_vector_table((void *)CONFIG_FLASH_BASE_ADDRESS);
/* Clear all faults */
_ScbMemFaultAllFaultsReset();
_ScbBusFaultAllFaultsReset();
_ScbUsageFaultAllFaultsReset();
_ScbHardFaultAllFaultsReset();
/* Install default handler that simply resets the CPU
* if configured in the kernel, NOP otherwise
*/
NMI_INIT();
irq_unlock(key);
return 0;
}
SYS_INIT(stm32f1_init, PRIMARY, 0);