usb: it82xx2: fix issue with the unexpected setting of the ready bit
In the IT82xx2 chip, the ready bit is automatically cleared by hardware. When setting other bits, there is a chance that the ready bit hasn't been cleared yet, leading to unexpected USB transactions. This change ensures that the ready bit is always set to '0' when setting the endpoint control value. Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
This commit is contained in:
Ren Chen
Fabio Baltieri
parent
d410231c7c
commit
1c769c342b
1 changed files with 58 additions and 40 deletions
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@ -81,8 +81,12 @@ enum it82xx2_transaction_types {
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#define DC_CONNECT_TO_HOST BIT(6) /* internal pull-up */
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/* ENDPOINT[3..0]_CONTROL_REG */
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#define ENDPOINT_EN BIT(0)
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#define EP_SEND_STALL BIT(3)
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#define ENDPOINT_ENABLE_BIT BIT(0)
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#define ENDPOINT_READY_BIT BIT(1)
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#define ENDPOINT_OUTDATA_SEQ_BIT BIT(2)
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#define ENDPOINT_SEND_STALL_BIT BIT(3)
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#define ENDPOINT_ISO_ENABLE_BIT BIT(4)
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#define ENDPOINT_DIRECTION_BIT BIT(5)
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enum it82xx2_ep_status {
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EP_INIT = 0,
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@ -417,14 +421,11 @@ static int it82xx2_usb_extend_ep_ctrl(uint8_t ep, enum it82xx2_ep_ctrl ctrl, boo
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}
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break;
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case EP_READY_ENABLE:
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unsigned int key;
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int idx = ((ep_idx - 4) % 3) + 1;
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key = irq_lock();
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(enable) ? (ext_ctrl[idx].epn_ext_ctrl2 |= BIT((ep_idx - 4) / 3))
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: (ext_ctrl[idx].epn_ext_ctrl2 &= ~BIT((ep_idx - 4) / 3));
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ep_regs[ep_fifo].ep_ctrl.fields.ready_bit = enable;
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irq_unlock(key);
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break;
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default:
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LOG_ERR("Unknown control type 0x%x", ctrl);
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@ -438,51 +439,72 @@ static int it82xx2_usb_ep_ctrl(uint8_t ep, enum it82xx2_ep_ctrl ctrl, bool enabl
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{
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struct usb_it82xx2_regs *const usb_regs = it82xx2_get_usb_regs();
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struct it82xx2_usb_ep_regs *ep_regs = usb_regs->usb_ep_regs;
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uint8_t ep_ctrl_value;
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uint8_t ep_idx = USB_EP_GET_IDX(ep);
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if (IT8XXX2_IS_EXTEND_ENDPOINT(ep_idx)) {
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return -EINVAL;
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}
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ep_ctrl_value = ep_regs[ep_idx].ep_ctrl.value & ~ENDPOINT_READY_BIT;
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switch (ctrl) {
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case EP_IN_DIRECTION_SET:
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ep_regs[ep_idx].ep_ctrl.fields.direction_bit = enable;
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if (enable) {
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ep_ctrl_value |= ENDPOINT_DIRECTION_BIT;
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} else {
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ep_ctrl_value &= ~ENDPOINT_DIRECTION_BIT;
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}
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break;
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case EP_STALL_SEND:
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ep_regs[ep_idx].ep_ctrl.fields.send_stall_bit = enable;
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if (enable) {
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ep_ctrl_value |= ENDPOINT_SEND_STALL_BIT;
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} else {
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ep_ctrl_value &= ~ENDPOINT_SEND_STALL_BIT;
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}
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break;
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case EP_STALL_CHECK:
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return ep_regs[ep_idx].ep_ctrl.fields.send_stall_bit;
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case EP_IOS_ENABLE:
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ep_regs[ep_idx].ep_ctrl.fields.iso_enable_bit = enable;
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if (enable) {
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ep_ctrl_value |= ENDPOINT_ISO_ENABLE_BIT;
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} else {
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ep_ctrl_value &= ~ENDPOINT_ISO_ENABLE_BIT;
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}
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break;
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case EP_ENABLE:
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ep_regs[ep_idx].ep_ctrl.fields.enable_bit = enable;
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if (enable) {
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ep_ctrl_value |= ENDPOINT_ENABLE_BIT;
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} else {
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ep_ctrl_value &= ~ENDPOINT_ENABLE_BIT;
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}
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break;
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case EP_READY_ENABLE:
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unsigned int key;
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key = irq_lock();
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ep_regs[ep_idx].ep_ctrl.fields.ready_bit = enable;
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irq_unlock(key);
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if (enable) {
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ep_ctrl_value |= ENDPOINT_READY_BIT;
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} else {
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ep_ctrl_value &= ~ENDPOINT_READY_BIT;
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}
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break;
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case EP_DATA_SEQ_1:
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ep_regs[ep_idx].ep_ctrl.fields.outdata_sequence_bit = enable;
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if (enable) {
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ep_ctrl_value |= ENDPOINT_OUTDATA_SEQ_BIT;
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} else {
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ep_ctrl_value &= ~ENDPOINT_OUTDATA_SEQ_BIT;
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}
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break;
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case EP_DATA_SEQ_TOGGLE:
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if (!enable) {
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break;
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}
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if (ep_regs[ep_idx].ep_ctrl.fields.outdata_sequence_bit) {
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ep_regs[ep_idx].ep_ctrl.fields.outdata_sequence_bit = 0;
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} else {
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ep_regs[ep_idx].ep_ctrl.fields.outdata_sequence_bit = 1;
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}
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ep_ctrl_value ^= ENDPOINT_OUTDATA_SEQ_BIT;
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break;
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default:
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LOG_ERR("Unknown control type 0x%x", ctrl);
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return -EINVAL;
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}
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ep_regs[ep_idx].ep_ctrl.value = ep_ctrl_value;
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return 0;
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}
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@ -490,12 +512,15 @@ static int it82xx2_usb_set_ep_ctrl(uint8_t ep, enum it82xx2_ep_ctrl ctrl, bool e
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{
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uint8_t ep_idx = USB_EP_GET_IDX(ep);
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int ret = 0;
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unsigned int key;
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key = irq_lock();
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if (IT8XXX2_IS_EXTEND_ENDPOINT(ep_idx)) {
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ret = it82xx2_usb_extend_ep_ctrl(ep, ctrl, enable);
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} else {
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ret = it82xx2_usb_ep_ctrl(ep, ctrl, enable);
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}
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irq_unlock(key);
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return ret;
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}
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@ -548,7 +573,7 @@ static bool it82xx2_check_setup_following_out(void)
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ff_regs[EP0].ep_rx_fifo_dcnt_lsb == SETUP_DATA_CNT));
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}
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static inline void it82xx2_handler_setup(uint8_t fifo_idx, uint8_t ep_ctrl)
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static inline void it82xx2_handler_setup(uint8_t fifo_idx)
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{
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struct usb_it82xx2_regs *const usb_regs = it82xx2_get_usb_regs();
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struct it82xx2_usb_ep_regs *ep_regs = usb_regs->usb_ep_regs;
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@ -556,8 +581,8 @@ static inline void it82xx2_handler_setup(uint8_t fifo_idx, uint8_t ep_ctrl)
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uint8_t ep_idx = fifo_idx;
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/* wrong trans */
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if (ep_ctrl & EP_SEND_STALL) {
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ep_regs[fifo_idx].ep_ctrl.fields.send_stall_bit = 0;
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if (ep_regs[ep_idx].ep_ctrl.fields.send_stall_bit) {
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it82xx2_usb_set_ep_ctrl(fifo_idx, EP_STALL_SEND, false);
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udata0.st_state = STALL_SEND;
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ff_regs[fifo_idx].ep_rx_fifo_ctrl = FIFO_FORCE_EMPTY;
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LOG_DBG("Clear Stall Bit & RX FIFO");
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@ -596,14 +621,14 @@ static inline void it82xx2_handler_setup(uint8_t fifo_idx, uint8_t ep_ctrl)
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}
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}
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static inline void it82xx2_handler_in(const uint8_t ep_idx, const uint8_t ep_ctrl)
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static inline void it82xx2_handler_in(const uint8_t ep_idx)
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{
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struct usb_it82xx2_regs *const usb_regs = it82xx2_get_usb_regs();
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struct it82xx2_usb_ep_regs *ep_regs = usb_regs->usb_ep_regs;
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if (ep_idx == 0) {
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if (ep_ctrl & EP_SEND_STALL) {
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ep_regs[ep_idx].ep_ctrl.fields.send_stall_bit = 0;
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if (ep_regs[ep_idx].ep_ctrl.fields.send_stall_bit) {
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it82xx2_usb_set_ep_ctrl(ep_idx, EP_STALL_SEND, false);
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udata0.st_state = STALL_SEND;
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LOG_DBG("Clear Stall Bit");
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return;
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@ -657,9 +682,6 @@ static inline void it82xx2_handler_in(const uint8_t ep_idx, const uint8_t ep_ctr
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static inline void it82xx2_handler_out(const uint8_t ep_idx)
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{
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struct usb_it82xx2_regs *const usb_regs = it82xx2_get_usb_regs();
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struct it82xx2_usb_ep_regs *ep_regs = usb_regs->usb_ep_regs;
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if (ep_idx == 0) {
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/* ep0 wrong enter check */
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if (udata0.st_state >= STATUS_ST) {
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@ -688,7 +710,7 @@ static inline void it82xx2_handler_out(const uint8_t ep_idx)
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udata0.last_token = udata0.now_token;
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udata0.now_token = SETUP_TOKEN;
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udata0.st_state = SETUP_ST;
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ep_regs[ep_idx].ep_ctrl.fields.outdata_sequence_bit = 1;
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it82xx2_usb_set_ep_ctrl(ep_idx, EP_DATA_SEQ_1, true);
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udata0.ep_data[ep_idx].cb_out(ep_idx | USB_EP_DIR_OUT, USB_DC_EP_SETUP);
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if (udata0.no_data_ctrl) {
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@ -799,12 +821,10 @@ static bool it82xx2_usb_fake_token(const uint8_t ep_idx, uint8_t *token_type)
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static void it82xx2_usb_dc_trans_done(void)
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{
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struct usb_it82xx2_regs *const usb_regs = it82xx2_get_usb_regs();
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struct it82xx2_usb_ep_regs *ep_regs = usb_regs->usb_ep_regs;
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struct epn_ext_ctrl_regs *epn_ext_ctrl =
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usb_regs->fifo_regs[EP_EXT_REGS_DX].ext_0_3.epn_ext_ctrl;
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for (uint8_t fifo_idx = 0; fifo_idx < 4; fifo_idx++) {
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uint8_t ep_ctrl = ep_regs[fifo_idx].ep_ctrl.value;
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uint8_t ep_idx, token_type;
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if (fifo_idx == 0) {
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@ -819,10 +839,10 @@ static void it82xx2_usb_dc_trans_done(void)
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if (!it82xx2_usb_fake_token(ep_idx, &token_type)) {
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switch (token_type) {
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case DC_SETUP_TRANS:
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it82xx2_handler_setup(fifo_idx, ep_ctrl);
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it82xx2_handler_setup(fifo_idx);
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break;
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case DC_IN_TRANS:
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it82xx2_handler_in(ep_idx, ep_ctrl);
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it82xx2_handler_in(ep_idx);
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break;
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case DC_OUTDATA_TRANS:
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it82xx2_handler_out(ep_idx);
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@ -1001,7 +1021,7 @@ int usb_dc_reset(void)
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}
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}
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ep_regs[0].ep_ctrl.value = ENDPOINT_EN;
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ep_regs[0].ep_ctrl.value = ENDPOINT_ENABLE_BIT;
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usb_regs->dc_address = DC_ADDR_NULL;
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udata0.addr = DC_ADDR_NULL;
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usb_regs->dc_interrupt_status = DC_NAK_SENT_INT | DC_SOF_RECEIVED;
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@ -1093,9 +1113,7 @@ int usb_dc_ep_configure(const struct usb_dc_ep_cfg_data *const cfg)
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it82xx2_usb_set_ep_ctrl(ep_idx, EP_IN_DIRECTION_SET, in);
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if (in) {
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if (IT8XXX2_IS_EXTEND_ENDPOINT(ep_idx)) {
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it82xx2_usb_extend_ep_ctrl(ep_idx, EP_DATA_SEQ_1, false);
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}
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it82xx2_usb_set_ep_ctrl(ep_idx, EP_DATA_SEQ_1, false);
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udata0.ep_data[ep_idx].ep_status = EP_CONFIG_IN;
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} else {
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udata0.ep_data[ep_idx].ep_status = EP_CONFIG_OUT;
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@ -1215,7 +1233,7 @@ int usb_dc_ep_set_stall(const uint8_t ep)
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}
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if (idx < 198) {
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ep_regs[ep_idx].ep_ctrl.fields.send_stall_bit = 0;
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it82xx2_usb_set_ep_ctrl(ep_idx, EP_STALL_SEND, false);
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}
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udata0.no_data_ctrl = false;
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@ -1432,7 +1450,7 @@ int usb_dc_ep_read(uint8_t ep, uint8_t *buf, uint32_t max_data_len,
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ff_regs[0].ep_tx_fifo_ctrl = FIFO_FORCE_EMPTY;
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if (buf[6] != 0 || buf[7] != 0) {
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/* set status IN after data OUT */
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ep_regs[0].ep_ctrl.fields.outdata_sequence_bit = 1;
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it82xx2_usb_set_ep_ctrl(ep_idx, EP_DATA_SEQ_1, true);
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it82xx2_usb_set_ep_ctrl(ep_idx, EP_READY_ENABLE, true);
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} else {
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/* no_data_ctrl status */
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