drivers: gpio_pca95xx: endianness awareness
The register pair for each port in the GPIO expander are port 0 first then port 1. This would not work for big endian systems with the u16_t port value. So need to swap the byte ordering on such system. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung
Carles Cufí
parent
698f587e3a
commit
1c474e5364
1 changed files with 73 additions and 74 deletions
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@ -13,6 +13,7 @@
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#include <kernel.h>
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#include <device.h>
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#include <init.h>
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#include <sys/byteorder.h>
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#include <sys/util.h>
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#include <drivers/gpio.h>
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#include <drivers/i2c.h>
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@ -60,13 +61,6 @@ struct gpio_pca95xx_config {
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u8_t capabilities;
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};
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/** Store the port 0/1 data for each register pair. */
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union gpio_pca95xx_port_data {
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u16_t all;
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u8_t port[2];
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u8_t byte[2];
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};
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/** Runtime driver data */
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struct gpio_pca95xx_drv_data {
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/* gpio_driver_data needs to be first */
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@ -76,10 +70,10 @@ struct gpio_pca95xx_drv_data {
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struct device *i2c_master;
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struct {
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union gpio_pca95xx_port_data output;
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union gpio_pca95xx_port_data dir;
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union gpio_pca95xx_port_data pud_en;
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union gpio_pca95xx_port_data pud_sel;
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u16_t output;
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u16_t dir;
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u16_t pud_en;
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u16_t pud_sel;
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} reg_cache;
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};
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@ -94,8 +88,7 @@ struct gpio_pca95xx_drv_data {
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*
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* @return 0 if successful, failed otherwise.
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*/
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static int read_port_regs(struct device *dev, u8_t reg,
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union gpio_pca95xx_port_data *buf)
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static int read_port_regs(struct device *dev, u8_t reg, u16_t *buf)
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{
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const struct gpio_pca95xx_config * const config =
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dev->config->config_info;
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@ -103,20 +96,23 @@ static int read_port_regs(struct device *dev, u8_t reg,
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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struct device * const i2c_master = drv_data->i2c_master;
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u16_t i2c_addr = config->i2c_slave_addr;
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u16_t port_data;
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int ret;
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ret = i2c_burst_read(i2c_master, i2c_addr, reg, buf->byte, 2);
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if (ret) {
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ret = i2c_burst_read(i2c_master, i2c_addr, reg,
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(u8_t *)&port_data, sizeof(port_data));
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if (ret != 0) {
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LOG_ERR("PCA95XX[0x%X]: error reading register 0x%X (%d)",
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i2c_addr, reg, ret);
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goto error;
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return ret;
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}
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LOG_DBG("PCA95XX[0x%X]: Read: REG[0x%X] = 0x%X, REG[0x%X] = 0x%X",
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i2c_addr, reg, buf->byte[0], (reg + 1), buf->byte[1]);
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*buf = sys_le16_to_cpu(port_data);
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error:
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return ret;
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LOG_DBG("PCA95XX[0x%X]: Read: REG[0x%X] = 0x%X, REG[0x%X] = 0x%X",
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i2c_addr, reg, (*buf & 0xFF), (reg + 1), (*buf >> 8));
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return 0;
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}
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/**
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@ -130,8 +126,7 @@ error:
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*
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* @return 0 if successful, failed otherwise.
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*/
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static int write_port_regs(struct device *dev, u8_t reg,
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union gpio_pca95xx_port_data *buf)
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static int write_port_regs(struct device *dev, u8_t reg, u16_t *buf)
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{
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const struct gpio_pca95xx_config * const config =
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dev->config->config_info;
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@ -139,14 +134,18 @@ static int write_port_regs(struct device *dev, u8_t reg,
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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struct device * const i2c_master = drv_data->i2c_master;
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u16_t i2c_addr = config->i2c_slave_addr;
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u16_t port_data;
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int ret;
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LOG_DBG("PCA95XX[0x%X]: Write: REG[0x%X] = 0x%X, REG[0x%X] = "
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"0x%X", i2c_addr, reg, buf->byte[0], (reg + 1),
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buf->byte[1]);
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"0x%X", i2c_addr, reg, (*buf & 0xFF), (reg + 1),
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(*buf >> 8));
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ret = i2c_burst_write(i2c_master, i2c_addr, reg, buf->byte, 2);
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if (ret) {
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port_data = sys_cpu_to_le16(*buf);
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ret = i2c_burst_write(i2c_master, i2c_addr, reg,
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(u8_t *)&port_data, sizeof(port_data));
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if (ret != 0) {
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LOG_ERR("PCA95XX[0x%X]: error writing to register 0x%X "
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"(%d)", i2c_addr, reg, ret);
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}
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@ -169,8 +168,8 @@ static int setup_pin_dir(struct device *dev, int access_op,
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{
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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union gpio_pca95xx_port_data *reg_dir = &drv_data->reg_cache.dir;
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union gpio_pca95xx_port_data *reg_out = &drv_data->reg_cache.output;
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u16_t *reg_dir = &drv_data->reg_cache.dir;
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u16_t *reg_out = &drv_data->reg_cache.output;
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int ret;
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/* For each pin, 0 == output, 1 == input */
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@ -178,26 +177,26 @@ static int setup_pin_dir(struct device *dev, int access_op,
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case GPIO_ACCESS_BY_PIN:
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if ((flags & GPIO_OUTPUT) != 0U) {
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if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0U) {
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reg_out->all |= BIT(pin);
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*reg_out |= BIT(pin);
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} else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0U) {
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reg_out->all &= ~BIT(pin);
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*reg_out &= ~BIT(pin);
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}
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reg_dir->all &= ~BIT(pin);
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*reg_dir &= ~BIT(pin);
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} else {
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reg_dir->all |= BIT(pin);
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*reg_dir |= BIT(pin);
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}
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break;
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case GPIO_ACCESS_BY_PORT:
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if ((flags & GPIO_OUTPUT) != 0U) {
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if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0U) {
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reg_out->all = 0xFFFF;
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*reg_out = 0xFFFF;
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} else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0U) {
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reg_out->all = 0x0;
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*reg_out = 0x0;
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}
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reg_dir->all = 0x0;
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*reg_dir = 0x0;
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} else {
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reg_dir->all = 0xFFFF;
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*reg_dir = 0xFFFF;
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}
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break;
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@ -234,7 +233,7 @@ static int setup_pin_pullupdown(struct device *dev, int access_op,
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dev->config->config_info;
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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union gpio_pca95xx_port_data *reg_pud;
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u16_t *reg_pud;
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u16_t bit_mask;
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u16_t new_value = 0U;
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int ret;
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@ -272,16 +271,16 @@ static int setup_pin_pullupdown(struct device *dev, int access_op,
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new_value = 1 << pin;
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}
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reg_pud->all &= ~bit_mask;
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reg_pud->all |= new_value;
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*reg_pud &= ~bit_mask;
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*reg_pud |= new_value;
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break;
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case GPIO_ACCESS_BY_PORT:
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/* pull down == 0, pull up == 1*/
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if ((flags & GPIO_PULL_UP) != 0U) {
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reg_pud->all = 0xFFFF;
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*reg_pud = 0xFFFF;
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} else {
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reg_pud->all = 0x0;
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*reg_pud = 0x0;
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}
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break;
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default:
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@ -305,15 +304,15 @@ en_dis:
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new_value = 1 << pin;
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}
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reg_pud->all &= ~bit_mask;
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reg_pud->all |= new_value;
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*reg_pud &= ~bit_mask;
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*reg_pud |= new_value;
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break;
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case GPIO_ACCESS_BY_PORT:
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if ((flags & (GPIO_PULL_UP | GPIO_PULL_DOWN)) != 0U) {
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reg_pud->all = 0xFFFF;
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*reg_pud = 0xFFFF;
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} else {
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reg_pud->all = 0x0;
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*reg_pud = 0x0;
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}
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break;
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default:
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@ -393,20 +392,20 @@ static int gpio_pca95xx_write(struct device *dev, int access_op,
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{
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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union gpio_pca95xx_port_data *reg_out = &drv_data->reg_cache.output;
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u16_t *reg_out = &drv_data->reg_cache.output;
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int ret;
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/* Invert input value for pins configurated as active low. */
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switch (access_op) {
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case GPIO_ACCESS_BY_PIN:
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if (value) {
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reg_out->all |= BIT(pin);
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*reg_out |= BIT(pin);
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} else {
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reg_out->all &= ~BIT(pin);
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*reg_out &= ~BIT(pin);
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}
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break;
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case GPIO_ACCESS_BY_PORT:
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reg_out->all = value;
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*reg_out = value;
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break;
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default:
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ret = -ENOTSUP;
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@ -432,7 +431,7 @@ done:
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static int gpio_pca95xx_read(struct device *dev, int access_op,
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u32_t pin, u32_t *value)
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{
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union gpio_pca95xx_port_data buf;
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u16_t buf;
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int ret;
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ret = read_port_regs(dev, REG_INPUT_PORT0, &buf);
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@ -442,10 +441,10 @@ static int gpio_pca95xx_read(struct device *dev, int access_op,
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switch (access_op) {
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case GPIO_ACCESS_BY_PIN:
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*value = (buf.all >> pin) & 0x01;
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*value = (buf >> pin) & 0x01;
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break;
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case GPIO_ACCESS_BY_PORT:
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*value = buf.all;
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*value = buf;
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break;
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default:
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ret = -ENOTSUP;
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@ -458,7 +457,7 @@ done:
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static int gpio_pca95xx_port_get_raw(struct device *dev, u32_t *value)
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{
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union gpio_pca95xx_port_data buf;
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u16_t buf;
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int ret;
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ret = read_port_regs(dev, REG_INPUT_PORT0, &buf);
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@ -466,7 +465,7 @@ static int gpio_pca95xx_port_get_raw(struct device *dev, u32_t *value)
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goto done;
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}
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*value = buf.all;
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*value = buf;
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done:
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return ret;
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@ -477,9 +476,9 @@ static int gpio_pca95xx_port_set_masked_raw(struct device *dev,
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{
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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union gpio_pca95xx_port_data *reg_out = &drv_data->reg_cache.output;
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u16_t *reg_out = &drv_data->reg_cache.output;
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reg_out->all = (reg_out->all & ~mask) | (mask & value);
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*reg_out = (*reg_out & ~mask) | (mask & value);
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return write_port_regs(dev, REG_OUTPUT_PORT0, reg_out);
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}
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@ -498,9 +497,9 @@ static int gpio_pca95xx_port_toggle_bits(struct device *dev, u32_t mask)
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{
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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union gpio_pca95xx_port_data *reg_out = &drv_data->reg_cache.output;
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u16_t *reg_out = &drv_data->reg_cache.output;
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reg_out->all ^= mask;
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*reg_out ^= mask;
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return write_port_regs(dev, REG_OUTPUT_PORT0, reg_out);
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}
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@ -561,10 +560,10 @@ static const struct gpio_pca95xx_config gpio_pca95xx_0_cfg = {
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static struct gpio_pca95xx_drv_data gpio_pca95xx_0_drvdata = {
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/* Default for registers according to datasheet */
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.reg_cache.output = { .all = 0xFFFF },
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.reg_cache.dir = { .all = 0xFFFF },
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.reg_cache.pud_en = { .all = 0x0 },
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.reg_cache.pud_sel = { .all = 0xFFFF },
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.reg_cache.output = 0xFFFF,
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.reg_cache.dir = 0xFFFF,
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.reg_cache.pud_en = 0x0,
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.reg_cache.pud_sel = 0xFFFF,
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};
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/* This has to init after I2C master */
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@ -588,10 +587,10 @@ static const struct gpio_pca95xx_config gpio_pca95xx_1_cfg = {
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static struct gpio_pca95xx_drv_data gpio_pca95xx_1_drvdata = {
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/* Default for registers according to datasheet */
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.reg_cache.output = { .all = 0xFFFF },
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.reg_cache.dir = { .all = 0xFFFF },
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.reg_cache.pud_en = { .all = 0x0 },
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.reg_cache.pud_sel = { .all = 0xFFFF },
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.reg_cache.output = 0xFFFF,
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.reg_cache.dir = 0xFFFF,
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.reg_cache.pud_en = 0x0,
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.reg_cache.pud_sel = 0xFFFF,
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};
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/* This has to init after I2C master */
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@ -615,10 +614,10 @@ static const struct gpio_pca95xx_config gpio_pca95xx_2_cfg = {
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static struct gpio_pca95xx_drv_data gpio_pca95xx_2_drvdata = {
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/* Default for registers according to datasheet */
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.reg_cache.output = { .all = 0xFFFF },
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.reg_cache.dir = { .all = 0xFFFF },
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.reg_cache.pud_en = { .all = 0x0 },
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.reg_cache.pud_sel = { .all = 0xFFFF },
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.reg_cache.output = 0xFFFF,
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.reg_cache.dir = 0xFFFF,
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.reg_cache.pud_en = 0x0,
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.reg_cache.pud_sel = 0xFFFF,
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};
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/* This has to init after I2C master */
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@ -642,10 +641,10 @@ static const struct gpio_pca95xx_config gpio_pca95xx_3_cfg = {
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static struct gpio_pca95xx_drv_data gpio_pca95xx_3_drvdata = {
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/* Default for registers according to datasheet */
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.reg_cache.output = { .all = 0xFFFF },
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.reg_cache.dir = { .all = 0xFFFF },
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.reg_cache.pud_en = { .all = 0x0 },
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.reg_cache.pud_sel = { .all = 0xFFFF },
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.reg_cache.output = 0xFFFF,
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.reg_cache.dir = 0xFFFF,
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.reg_cache.pud_en = 0x0,
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.reg_cache.pud_sel = 0xFFFF,
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};
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/* This has to init after I2C master */
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