arm: userspace: Add ARM userspace infrastructure
This patch adds support for userspace on ARM architectures. Arch specific calls for transitioning threads to user mode, system calls, and associated handlers. Signed-off-by: Andy Gross <andy.gross@linaro.org>
This commit is contained in:
Andy Gross
Andrew Boie
parent
9ccdcb9be6
commit
1c047c9bef
14 changed files with 543 additions and 45 deletions
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@ -103,17 +103,6 @@ extern "C" {
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#define MPU_GUARD_ALIGN_AND_SIZE 0
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#endif
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/**
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* @brief Define alignment of a stack buffer
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*
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* This is used for two different things:
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* 1) Used in checks for stack size to be a multiple of the stack buffer
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* alignment
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* 2) Used to determine the alignment of a stack buffer
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*
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*/
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#define STACK_ALIGN max(STACK_ALIGN_SIZE, MPU_GUARD_ALIGN_AND_SIZE)
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/**
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* @brief Declare a toplevel thread stack memory region
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*
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@ -134,9 +123,40 @@ extern "C" {
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* @param sym Thread stack symbol name
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* @param size Size of the stack memory region
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*/
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/**
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* @brief Define alignment of a stack buffer
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*
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* This is used for two different things:
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* 1) Used in checks for stack size to be a multiple of the stack buffer
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* alignment
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* 2) Used to determine the alignment of a stack buffer
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*
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*/
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#if defined(CONFIG_USERSPACE)
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#define STACK_ALIGN 32
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#else
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#define STACK_ALIGN max(STACK_ALIGN_SIZE, MPU_GUARD_ALIGN_AND_SIZE)
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#endif
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/**
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* @brief Calculate power of two ceiling for a buffer size input
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*
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*/
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#define POW2_CEIL(x) ((1 << (31 - __builtin_clz(x))) < x ? \
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1 << (31 - __builtin_clz(x) + 1) : \
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1 << (31 - __builtin_clz(x)))
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#if defined(CONFIG_USERSPACE) && \
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defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
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#define _ARCH_THREAD_STACK_DEFINE(sym, size) \
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struct _k_thread_stack_element __kernel_noinit \
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__aligned(POW2_CEIL(size)) sym[POW2_CEIL(size)]
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#else
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#define _ARCH_THREAD_STACK_DEFINE(sym, size) \
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struct _k_thread_stack_element __kernel_noinit __aligned(STACK_ALIGN) \
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sym[size+MPU_GUARD_ALIGN_AND_SIZE]
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#endif
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/**
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* @brief Declare a toplevel array of thread stack memory regions
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@ -151,9 +171,18 @@ extern "C" {
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* @param nmemb Number of stacks to declare
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* @param size Size of the stack memory region
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*/
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#if defined(CONFIG_USERSPACE) && \
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defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
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#define _ARCH_THREAD_STACK_ARRAY_DEFINE(sym, nmemb, size) \
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struct _k_thread_stack_element __kernel_noinit __aligned(STACK_ALIGN) \
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struct _k_thread_stack_element __kernel_noinit \
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__aligned(POW2_CEIL(size)) \
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sym[nmemb][POW2_CEIL(size)]
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#else
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#define _ARCH_THREAD_STACK_ARRAY_DEFINE(sym, nmemb, size) \
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struct _k_thread_stack_element __kernel_noinit \
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__aligned(STACK_ALIGN) \
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sym[nmemb][size+MPU_GUARD_ALIGN_AND_SIZE]
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#endif
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/**
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* @brief Declare an embedded stack memory region
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@ -167,9 +196,16 @@ extern "C" {
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* @param sym Thread stack symbol name
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* @param size Size of the stack memory region
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*/
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#if defined(CONFIG_USERSPACE) && \
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defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
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#define _ARCH_THREAD_STACK_MEMBER(sym, size) \
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struct _k_thread_stack_element __aligned(POW2_CEIL(size)) \
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sym[POW2_CEIL(size)]
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#else
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#define _ARCH_THREAD_STACK_MEMBER(sym, size) \
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struct _k_thread_stack_element __aligned(STACK_ALIGN) \
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sym[size+MPU_GUARD_ALIGN_AND_SIZE]
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#endif
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/**
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* @brief Return the size in bytes of a stack memory region
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@ -178,9 +214,15 @@ extern "C" {
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* since the underlying implementation may actually create something larger
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* (for instance a guard area).
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*
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* The value returned here is guaranteed to match the 'size' parameter
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* The value returned here is NOT guaranteed to match the 'size' parameter
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* passed to K_THREAD_STACK_DEFINE and related macros.
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*
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* In the case of CONFIG_USERSPACE=y and
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* CONFIG_MPU_REQUIRES_POWER_OF_2_ALIGNMENT, the size will be larger than the
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* requested size.
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*
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* In all other configurations, the size will be correct.
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*
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* @param sym Stack memory symbol
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* @return Size of the stack
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*/
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@ -304,59 +346,172 @@ extern "C" {
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typedef u32_t k_mem_partition_attr_t;
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#endif /* _ASMLANGUAGE */
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#ifdef CONFIG_ARM_USERSPACE
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#ifdef CONFIG_USERSPACE
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#ifndef _ASMLANGUAGE
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/* Syscall invocation macros. arm-specific machine constraints used to ensure
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* args land in the proper registers. Currently, they are all stub functions
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* just for enabling CONFIG_USERSPACE on arm w/o errors.
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*/
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/* Syscall invocation macros. arm-specific machine constraints used to ensure
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* args land in the proper registers.
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*/
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static inline u32_t _arch_syscall_invoke6(u32_t arg1, u32_t arg2, u32_t arg3,
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u32_t arg4, u32_t arg5, u32_t arg6,
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u32_t call_id)
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{
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return 0;
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register u32_t ret __asm__("r0") = arg1;
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register u32_t r1 __asm__("r1") = arg2;
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register u32_t r2 __asm__("r2") = arg3;
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register u32_t r3 __asm__("r3") = arg4;
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__asm__ volatile("sub sp, #16\n"
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"str %[a5], [sp, #0]\n"
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"str %[a6], [sp, #4]\n"
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"str %[cid], [sp, #8]\n"
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"svc %[svid]\n"
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"add sp, #16\n"
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: "=r"(ret)
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: [cid] "r" (call_id),
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[svid] "i" (_SVC_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r1), "r" (r2), "r" (r3),
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[a5] "r" (arg5), [a6] "r" (arg6)
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: "ip", "memory");
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return ret;
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}
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static inline u32_t _arch_syscall_invoke5(u32_t arg1, u32_t arg2, u32_t arg3,
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u32_t arg4, u32_t arg5, u32_t call_id)
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{
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return 0;
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register u32_t ret __asm__("r0") = arg1;
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register u32_t r1 __asm__("r1") = arg2;
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register u32_t r2 __asm__("r2") = arg3;
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register u32_t r3 __asm__("r3") = arg4;
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__asm__ volatile("sub sp, #16\n"
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"str %[a5], [sp, #0]\n"
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"str %[cid], [sp, #8]\n"
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"svc %[svid]\n"
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"add sp, #16\n"
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: "=r"(ret)
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: [cid] "r" (call_id),
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[svid] "i" (_SVC_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r1), "r" (r2), "r" (r3),
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[a5] "r" (arg5)
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: "ip", "memory");
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return ret;
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}
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static inline u32_t _arch_syscall_invoke4(u32_t arg1, u32_t arg2, u32_t arg3,
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u32_t arg4, u32_t call_id)
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{
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return 0;
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register u32_t ret __asm__("r0") = arg1;
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register u32_t r1 __asm__("r1") = arg2;
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register u32_t r2 __asm__("r2") = arg3;
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register u32_t r3 __asm__("r3") = arg4;
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__asm__ volatile("sub sp, #16\n"
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"str %[cid], [sp,#8]\n"
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"svc %[svid]\n"
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"add sp, #16\n"
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: "=r"(ret)
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: [cid] "r" (call_id),
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[svid] "i" (_SVC_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r1), "r" (r2), "r" (r3)
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: "ip", "memory");
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return ret;
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}
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static inline u32_t _arch_syscall_invoke3(u32_t arg1, u32_t arg2, u32_t arg3,
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u32_t call_id)
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{
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return 0;
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register u32_t ret __asm__("r0") = arg1;
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register u32_t r1 __asm__("r1") = arg2;
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register u32_t r2 __asm__("r2") = arg3;
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__asm__ volatile("sub sp, #16\n"
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"str %[cid], [sp,#8]\n"
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"svc %[svid]\n"
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"add sp, #16\n"
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: "=r"(ret)
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: [cid] "r" (call_id),
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[svid] "i" (_SVC_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r1), "r" (r2)
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: "r3", "ip", "memory");
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return ret;
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}
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static inline u32_t _arch_syscall_invoke2(u32_t arg1, u32_t arg2, u32_t call_id)
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{
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return 0;
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register u32_t ret __asm__("r0") = arg1;
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register u32_t r1 __asm__("r1") = arg2;
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__asm__ volatile(
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"sub sp, #16\n"
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"str %[cid], [sp,#8]\n"
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"svc %[svid]\n"
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"add sp, #16\n"
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: "=r"(ret)
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: [cid] "r" (call_id),
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[svid] "i" (_SVC_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r1)
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: "r2", "r3", "ip", "memory");
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return ret;
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}
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static inline u32_t _arch_syscall_invoke1(u32_t arg1, u32_t call_id)
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{
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return 0;
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register u32_t ret __asm__("r0") = arg1;
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__asm__ volatile(
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"sub sp, #16\n"
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"str %[cid], [sp,#8]\n"
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"svc %[svid]\n"
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"add sp, #16\n"
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: "=r"(ret)
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: [cid] "r" (call_id),
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[svid] "i" (_SVC_CALL_SYSTEM_CALL),
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"r" (ret)
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: "r1", "r2", "r3", "ip", "memory");
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return ret;
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}
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static inline u32_t _arch_syscall_invoke0(u32_t call_id)
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{
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return 0;
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register u32_t ret __asm__("r0");
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__asm__ volatile(
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"sub sp, #16\n"
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"str %[cid], [sp,#8]\n"
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"svc %[svid]\n"
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"add sp, #16\n"
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: "=r"(ret)
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: [cid] "r" (call_id),
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[svid] "i" (_SVC_CALL_SYSTEM_CALL),
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"r" (ret)
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: "r1", "r2", "r3", "ip", "memory");
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return ret;
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}
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static inline int _arch_is_user_context(void)
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{
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return 0;
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u32_t value;
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/* check for handler mode */
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__asm__ volatile("mrs %0, IPSR\n\t" : "=r"(value));
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if (value) {
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return 0;
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}
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/* if not handler mode, return mode information */
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__asm__ volatile("mrs %0, CONTROL\n\t" : "=r"(value));
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return value & 0x1;
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}
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#endif /* _ASMLANGUAGE */
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#endif /* CONFIG_ARM_USERSPACE */
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#endif /* CONFIG_USERSPACE */
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#ifdef __cplusplus
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}
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