spi_nxp_lpspi: Convert DMA version to native code

Convert the DMA-based LPSPI driver to native code.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2025-02-18 09:55:04 -06:00 committed by Benjamin Cabé
commit 1c00f368d9

View file

@ -64,8 +64,7 @@ static int spi_mcux_dma_tx_load(const struct device *dev, const uint8_t *buf, si
stream->dma_cfg.channel_direction = MEMORY_TO_PERIPHERAL; stream->dma_cfg.channel_direction = MEMORY_TO_PERIPHERAL;
} }
/* Dest is always LPSPI tx fifo */ blk_cfg->dest_address = (uint32_t) &(base->TDR);
blk_cfg->dest_address = LPSPI_GetTxRegisterAddress(base);
return dma_config(stream->dma_dev, stream->channel, &stream->dma_cfg); return dma_config(stream->dma_dev, stream->channel, &stream->dma_cfg);
} }
@ -87,7 +86,7 @@ static int spi_mcux_dma_rx_load(const struct device *dev, uint8_t *buf, size_t l
blk_cfg->dest_address = (uint32_t)buf; blk_cfg->dest_address = (uint32_t)buf;
} }
blk_cfg->source_address = LPSPI_GetRxRegisterAddress(base); blk_cfg->source_address = (uint32_t) &(base->RDR);
return dma_config(stream->dma_dev, stream->channel, &stream->dma_cfg); return dma_config(stream->dma_dev, stream->channel, &stream->dma_cfg);
} }
@ -180,8 +179,10 @@ static void spi_mcux_dma_callback(const struct device *dev, void *arg, uint32_t
return; return;
} }
while ((IS_ENABLED(CONFIG_SOC_FAMILY_NXP_IMXRT) || IS_ENABLED(CONFIG_SOC_FAMILY_KINETIS)) &&
(LPSPI_GetStatusFlags(base) & kLPSPI_ModuleBusyFlag)) { while ((IS_ENABLED(CONFIG_SOC_FAMILY_NXP_IMXRT) ||
IS_ENABLED(CONFIG_SOC_FAMILY_KINETIS)) &&
(base->SR & LPSPI_SR_MBF_MASK)) {
/* wait until module is idle */ /* wait until module is idle */
} }
@ -198,11 +199,11 @@ static void spi_mcux_dma_callback(const struct device *dev, void *arg, uint32_t
error: error:
LOG_ERR("DMA callback error with channel %d err %d.", channel, status); LOG_ERR("DMA callback error with channel %d err %d.", channel, status);
done: done:
LPSPI_DisableDMA(base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable); base->DER &= ~(LPSPI_DER_TDDE_MASK | LPSPI_DER_RDDE_MASK);
base->TCR &= ~LPSPI_TCR_CONT_MASK; base->TCR &= ~LPSPI_TCR_CONT_MASK;
lpspi_wait_tx_fifo_empty(spi_dev); lpspi_wait_tx_fifo_empty(spi_dev);
spi_context_cs_control(ctx, false); spi_context_cs_control(ctx, false);
LPSPI_FlushFifo(base, true, true); base->CR |= LPSPI_CR_RTF_MASK | LPSPI_CR_RRF_MASK;
spi_context_complete(ctx, spi_dev, status); spi_context_complete(ctx, spi_dev, status);
spi_context_release(ctx, status); spi_context_release(ctx, status);
} }
@ -240,9 +241,9 @@ static int transceive_dma(const struct device *dev, const struct spi_config *spi
spi_context_cs_control(ctx, true); spi_context_cs_control(ctx, true);
LPSPI_FlushFifo(base, true, true); base->CR |= LPSPI_CR_RTF_MASK | LPSPI_CR_RRF_MASK;
LPSPI_EnableDMA(base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable); base->DER |= LPSPI_DER_TDDE_MASK | LPSPI_DER_RDDE_MASK;
ret = spi_context_wait_for_completion(ctx); ret = spi_context_wait_for_completion(ctx);
if (ret >= 0) { if (ret >= 0) {