nxp: imx8qm/imx8qxp: enable IRQSTEER on QM/QXP boards

This commit enables the IRQSTEER interrupt controller
on NXP's XTENSA-based i.MX8QM and i.MX8QXP.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This commit is contained in:
Laurentiu Mihalcea 2024-03-06 13:50:05 +02:00 committed by Henrik Brix Andersen
commit 1bf02c58ae
4 changed files with 110 additions and 9 deletions

View file

@ -16,3 +16,19 @@ CONFIG_CLOCK_CONTROL=y
CONFIG_SERIAL=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# interrupt-related configurations
CONFIG_MULTI_LEVEL_INTERRUPTS=y
CONFIG_2ND_LEVEL_INTERRUPTS=y
CONFIG_2ND_LVL_ISR_TBL_OFFSET=32
CONFIG_MAX_IRQ_PER_AGGREGATOR=64
CONFIG_NUM_2ND_LEVEL_AGGREGATORS=8
CONFIG_2ND_LVL_INTR_00_OFFSET=19
CONFIG_2ND_LVL_INTR_01_OFFSET=20
CONFIG_2ND_LVL_INTR_02_OFFSET=21
CONFIG_2ND_LVL_INTR_03_OFFSET=22
CONFIG_2ND_LVL_INTR_04_OFFSET=23
CONFIG_2ND_LVL_INTR_05_OFFSET=24
CONFIG_2ND_LVL_INTR_06_OFFSET=25
CONFIG_2ND_LVL_INTR_07_OFFSET=26
CONFIG_2ND_LEVEL_INTERRUPT_BITS=9

View file

@ -26,3 +26,7 @@
pinctrl-0 = <&lpuart2_default>;
pinctrl-names = "default";
};
&irqsteer {
reg = <0x51080000 DT_SIZE_K(64)>;
};

View file

@ -16,3 +16,19 @@ CONFIG_CLOCK_CONTROL=y
CONFIG_SERIAL=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# interrupt-related configurations
CONFIG_MULTI_LEVEL_INTERRUPTS=y
CONFIG_2ND_LEVEL_INTERRUPTS=y
CONFIG_2ND_LVL_ISR_TBL_OFFSET=32
CONFIG_MAX_IRQ_PER_AGGREGATOR=64
CONFIG_NUM_2ND_LEVEL_AGGREGATORS=8
CONFIG_2ND_LVL_INTR_00_OFFSET=19
CONFIG_2ND_LVL_INTR_01_OFFSET=20
CONFIG_2ND_LVL_INTR_02_OFFSET=21
CONFIG_2ND_LVL_INTR_03_OFFSET=22
CONFIG_2ND_LVL_INTR_04_OFFSET=23
CONFIG_2ND_LVL_INTR_05_OFFSET=24
CONFIG_2ND_LVL_INTR_06_OFFSET=25
CONFIG_2ND_LVL_INTR_07_OFFSET=26
CONFIG_2ND_LEVEL_INTERRUPT_BITS=9