nxp: imx8qm/imx8qxp: enable IRQSTEER on QM/QXP boards
This commit enables the IRQSTEER interrupt controller on NXP's XTENSA-based i.MX8QM and i.MX8QXP. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
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parent
d03778f9e6
commit
1bf02c58ae
4 changed files with 110 additions and 9 deletions
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@ -16,3 +16,19 @@ CONFIG_CLOCK_CONTROL=y
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CONFIG_SERIAL=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# interrupt-related configurations
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CONFIG_MULTI_LEVEL_INTERRUPTS=y
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CONFIG_2ND_LEVEL_INTERRUPTS=y
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CONFIG_2ND_LVL_ISR_TBL_OFFSET=32
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CONFIG_MAX_IRQ_PER_AGGREGATOR=64
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CONFIG_NUM_2ND_LEVEL_AGGREGATORS=8
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CONFIG_2ND_LVL_INTR_00_OFFSET=19
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CONFIG_2ND_LVL_INTR_01_OFFSET=20
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CONFIG_2ND_LVL_INTR_02_OFFSET=21
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CONFIG_2ND_LVL_INTR_03_OFFSET=22
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CONFIG_2ND_LVL_INTR_04_OFFSET=23
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CONFIG_2ND_LVL_INTR_05_OFFSET=24
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CONFIG_2ND_LVL_INTR_06_OFFSET=25
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CONFIG_2ND_LVL_INTR_07_OFFSET=26
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CONFIG_2ND_LEVEL_INTERRUPT_BITS=9
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@ -26,3 +26,7 @@
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pinctrl-0 = <&lpuart2_default>;
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pinctrl-names = "default";
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};
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&irqsteer {
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reg = <0x51080000 DT_SIZE_K(64)>;
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};
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@ -16,3 +16,19 @@ CONFIG_CLOCK_CONTROL=y
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CONFIG_SERIAL=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# interrupt-related configurations
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CONFIG_MULTI_LEVEL_INTERRUPTS=y
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CONFIG_2ND_LEVEL_INTERRUPTS=y
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CONFIG_2ND_LVL_ISR_TBL_OFFSET=32
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CONFIG_MAX_IRQ_PER_AGGREGATOR=64
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CONFIG_NUM_2ND_LEVEL_AGGREGATORS=8
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CONFIG_2ND_LVL_INTR_00_OFFSET=19
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CONFIG_2ND_LVL_INTR_01_OFFSET=20
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CONFIG_2ND_LVL_INTR_02_OFFSET=21
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CONFIG_2ND_LVL_INTR_03_OFFSET=22
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CONFIG_2ND_LVL_INTR_04_OFFSET=23
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CONFIG_2ND_LVL_INTR_05_OFFSET=24
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CONFIG_2ND_LVL_INTR_06_OFFSET=25
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CONFIG_2ND_LVL_INTR_07_OFFSET=26
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CONFIG_2ND_LEVEL_INTERRUPT_BITS=9
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