soc: nxp: imxrt: support external memory hyperram

add xmcd data section to save xmcd data in linker.ld

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
This commit is contained in:
Lucien Zhao 2024-08-09 17:40:24 +08:00 committed by Anas Nashif
commit 1b90b46f75
4 changed files with 26 additions and 0 deletions

View file

@ -38,6 +38,9 @@ if(CONFIG_SOC_SERIES_IMXRT10XX OR CONFIG_SOC_SERIES_IMXRT11XX)
endif() endif()
if(CONFIG_SOC_SERIES_IMXRT118X) if(CONFIG_SOC_SERIES_IMXRT118X)
if(CONFIG_EXTERNAL_MEM_CONFIG_DATA)
set(boot_hdr_xmcd_data_section ".boot_hdr.xmcd_data")
endif()
zephyr_linker_section_configure( zephyr_linker_section_configure(
SECTION .rom_start SECTION .rom_start
INPUT ".boot_hdr.conf" INPUT ".boot_hdr.conf"
@ -45,6 +48,13 @@ if(CONFIG_SOC_SERIES_IMXRT118X)
KEEP KEEP
PRIO 10 PRIO 10
) )
zephyr_linker_section_configure(
SECTION .rom_start
INPUT ${boot_hdr_xmcd_data_section}
OFFSET ${CONFIG_EXTERNAL_MEM_CONFIG_OFFSET}
KEEP
PRIO 10
)
zephyr_linker_section_configure( zephyr_linker_section_configure(
SECTION .rom_start SECTION .rom_start
INPUT ".boot_hdr.container" INPUT ".boot_hdr.container"

View file

@ -90,6 +90,7 @@ config EXTERNAL_MEM_CONFIG_DATA
config EXTERNAL_MEM_CONFIG_OFFSET config EXTERNAL_MEM_CONFIG_OFFSET
hex "External memory configuration offset" hex "External memory configuration offset"
depends on EXTERNAL_MEM_CONFIG_DATA depends on EXTERNAL_MEM_CONFIG_DATA
default 0x800 if SOC_SERIES_IMXRT118X
default 0x1040 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR default 0x1040 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR
help help
As specified by the boot ROM, the External Memory configuration data must be As specified by the boot ROM, the External Memory configuration data must be
@ -105,6 +106,13 @@ config NXP_IMX_EXTERNAL_SDRAM
an MPU region will be defined to disable cached access to the an MPU region will be defined to disable cached access to the
SDRAM memory space. SDRAM memory space.
config NXP_IMX_EXTERNAL_HYPERRAM
bool "Allow access to external HYPERRAM region"
help
Enable access to external HYPERRAM region managed by the FLEXSPI.
This setting should be enabled when the application uses HYPERRAM,
or an MPU region will be defined to disable cached access to the
HYPERRAM memory space.
config SECOND_CORE_MCUX config SECOND_CORE_MCUX
bool "Dual core operation on the RT11xx series" bool "Dual core operation on the RT11xx series"
depends on SOC_SERIES_IMXRT11XX depends on SOC_SERIES_IMXRT11XX

View file

@ -17,6 +17,10 @@ KEEP(*(.boot_hdr.conf))
KEEP(*(.flash_conf)) KEEP(*(.flash_conf))
#endif #endif
#if defined(CONFIG_SOC_SERIES_IMXRT118X) #if defined(CONFIG_SOC_SERIES_IMXRT118X)
#ifdef CONFIG_EXTERNAL_MEM_CONFIG_DATA
. = CONFIG_EXTERNAL_MEM_CONFIG_OFFSET;
KEEP(*(.boot_hdr.xmcd_data))
#endif
. = CONFIG_IMAGE_CONTAINER_OFFSET; . = CONFIG_IMAGE_CONTAINER_OFFSET;
KEEP(*(.boot_hdr.container)) KEEP(*(.boot_hdr.container))
#else #else

View file

@ -16,6 +16,10 @@ MEMORY
SDRAM (wx) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(sdram0)), LENGTH = DT_REG_SIZE(DT_NODELABEL(sdram0)) SDRAM (wx) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(sdram0)), LENGTH = DT_REG_SIZE(DT_NODELABEL(sdram0))
#endif #endif
#if (DT_REG_SIZE(DT_NODELABEL(hyperram0)) > 0) && !IS_CHOSEN_SRAM(hyperram0)
hyperram0 (wx) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(hyperram0)), LENGTH = DT_REG_SIZE(DT_NODELABEL(hyperram0))
#endif
} }
#include <zephyr/arch/arm/cortex_m/scripts/linker.ld> #include <zephyr/arch/arm/cortex_m/scripts/linker.ld>