soc: nxp: imxrt: support external memory hyperram
add xmcd data section to save xmcd data in linker.ld Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
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4 changed files with 26 additions and 0 deletions
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@ -38,6 +38,9 @@ if(CONFIG_SOC_SERIES_IMXRT10XX OR CONFIG_SOC_SERIES_IMXRT11XX)
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endif()
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endif()
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if(CONFIG_SOC_SERIES_IMXRT118X)
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if(CONFIG_SOC_SERIES_IMXRT118X)
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if(CONFIG_EXTERNAL_MEM_CONFIG_DATA)
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set(boot_hdr_xmcd_data_section ".boot_hdr.xmcd_data")
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endif()
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zephyr_linker_section_configure(
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zephyr_linker_section_configure(
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SECTION .rom_start
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SECTION .rom_start
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INPUT ".boot_hdr.conf"
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INPUT ".boot_hdr.conf"
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@ -45,6 +48,13 @@ if(CONFIG_SOC_SERIES_IMXRT118X)
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KEEP
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KEEP
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PRIO 10
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PRIO 10
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)
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)
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zephyr_linker_section_configure(
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SECTION .rom_start
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INPUT ${boot_hdr_xmcd_data_section}
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OFFSET ${CONFIG_EXTERNAL_MEM_CONFIG_OFFSET}
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KEEP
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PRIO 10
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)
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zephyr_linker_section_configure(
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zephyr_linker_section_configure(
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SECTION .rom_start
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SECTION .rom_start
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INPUT ".boot_hdr.container"
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INPUT ".boot_hdr.container"
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@ -90,6 +90,7 @@ config EXTERNAL_MEM_CONFIG_DATA
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config EXTERNAL_MEM_CONFIG_OFFSET
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config EXTERNAL_MEM_CONFIG_OFFSET
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hex "External memory configuration offset"
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hex "External memory configuration offset"
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depends on EXTERNAL_MEM_CONFIG_DATA
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depends on EXTERNAL_MEM_CONFIG_DATA
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default 0x800 if SOC_SERIES_IMXRT118X
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default 0x1040 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR
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default 0x1040 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR
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help
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help
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As specified by the boot ROM, the External Memory configuration data must be
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As specified by the boot ROM, the External Memory configuration data must be
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@ -105,6 +106,13 @@ config NXP_IMX_EXTERNAL_SDRAM
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an MPU region will be defined to disable cached access to the
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an MPU region will be defined to disable cached access to the
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SDRAM memory space.
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SDRAM memory space.
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config NXP_IMX_EXTERNAL_HYPERRAM
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bool "Allow access to external HYPERRAM region"
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help
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Enable access to external HYPERRAM region managed by the FLEXSPI.
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This setting should be enabled when the application uses HYPERRAM,
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or an MPU region will be defined to disable cached access to the
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HYPERRAM memory space.
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config SECOND_CORE_MCUX
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config SECOND_CORE_MCUX
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bool "Dual core operation on the RT11xx series"
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bool "Dual core operation on the RT11xx series"
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depends on SOC_SERIES_IMXRT11XX
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depends on SOC_SERIES_IMXRT11XX
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@ -17,6 +17,10 @@ KEEP(*(.boot_hdr.conf))
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KEEP(*(.flash_conf))
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KEEP(*(.flash_conf))
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#endif
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#endif
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#if defined(CONFIG_SOC_SERIES_IMXRT118X)
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#if defined(CONFIG_SOC_SERIES_IMXRT118X)
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#ifdef CONFIG_EXTERNAL_MEM_CONFIG_DATA
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. = CONFIG_EXTERNAL_MEM_CONFIG_OFFSET;
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KEEP(*(.boot_hdr.xmcd_data))
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#endif
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. = CONFIG_IMAGE_CONTAINER_OFFSET;
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. = CONFIG_IMAGE_CONTAINER_OFFSET;
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KEEP(*(.boot_hdr.container))
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KEEP(*(.boot_hdr.container))
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#else
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#else
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@ -16,6 +16,10 @@ MEMORY
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SDRAM (wx) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(sdram0)), LENGTH = DT_REG_SIZE(DT_NODELABEL(sdram0))
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SDRAM (wx) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(sdram0)), LENGTH = DT_REG_SIZE(DT_NODELABEL(sdram0))
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#endif
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#endif
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#if (DT_REG_SIZE(DT_NODELABEL(hyperram0)) > 0) && !IS_CHOSEN_SRAM(hyperram0)
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hyperram0 (wx) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(hyperram0)), LENGTH = DT_REG_SIZE(DT_NODELABEL(hyperram0))
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#endif
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}
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}
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#include <zephyr/arch/arm/cortex_m/scripts/linker.ld>
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#include <zephyr/arch/arm/cortex_m/scripts/linker.ld>
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