From 1b394ad1536ace00906441ec490f1664cad7e64d Mon Sep 17 00:00:00 2001 From: Ulf Magnusson Date: Fri, 24 Jan 2020 23:48:36 +0100 Subject: [PATCH] soc: ti_simplelink: kconfig: Refactor CCFG flash block handling Instead of having TI_CCFG_PRESENT as a symbol that's only defined in soc/arm/ti_simplelink/cc13x2_cc26x2/Kconfig.defconfig.series and y when SOC_SERIES_CC13X2_CC26X2 is enabled, turn it into a helper symbol that's selected by SOC_SERIES_CC13X2_CC26X2. This avoids having a symbol that's only defined in a Kconfig.defconfig file, which is confusing. It also makes things a bit more generic, in case other boards with CCFGs are added. Also rename it to HAS_TI_CCFG to be consistent with other helper symbols, and add a help text. Flagged by scripts/kconfig/lint.py. Signed-off-by: Ulf Magnusson --- include/arch/arm/aarch32/cortex_m/scripts/linker.ld | 6 +++--- include/arch/arm/aarch32/cortex_r/scripts/linker.ld | 6 +++--- soc/arm/ti_simplelink/Kconfig | 8 ++++++++ .../ti_simplelink/cc13x2_cc26x2/Kconfig.defconfig.series | 4 ---- soc/arm/ti_simplelink/cc13x2_cc26x2/Kconfig.series | 1 + 5 files changed, 15 insertions(+), 10 deletions(-) diff --git a/include/arch/arm/aarch32/cortex_m/scripts/linker.ld b/include/arch/arm/aarch32/cortex_m/scripts/linker.ld index 0e6e5bb97f6..77129bdcb34 100644 --- a/include/arch/arm/aarch32/cortex_m/scripts/linker.ld +++ b/include/arch/arm/aarch32/cortex_m/scripts/linker.ld @@ -39,7 +39,7 @@ #define ROM_ADDR (CONFIG_FLASH_BASE_ADDRESS + CONFIG_FLASH_LOAD_OFFSET) #endif -#ifdef CONFIG_TI_CCFG_PRESENT +#ifdef CONFIG_HAS_TI_CCFG #define CCFG_SIZE 88 #define ROM_SIZE (CONFIG_FLASH_SIZE*1K - CONFIG_FLASH_LOAD_OFFSET - \ CCFG_SIZE) @@ -92,7 +92,7 @@ _region_min_align = 4; MEMORY { FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE -#ifdef CONFIG_TI_CCFG_PRESENT +#ifdef CONFIG_HAS_TI_CCFG FLASH_CCFG (rwx): ORIGIN = CCFG_ADDR, LENGTH = CCFG_SIZE #endif #ifdef DT_CCM_BASE_ADDRESS @@ -246,7 +246,7 @@ SECTIONS GROUP_END(ROMABLE_REGION) /* Some TI SoCs have a special configuration footer, at the end of flash. */ -#ifdef CONFIG_TI_CCFG_PRESENT +#ifdef CONFIG_HAS_TI_CCFG SECTION_PROLOGUE(.ti_ccfg,,) { KEEP(*(TI_CCFG)) diff --git a/include/arch/arm/aarch32/cortex_r/scripts/linker.ld b/include/arch/arm/aarch32/cortex_r/scripts/linker.ld index 408968167d2..88a721b875f 100644 --- a/include/arch/arm/aarch32/cortex_r/scripts/linker.ld +++ b/include/arch/arm/aarch32/cortex_r/scripts/linker.ld @@ -43,7 +43,7 @@ #define ROM_ADDR (CONFIG_FLASH_BASE_ADDRESS + CONFIG_FLASH_LOAD_OFFSET) #endif -#ifdef CONFIG_TI_CCFG_PRESENT +#ifdef CONFIG_HAS_TI_CCFG #define CCFG_SIZE 88 #define ROM_SIZE (CONFIG_FLASH_SIZE*1K - CONFIG_FLASH_LOAD_OFFSET - \ CCFG_SIZE) @@ -92,7 +92,7 @@ _region_min_align = 4; MEMORY { FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE -#ifdef CONFIG_TI_CCFG_PRESENT +#ifdef CONFIG_HAS_TI_CCFG FLASH_CCFG (rwx): ORIGIN = CCFG_ADDR, LENGTH = CCFG_SIZE #endif #ifdef DT_CCM_BASE_ADDRESS @@ -242,7 +242,7 @@ SECTIONS GROUP_END(ROMABLE_REGION) /* Some TI SoCs have a special configuration footer, at the end of flash. */ -#ifdef CONFIG_TI_CCFG_PRESENT +#ifdef CONFIG_HAS_TI_CCFG SECTION_PROLOGUE(.ti_ccfg,,) { KEEP(*(TI_CCFG)) diff --git a/soc/arm/ti_simplelink/Kconfig b/soc/arm/ti_simplelink/Kconfig index d260e661736..e35796ee121 100644 --- a/soc/arm/ti_simplelink/Kconfig +++ b/soc/arm/ti_simplelink/Kconfig @@ -6,9 +6,17 @@ config SOC_FAMILY_TISIMPLELINK bool if SOC_FAMILY_TISIMPLELINK + config SOC_FAMILY string default "ti_simplelink" source "soc/arm/ti_simplelink/*/Kconfig.soc" + +config HAS_TI_CCFG + bool + help + Selected when CCFG (Customer Configuration) registers + appear at the end of flash + endif # SOC_FAMILY_TISIMPLELINK diff --git a/soc/arm/ti_simplelink/cc13x2_cc26x2/Kconfig.defconfig.series b/soc/arm/ti_simplelink/cc13x2_cc26x2/Kconfig.defconfig.series index 705b3054574..223d292b549 100644 --- a/soc/arm/ti_simplelink/cc13x2_cc26x2/Kconfig.defconfig.series +++ b/soc/arm/ti_simplelink/cc13x2_cc26x2/Kconfig.defconfig.series @@ -22,10 +22,6 @@ config SYS_CLOCK_TICKS_PER_SEC config NUM_IRQS default 38 -config TI_CCFG_PRESENT - bool - default y - config CC13X2_CC26X2_RTC_TIMER default y diff --git a/soc/arm/ti_simplelink/cc13x2_cc26x2/Kconfig.series b/soc/arm/ti_simplelink/cc13x2_cc26x2/Kconfig.series index d60942dc167..d0ccb01e7c3 100644 --- a/soc/arm/ti_simplelink/cc13x2_cc26x2/Kconfig.series +++ b/soc/arm/ti_simplelink/cc13x2_cc26x2/Kconfig.series @@ -10,5 +10,6 @@ config SOC_SERIES_CC13X2_CC26X2 select CPU_HAS_FPU select SOC_FAMILY_TISIMPLELINK select HAS_CC13X2_CC26X2_SDK + select HAS_TI_CCFG help Enable support for TI SimpleLink CC13x2 / CC26x2 SoCs